JPH0253676U

JPH0253676U -

Info

Publication number: JPH0253676U
Application number: JP1989098551U
Authority: JP
Priority date: 1977-10-08
Filing date: 1989-08-25
Publication date: 1990-04-18
Also published as: US4220968A; DE2745375C2; JPS5461411A; DE2745375A1

Description

[Brief explanation of drawings]

第１図は、時間誤差補償用の公知の回路の方式
を示す図、第２図および第３図は、本考案の異な
つた２つの実施例を示す図、第４図は、比較発振
器用の位相弁別器の構成を示す図、第５図は、位
相制御された動作状態を監視するための周波数比
較回路を示す図、第６図は、第５図による回路の
動作を説明するための曲線の図、第７図は、本考
案の別の実施例の図、第８図は、第７図による回
路の動作を説明するための曲線の図である。１……ビデオ記録装置、２……バケツトチエー
ン、３……分離段、４……比較発振器、５，９…
…位相比較段、６……クロツク発振器、７……フ
イルタ、８，１０，１２，１３……分周器、１４
……周波数比較段、１５……ゲート。 FIG. 1 shows a known circuit scheme for time error compensation, FIGS. 2 and 3 show two different embodiments of the invention, and FIG. FIG. 5 is a diagram showing the configuration of a phase discriminator, FIG. 5 is a diagram showing a frequency comparison circuit for monitoring the phase-controlled operating state, and FIG. 6 is a curve for explaining the operation of the circuit according to FIG. FIG. 7 is a diagram of another embodiment of the present invention, and FIG. 8 is a diagram of curves for explaining the operation of the circuit according to FIG. 1... Video recording device, 2... Bucket chain, 3... Separation stage, 4... Comparison oscillator, 5, 9...
...Phase comparison stage, 6...Clock oscillator, 7...Filter, 8, 10, 12, 13... Frequency divider, 14
...Frequency comparison stage, 15...gate.

Claims

[Claims for Utility Model Registration] 1. An oscillator is provided, the oscillator being synchronized via a flywheel phase control loop by a synchronization pulse separated from the video signal, wherein the time error is periodic. means for periodically controlling the phase of the oscillator 4 at the period of the time error or an integral multiple thereof; A means of eliminating time errors by always inputting the input signal to the same phase as the fundamental wave of the time error, and performing phase comparison for oscillator phase control at a vertical frequency or a frequency that is an integer fraction of this frequency. A circuit for generating a constant reference oscillation from a video signal containing a time error, consisting of means. 2. The oscillator 4 oscillates at the scanning line frequency fH or at a frequency of 1 m of this frequency fH, where m is an integer, and the phase comparison for phase control is performed at a vertical frequency fV or at a frequency of 12 Mn of this frequency. A circuit for generating a constant reference vibration from a video signal including a time error as claimed in claim 1, wherein n is an integer. 3 Phase control is performed at the scanning line frequency fH or an integer fraction thereof (1 m fH) (m = 1, 2,
3...), and a gate 15 that is periodically opened in the path of the phase control loop, a circuit for generating a constant reference vibration from a video signal containing a time error according to claim 1 of the utility model registration claim. . 4. A circuit for generating a constant reference vibration from a video signal containing a time error as claimed in claim 1, in which the phase control is performed only during each vertical blanking period. 5. A circuit for generating a constant reference oscillation from a video signal containing a time error according to claim 1, wherein the phase control is performed at each zero crossing of the time error. 6 For the phase comparison in the phase control loop, a pulsed or sawtooth voltage with a frequency of 1 m·fH is used, where fH is the scanning line frequency, m
= 1, 2, 3. A circuit for generating a constant reference vibration from a video signal including a time error according to claim 1 of the utility model registration claim. 7. The time period according to claim 1 of the utility model registration claim, in which phase comparison is performed intermittently at a frequency of 12n·fV (gate 15), where fV is a vertical frequency or n=1, 2, 3... A circuit that generates a constant reference vibration from a video signal that contains errors. 8. The phase control period is such that at least one entire cycle of the frequency 1 m·fH is included in the phase control period, and the video signal containing the time error described in claim 4 of the utility model registration is fixed. A circuit that generates standard vibration. 9. Utility model in which the circuit can be operated with continuous and intermittent phase control by means of a gate 15 which can be turned on and off, and where the intermittent control takes place only in the start-up state and during fault-free operation. A circuit for generating a constant reference vibration from a video signal including a time error as claimed in claim 1. 10 The transition from continuous control to intermittent control and vice versa is controlled by a frequency comparison stage 14, which compares the pulses (1 m·H ₂ ) coming from the comparison oscillator 4 with the video signal (BAS ₁ ) generates a constant reference vibration from a video signal containing a time error as described in claim 9 of the utility model registration claim, which monitors whether or not the pulses (1 m H ₁ ) taken out from circuit. 11. Generating a constant reference vibration from a video signal containing a time error as described in claim 1 of the utility model registration claim, in which switching to periodic control is delayed after the device 1 is turned on in the application for the video recording device 1. circuit.