JPH0252920B2 - - Google Patents

Info

Publication number
JPH0252920B2
JPH0252920B2 JP16967781A JP16967781A JPH0252920B2 JP H0252920 B2 JPH0252920 B2 JP H0252920B2 JP 16967781 A JP16967781 A JP 16967781A JP 16967781 A JP16967781 A JP 16967781A JP H0252920 B2 JPH0252920 B2 JP H0252920B2
Authority
JP
Japan
Prior art keywords
unit
subscriber
circuit
unbalanced
balanced
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP16967781A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5870675A (ja
Inventor
Haruyuki Yoshino
Takao Ueno
Norio Kobayashi
Masamichi Imai
Shinichi Iribe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Hitachi Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Original Assignee
Fujitsu Ltd
Hitachi Ltd
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Hitachi Ltd, Nippon Telegraph and Telephone Corp, Oki Electric Industry Co Ltd, Nippon Electric Co Ltd filed Critical Fujitsu Ltd
Priority to JP56169677A priority Critical patent/JPS5870675A/ja
Publication of JPS5870675A publication Critical patent/JPS5870675A/ja
Publication of JPH0252920B2 publication Critical patent/JPH0252920B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04M—TELEPHONIC COMMUNICATION
    • H04M3/00—Automatic or semi-automatic exchanges
    • H04M3/18—Automatic or semi-automatic exchanges with means for reducing interference or noise; with means for reducing effects due to line faults with means for protecting lines

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Devices For Supply Of Signal Current (AREA)
  • Interface Circuits In Exchanges (AREA)
JP56169677A 1981-10-23 1981-10-23 サ−ジ保護方式 Granted JPS5870675A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56169677A JPS5870675A (ja) 1981-10-23 1981-10-23 サ−ジ保護方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56169677A JPS5870675A (ja) 1981-10-23 1981-10-23 サ−ジ保護方式

Publications (2)

Publication Number Publication Date
JPS5870675A JPS5870675A (ja) 1983-04-27
JPH0252920B2 true JPH0252920B2 (enrdf_load_stackoverflow) 1990-11-15

Family

ID=15890854

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56169677A Granted JPS5870675A (ja) 1981-10-23 1981-10-23 サ−ジ保護方式

Country Status (1)

Country Link
JP (1) JPS5870675A (enrdf_load_stackoverflow)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6123733U (ja) * 1984-07-17 1986-02-12 日本電子株式会社 トランジスタのスイツチング回路
WO2010087184A1 (ja) 2009-01-29 2010-08-05 パナソニック株式会社 差動伝送回路及びそれを備えた電子機器

Also Published As

Publication number Publication date
JPS5870675A (ja) 1983-04-27

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