JPH025053B2 - - Google Patents

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention converts unipolar PWM signals into bipolar
Concerning circuits that convert to PWM signals.

[Conventional technology]

Pulse width modulation (PWM) is used in various applications such as servos and audio equipment, but unipolar
There are many PWM signal formats. But unipolar
PWM signals can be disadvantageous. For example PWM
In modulation type audio amplifiers, the center pulse width of the PWM signal is set to a 50% occupancy rate to reduce the DC component, but when there is no signal, energy outside the audio band is consumed by the load. , power efficiency decreases due to power consumption when there is no signal. For this reason, in cases such as high-output car stereos, systems with particularly high power efficiency are strongly desired.

To solve this problem, it may be possible to apply a special DC bias when there is no signal, but basically it can be solved by converting it to a bipolar PWM signal. However, converting a unipolar PWM signal to bipolar
A simple and practical circuit for converting it into a PWM signal is not yet well known.

[Problem that the invention seeks to solve]

An object of the present invention is to provide a practical and simple circuit that converts a unipolar PWM signal whose center pulse width is set to have an occupancy rate of 50% into a bipolar PWM signal.

[Means for solving problems]

The converter circuit according to the invention is a unipolar clock in which the leading edge of each pulse is synchronized with a 50% occupancy clock, and the trailing edge lags or advances with respect to the midpoint of the clock signal.
A circuit that inputs a PWM signal, converts it to a bipolar PWM signal, and outputs it, the circuit comprising: a trailing edge of each pulse of the unipolar PWM signal;
means for generating a pulse of constant amplitude that continues only between the midpoint of the clock cycle; and a polarity determining means for determining whether the trailing edge of the pulse is delayed or advanced; Of these, for pulses that correspond to the advance period,
The phase is inverted and outputted.
This output is a signal obtained by converting the original waveform into a bipolar PWM signal.

[Effect]

The upper part of FIG. 2 illustrates the generation of a PWM signal whose leading edge is synchronized to a 50% occupancy clock according to the present invention. If the original signal (analog) is a sine wave,
It is well known that the illustrated PWM signal can be obtained using a sawtooth wave. At this time, the leading edge of the PWM signal is
It coincides with the edge pulse of the clock and is shown in the figure. The width of the PWM signal is proportional to the amplitude value of the original signal, and the trailing edge of the PWM signal is at different positions. For example, point P of the original signal lags the midpoint _m1 ,
At point R, it is ahead of the midpoint _m3 . Midpoint at Q point
Matches m ₂ . That is, the trailing edge of the PWM signal lags behind for positive values of the original signal, and advances for negative values. In the present invention, the shaded portion of the PWM signal is extracted and output. It is clear that this output pulse width changes proportionally and symmetrically to the amplitude value of the original signal.

Next, the advance of the trailing edge of the PWM signal with respect to the midpoint,
Since the delay or phase relationship is due to the positive and negative polarities of the original signal, a bipolar PWM signal can be obtained by inverting the phase of a pulse train that is in an advanced phase like point R using means for determining this phase.

This bipolar PWM signal becomes a pulse train whose polarity changes depending on whether the original signal is positive or negative and whose width is proportional to its absolute value.

〔Example〕

An embodiment of the present invention will be described with reference to FIGS. 1 and 2. PWM signal 1 is exclusive ORed with the inversion of clock CK2 in EX-OR circuit 5 to obtain signal E. As shown in Figure 2, signal E
The width of is equal to the interval between the trailing edge of each pulse of PWM signal 1 and the midpoint m (m ₁ , m ₂ , . . . ) of the clock cycle, and corresponds to the hatched portion of which part is shown in PWM signal 1. This signal E passes through a delay circuit 6 and becomes a signal G. Further, the PWM signal 1 enters the polarity determination circuit 3. This circuit 3 is connected to clock CK2.
If the trailing edge of PWM signal 1 lags behind the midpoint of the clock cycle, the output signal F becomes "1", and if it leads the clock midpoint, it becomes "0".
Since the polarity determination circuit 3 is a D flip-flop and latches the input data at the rising edge of the clock CK2,
The above judgment can be made. When this signal F is "1", the switch _S1 goes to the + side and the signal G, which is the output of the delay circuit 6, is input to the amplifier 8 as it is. When the signal F is "0", the switch _S1 enters one side, and the signal G undergoes a phase reaction in the phase inversion circuit 7 and enters the amplifier 8. As explained in the operation section, when the trailing edge of the PWM signal leads the midpoint of the clock period, that is, when the pulse width is less than 1/2 of the clock period, the original waveform has a negative phase. , the output signal F of the polarity determination circuit 3 becomes "0", and the signal G
is inverted and input to the amplifier 8. In this way, it is converted into a bipolar PWM signal and applied to the load 9.

Note that the delay circuit 6 is provided to correct the time delay of the polarity determination circuit 3. Further, the edge pulse generating circuit 4 outputs a pulse to be sent to a sawtooth wave generating circuit (not shown) in order to generate a sawtooth wave in synchronization with the clock CK2.

〔Effect of the invention〕

As explained above, according to the present invention, a unipolar PWM signal can be converted into a bipolar PWM signal with an extremely simple circuit.
Therefore, since there is no power loss when there is no signal, a load circuit with good power efficiency can be constructed.
For example, it is suitable for driving speakers that require high output and high efficiency, such as car stereo amplifiers.

[Brief explanation of drawings]

FIG. 1 is a circuit block diagram of an embodiment of the present invention.
Figure 2 shows the generation of the unipolar PWM signal and the
A time chart is shown for each signal of the circuit shown in the figure. 1...PWM signal, 2...clock, 3...polarity judgment circuit, 4...edge pulse generation circuit, 5...EX-
OR circuit, 6...delay circuit, 7...phase inversion circuit, 8
...Amplifier, 9...Load.

Claims (1)

[Claims] 1. Input a unipolar PWM signal in which the leading edge of each pulse is synchronized with a clock with an occupancy rate of 50%, and the trailing edge lags or advances with respect to the midpoint of the clock period, and means for generating a pulse of constant amplitude that continues only between the midpoint of the clock cycle; and a polarity determining means for determining whether the trailing edge of the pulse is delayed or advanced; Among them, the phase of the pulse corresponding to the leading period is reversed and bipolar
A unipolar/bipolar PWM signal conversion circuit that outputs as a PWM signal.