JPH0247639Y2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a zero-cross detection circuit including a resistor and first and second inverters having the same threshold value.

In this type of zero-cross detection circuit, the input of a first inverter is connected to the input terminal of the signal to be detected and also connected to the input of a second inverter via a resistor, and the output of this second inverter is connected to the input terminal of the signal to be detected. , and the detection signal is extracted from the output of the first inverter. In such a configuration, since the output of the second inverter is fed back to its input, the input and output of the second inverter automatically reach their threshold voltages due to a so-called self-biasing operation. Since the input of the second inverter is connected to the input of the first inverter via a resistor and the first and second inverters have the same threshold value as each other, the input of the first inverter and therefore the input The terminal will also be biased to the threshold voltage. In this state, when a signal to be detected is supplied to the input terminal via a coupling capacitor, the signal is supplied to the first inverter with its center voltage level set to the threshold voltage, and as a result, the signal is A zero crossing point is detected and its detection signal is obtained from the output of the first inverter.

In this way, the self-biasing operation of the second inverter biases the input of the first inverter to the threshold voltage, but self-biasing the second inverter This means that all the transistors are in a conductive state, and that a through current always flows between the power supply terminals through the inside of the second inverter. For this reason, we want to reduce current consumption.
When a zero-cross detection circuit is built into a CMOS microcomputer, current is constantly consumed by the second inverter even when the circuit does not need to perform a detection operation. Even if the input terminal is fixed at the power supply voltage, the second inverter enters a self-bias state due to the presence of the resistor, and the through current does not disappear, making it impossible to reduce the current consumption.

An object of the present invention is to provide a zero-cross detection circuit that consumes less current when no detection operation is required.

The feature of the present invention is that in the zero-crossing detection circuit configured as described above, when a detection operation is to be performed, the output of the second inverter is fed back to its input, and when the detection operation is not to be performed, the output of the second inverter is fed back to the input and output of the second inverter. The present invention is provided with means (hereinafter referred to as a switch) for disconnecting the inverter and applying a voltage to its input to turn off the transistors constituting the second inverter.

By means of such a switch, when a detection operation is not required, the input of the second inverter is disconnected from its output, the self-bias loop is disconnected, and the transistor constituting the second inverter is connected to the input to a cut-off state. Since a voltage is applied that at least cuts off the through-current path between the power supplies, the current consumption becomes extremely small.

Hereinafter, the present invention will be described in detail with reference to the drawings.

FIG. 1 is a circuit diagram showing an embodiment of the present invention. Inverters 1 and 2 are configured to have the same threshold value V _T . The input of the inverter 2 is connected to an input terminal 6 and is also connected to the input of the inverter 1 via a resistor 9. A detection signal 7 is extracted from the output of the inverter 2 via an inverter 10. A switch 3 is provided according to the invention, one terminal 4 of which is connected to the output of the inverter 1 and the other terminal 5 of which is grounded (ie connected to GND level). Therefore, if switch 3 is connected between terminals 4, it will feed back the output of inverter 2 to its input, whereas if it is connected to terminal 5, it will disconnect the output and input of inverter 2 and connect the GND level to its input. will give.

In such a configuration, when a zero-cross detection operation is required, switch 3 is connected to terminal 4, and as a result, the output of inverter 2 is fed back to its input, and its input and output are adjusted to the threshold value by self-biasing. Bias to level V _T. That is,
Now, if the input voltage of inverter 1 is higher than its threshold voltage V _T , its output voltage is
The voltage becomes close to the GND level, and the same voltage is fed back to the input, lowering the input voltage level.
When the input voltage of inverter 2 becomes lower than the threshold voltage V _T , its output voltage will now drop to the V _DD level, and the same voltage will be fed back to the input to raise the input voltage level. This self-biasing operation stabilizes the input and output voltages of the inverter 2 to its threshold voltage V _T . The input of inverter 1 is connected to inverter 2 via resistor 9.
Since inverters 1 and 2 have the same threshold voltage V _T , the input of inverter 2,
In other words, the input terminal 6 is also biased at the threshold voltage V _T . In such a state, for example, the second
When the sine wave signal shown in Figure 2a is applied to the input terminal 6 via the coupling capacitor 8, the signal is supplied to the inverter 2 with its center level at the threshold voltage V _T as shown in Figure 2a. Ru. Therefore, when the sine wave signal level becomes higher than V _T , the output of inverter 2 is inverted to GND level,
On the other hand, when the sine wave signal level becomes lower than V _T , the output of inverter 2 is inverted to V _DD level. Since the output of the inverter 2 is supplied to the inverter 10, zero-cross detection for the sine wave signal is performed and the detected signal 7 is obtained as shown in FIG. 2b.

As mentioned above, inverter 1 has a threshold voltage of
Since it will be self-biased by V _T , for example
Inverter with CMOS structure, that is, N between power supplies
Even if an inverter in which channel and P-channel MOS transistors are connected in series is used, both transistors become conductive and a through current flows. In other words, we want to reduce current consumption.
Despite the CMOS structure, current consumption cannot be reduced if zero-cross detection operation is not required. Even if the input terminal 6 is fixed at the V _DD level or the GND level, the presence of the resistor 9 causes the inverter 1 to be in a self-biased state and the current consumption is not reduced.

Therefore, when the zero-cross detection operation is not required, the switch 3 is connected to the terminal 5 side. Therefore,
The output of inverter 1 is separated from the input, eliminating the self-bias loop, and the input of inverter 2 is fixed at the GND level. the result,
Both the N-channel and P-channel MOS transistors in the CMOS structure inverter receive the GND level at their gates, and the N-channel MOS transistor is in a cut-off state. By turning off the N-channel MOS transistor, the through-current path between the power supplies is also cut off, and the through-current in the inverter 1 disappears.

As described above, according to the present invention, a zero-crossing detection circuit is provided which executes a desired zero-crossing detection operation when necessary, and reduces current consumption when this operation is unnecessary.

In the case of an integrated circuit, the switch 3 may be implemented by connecting a gate circuit or a mask option suitable for the purpose of use.

[Brief explanation of the drawing]

Figure 1 is a circuit diagram showing one embodiment of the present invention;
Figure a is an input signal waveform diagram, and Figure 2b is a zero-cross detection output waveform diagram. 1, 2, 10...Inverter, 3...Switch,
4, 5...Terminal, 6...Input terminal, 8...Zero cross detection output, 8...Coupling capacitor, 9...Resistor.

Claims (1)

[Scope of utility model registration request] a resistor and first and second inverters having the same threshold value, an input terminal of the first inverter is connected to an input terminal to which a signal to be detected is supplied via a coupling capacitor; In a zero cross detection circuit that is connected to the input of the second inverter via a resistor and extracts a detection signal from the output of the first inverter, when performing a detection operation, the output of the second inverter is connected to its input. If the detection operation is not to be performed, the input and output of the second inverter are separated, and the transistors constituting the second inverter are made to be in a cut-off state to cut off the through-current path between the power supplies. A zero-cross detection circuit characterized in that it is provided with means for applying such a voltage.