JPH0246769A - Semiconductor device and manufacture thereof - Google Patents

Semiconductor device and manufacture thereof

Info

Publication number
JPH0246769A
JPH0246769A JP19766888A JP19766888A JPH0246769A JP H0246769 A JPH0246769 A JP H0246769A JP 19766888 A JP19766888 A JP 19766888A JP 19766888 A JP19766888 A JP 19766888A JP H0246769 A JPH0246769 A JP H0246769A
Authority
JP
Japan
Prior art keywords
substrate
thin film
metal
layer
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19766888A
Other languages
Japanese (ja)
Inventor
Juri Kato
樹理 加藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP19766888A priority Critical patent/JPH0246769A/en
Publication of JPH0246769A publication Critical patent/JPH0246769A/en
Pending legal-status Critical Current

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  • Local Oxidation Of Silicon (AREA)
  • Element Separation (AREA)

Abstract

PURPOSE:To improve the adhesion between an Si thin film and an Si substrate by forming a silicide layer of IVA or VA metal, a metal oxide film, and a single crystal Si thin film, on an Si substrate. CONSTITUTION:A thermal oxide film 4 is formed on a substrate 3 of an Si substrate I; Ti (IVA or VA metal 2 such as Zr, Hf, Ta, Nb and V) is formed on a substrate 1 of an Si substrate II; the surface of Ti2 and the surface of SiO24 are brought into contact with each other, and heat-treated. When long time heat treatment is performed at a temperature of, e.g., 1000 deg.C, Ti2 reacts with the Si substrate 1, and forms TiSi25. At the same time, SiO24 and Ti2 react with each other, and form TiO26. The following interfaces are obtained by chemical reaction based on heat, and the adhesion is very excellent; interface between the Si substrate 1 and a Ti silicide layer 5, interface between the TiSi2 layer 5 and a TiO2 layer 6, and interface between the TiO2 layer 6 and the Si substare 3. By polishing the Si substrate 3, a single crystal Si thin film 3' of 0.1-10mum thick is formed.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は、半導体装置と製造方法に関する。特に、高速
LSIの高信頼性化において有効である。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device and a manufacturing method. This is particularly effective in improving the reliability of high-speed LSIs.

〔従来の技術〕[Conventional technology]

従来、SOI構造を持つ半導体装置において、Si基板
!または熱酸化膜を形成したSi基板I′と熱酸化膜を
形成した31基板Ifの表面を接触し、熱処理により接
着後、該Si基板TIの裏面から研磨することにより、
0.1〜lOμmの単結晶Si薄膜を形成する製造方法
により、Si基板上には5iO=膜が形成され、該S1
0.膜上には、薄膜Siが形成されたSOI構造を持つ
半導体装置が使用されていた。
Conventionally, in semiconductor devices with SOI structure, Si substrate! Alternatively, the surfaces of the Si substrate I′ on which the thermal oxide film was formed and the 31 substrate If on which the thermal oxide film was formed are brought into contact, and after bonding by heat treatment, the Si substrate TI is polished from the back side.
A 5iO=film is formed on the Si substrate by a manufacturing method for forming a single crystal Si thin film of 0.1 to 1Oμm, and the S1
0. A semiconductor device having an SOI structure on which a thin film of Si is formed was used.

[発明が解決しようとする課題) しかしながら従来の半導体装置は、2枚のSi基板の接
着界面St/5iOz界面または51o2/5io2界
面の密着強度が悪く、該Si薄膜上にデバイスを形成す
る工程中に該Si薄膜がはがれるという不具合を多発し
た0本発明は、かかる従来の欠点を回避し、該Si薄膜
と該Si基板間の密着性に優れ、高信頼性な半導体装置
とその製造方法を提供することを目的とする。
[Problems to be Solved by the Invention] However, in conventional semiconductor devices, the adhesion strength of the adhesive interface St/5iOz interface or 51o2/5io2 interface between two Si substrates is poor, and during the process of forming a device on the Si thin film. The present invention avoids such conventional drawbacks and provides a highly reliable semiconductor device with excellent adhesion between the Si thin film and the Si substrate, and a manufacturing method thereof. The purpose is to

〔課題を解決するための手段] 本発明の半導体装置の断面構造は、Si基板上には、I
VAまたはVA金金属シリサイド層、該金属酸化膜及び
単結晶Si薄膜が形成されることを特徴としている6本
発明によれば該金属シリサイドと該Si基板とは、該金
属とSiとの結合が強く密着性に優れる。また該シリサ
イドと該金属酸化膜との界面、該金属酸化膜とSiの界
面も化学結合が強く密着性に優れるにのため、上層のデ
バイスを形成するSi薄膜は該Si基板からはがれるこ
となく、高信頼性な半導体装置を得ることができる。
[Means for Solving the Problems] In the cross-sectional structure of the semiconductor device of the present invention, I
A VA or VA gold metal silicide layer, the metal oxide film, and a single-crystal Si thin film are formed.6 According to the present invention, the metal silicide and the Si substrate have a bond between the metal and Si. Strong and has excellent adhesion. In addition, the interface between the silicide and the metal oxide film and the interface between the metal oxide film and Si also have strong chemical bonds and excellent adhesion, so the Si thin film forming the upper layer device does not peel off from the Si substrate. A highly reliable semiconductor device can be obtained.

〔実 施 例1 以下実施例を用いて説明する。第1〜3図は本発明によ
る半導体装置およびその製造工程断面図を示す、第1図
では、Si基板Iの基板3上には熱酸化膜4を形成し、
一方、Si基板IIの基板l上には、Ti (Zr、H
f、Ta、Nb、VなどのIVAまたはVA金属2)を
形成し、該Ti2と該S i Oz 4との表面どうし
を接触させ、熱処理を行なう、第2図において、例えば
1000℃の長時間熱処理を行なうと該Ti2は、該S
i基板lと反応しTi5iz 5を形成すると同時に。
[Example 1] This will be explained below using an example. 1 to 3 show cross-sectional views of a semiconductor device according to the present invention and its manufacturing process. In FIG. 1, a thermal oxide film 4 is formed on a substrate 3 of a Si substrate I,
On the other hand, on the substrate l of the Si substrate II, Ti (Zr, H
In FIG. 2, an IVA or VA metal 2) such as Ta, Nb, or V is formed, and the surfaces of the Ti2 and the SiOz 4 are brought into contact with each other and heat treated. When heat treatment is performed, the Ti2 becomes the S
At the same time as it reacts with the i substrate l to form Ti5iz 5.

S i O24とTi2が反応しTi026を形成する
にれは、IVA、VA金金属、酸化物を形成したほうが
安定なのでS i O2の還元が進行するためである。
This is because when S i O24 and Ti2 react to form Ti026, the reduction of S i O2 proceeds because it is more stable to form IVA, VA gold metal, or oxide.

Si基板1とTiシリサイド層5の界面、Ti51w層
5とTiO□層6の界面、及びTiO□層6とSi基板
3との界面の、いずれの界面も熱による化学反応で得ら
れた界面で、密着性は非常に良い。第3図においては、
Si基板3を研磨することにより単結晶Si薄膜3゛を
形成している。以上の製造方法により、第3図に示す、
Si基板l上には、T i S i 2層5、TiO2
層6及びSt薄膜3゛″が形成されてなるSO工槽構造
持つ半導体装置を得る。
The interface between the Si substrate 1 and the Ti silicide layer 5, the interface between the Ti51w layer 5 and the TiO□ layer 6, and the interface between the TiO□ layer 6 and the Si substrate 3 are all interfaces obtained by chemical reactions caused by heat. , adhesion is very good. In Figure 3,
By polishing the Si substrate 3, a single crystal Si thin film 3' is formed. By the above manufacturing method, as shown in Fig. 3,
On the Si substrate l, there are a T i S i two layer 5, a TiO2
A semiconductor device having an SO tank structure in which a layer 6 and a St thin film 3'' are formed is obtained.

〔発明の効果1 該Si薄膜3′にデバイスを形成することにより、Si
薄膜とSi基板の密着性に優れた高信頼性な半導体装置
の提供が可能になる。
[Effect 1 of the invention By forming a device on the Si thin film 3', Si
It becomes possible to provide a highly reliable semiconductor device with excellent adhesion between the thin film and the Si substrate.

1を己1 myself

【図面の簡単な説明】[Brief explanation of the drawing]

第1.2.3図は、本発明による半導体装置及びその製
造工程断面図。 Si基板 Ti Si基板 Ti0g T i S i 2 T i 02 Si薄膜 72品 ¥3凪
1.2.3 are cross-sectional views of a semiconductor device according to the present invention and its manufacturing process. Si substrate Ti Si substrate Ti0g T i S i 2 T i 02 Si thin film 72 items ¥ 3 yen

Claims (2)

【特許請求の範囲】[Claims] (1)Si基板上に絶縁膜が形成され、該絶縁膜上には
、0.1〜10μmの薄膜単結晶Siが形成され、該薄
膜Siには、デバイスが作成される、いわゆるSOI構
造を持つ半導体装置において、Si基板上には、IVAま
たはVA金属シリサイド層が形成され、該シリサイド上
には、IVAまたはVA金属酸化膜が形成され、該金属酸
化膜上には、0.1〜10μmの薄膜単結晶Siが形成
されてなることを特徴とする半導体装置。
(1) An insulating film is formed on a Si substrate, a thin film of single crystal Si of 0.1 to 10 μm is formed on the insulating film, and a so-called SOI structure in which devices are created is formed on the thin film of Si. In the semiconductor device, an IVA or VA metal silicide layer is formed on the Si substrate, an IVA or VA metal oxide film is formed on the silicide, and a thickness of 0.1 to 10 μm is formed on the metal oxide film. 1. A semiconductor device comprising a thin film of single crystal Si.
(2)2枚のSi基板のひとつの基板 I 表面には、S
iO_2絶縁膜を形成し、他の基板II表面には、IVAま
たはVA金属層を形成後、2枚のSi基板の、該SiO
_2膜表面と該金属表面を接触させ、熱処理により該S
iO_2を還元した後、Si基板 I を裏面から研磨す
ることにより、0.1〜10μm膜厚の単結晶Si薄膜
を形成することを特徴とする半導体装置の製造方法。
(2) On the surface of one of the two Si substrates, S
After forming an iO_2 insulating film and forming an IVA or VA metal layer on the surface of the other substrate II, the SiO
_2 The surface of the film is brought into contact with the metal surface, and the S
A method for manufacturing a semiconductor device, which comprises reducing iO_2 and then polishing the Si substrate I from the back side to form a single crystal Si thin film with a thickness of 0.1 to 10 μm.
JP19766888A 1988-08-08 1988-08-08 Semiconductor device and manufacture thereof Pending JPH0246769A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19766888A JPH0246769A (en) 1988-08-08 1988-08-08 Semiconductor device and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19766888A JPH0246769A (en) 1988-08-08 1988-08-08 Semiconductor device and manufacture thereof

Publications (1)

Publication Number Publication Date
JPH0246769A true JPH0246769A (en) 1990-02-16

Family

ID=16378343

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19766888A Pending JPH0246769A (en) 1988-08-08 1988-08-08 Semiconductor device and manufacture thereof

Country Status (1)

Country Link
JP (1) JPH0246769A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003110096A (en) * 2001-09-28 2003-04-11 Japan Fine Ceramics Center Soi substrate and its manufacturing method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003110096A (en) * 2001-09-28 2003-04-11 Japan Fine Ceramics Center Soi substrate and its manufacturing method

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