JPH0244779A - Light-activated semiconductor device - Google Patents

Abstract

PURPOSE:To decrease the cost of manufacturing by forming a high voltage output type solar battery with an Si layer comprising polycrystalline Si or single crystal Si. CONSTITUTION:A poly Si film 4 is formed on an SiO2 film 6 which is formed by a thermal oxidation method. The poly Si film 4 is formed by an SiH4 thermal decomposition method. The gate part of a vertical MOS FET comprising an SiO2 gate insulating film and a poly Si film 8 is fabricated by removing unnecessary parts of the SiO2 film and the poly Si film. An N<+>-Si diffused layers 9 and 9' are formed in the source contact region of the vertical MOS FET and a part which is to become the light receiving surface of a solar battery. The SiO2 film 6, a P-Si diffused layer 5'' and the Si layer 4 in a specified pattern are sequentially removed. Each island shaped region in which the solar call element is assembled is isolated. Thereafter, an insulating film 10 comprising SiO2 and the like is formed by a low temperature CVD method and the like. In this way, the number of chips which are mounted in the package of a photo MOS relay is decreased, and the reliability is improved.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a light-driven semiconductor device used in a light-coupled solid state relay device or the like.

(Prior Art) In recent years, with the rapid development of semiconductor technology, demands for higher performance and smaller size of hardware in control systems have increased, and their digitalization has progressed.

However, the input/output sections of these control systems still process analog signals, and when viewed from the system as a whole, digital circuits and analog circuits coexist within the same system. Therefore, it is important to reliably process analog signals (particularly minute voltages and currents) and to introduce the processed signals to the control section of the system.

PhotoMOS relays have been put into practical use as a solution to these problems. Photo MO3 relay.

It is a type of solid state relay device in which the input and output parts are completely electrically isolated but optically coupled.

When a current is passed through the input side of this photoMOS relay, one light emitting element (for example, 9 light emitting diodes) emits light, and this light output is converted to a photoelectric conversion element (for example, 9 light emitting diodes).

A small solar cell (high voltage output type) takes the charge and generates photovoltaic power. This photovoltaic force is applied to the power MOS FET as a gate voltage to turn on the power MO5FET.
By turning it off, the load on the output side can be controlled.

However, in the conventional photoMOS relay, a photoelectric conversion element is disposed in the same package so as to face nine light emitting elements, and a power MO3FET driven by the electromotive force of this photoelectric conversion element is further incorporated.

Therefore, it is necessary to mount three or more independent chips in the same package, which complicates the structure of the device.
There were problems in that the manufacturing cost increased and the reliability of the device itself decreased.

Moreover, since the above-mentioned power MOS FET and photoelectric conversion element are individually manufactured using separate substrates,
A common use area for pixel elements is provided on the substrate.

There was a problem in that a common manufacturing process could not be adopted, resulting in high manufacturing costs.

In order to solve these problems, power MO3FE
There is an urgent need to form T and a photoelectric conversion element on the same substrate. For example, JP-A-62-106660,
On a semiconductor substrate on which MOS FETs etc. are formed.

A semiconductor device in which a photoelectric conversion element is formed through an insulating film is disclosed. The photoelectric conversion element is formed of amorphous Si or Si single crystal formed on the insulating film.

(Problem to be Solved by the Invention) However, when amorphous Si is used in a photoelectric conversion element, 2. For example, when depositing amorphous Si on a lower electrode in a predetermined pattern formed on an insulating film by a discharge plasma method, The upper MOSPET will be damaged and the threshold voltage will change.

In order to recover this change value, it is necessary to perform heat treatment at a high temperature, and in this case, the amorphous film is destroyed, making recovery difficult.

Therefore, the element characteristics of MOS FETs formed on the same substrate may deviate from the designed values. Also.

When forming an amorphous solar cell, electrodes are required above and below the amorphous film, which may complicate the process and increase costs. Furthermore, photoelectric conversion elements using amorphous Si may suffer from deterioration in photoelectric conversion characteristics due to long-term use, resulting in lack of reliability.

On the other hand, when using a Si single crystal for a photoelectric conversion element, for example, first a polycrystalline thin film or an amorphous thin film of Si is formed on an insulating film, and then the Si thin film is irradiated with a laser to melt it. Then, a method is adopted in which the material is cooled and turned into a single crystal. but.

With this method, the manufacturing process is complicated and the productivity is low.
Moreover, since the yield of the device is low, there are problems such as high manufacturing cost.

The present invention solves the above-mentioned conventional problems, and its purpose is to form a photoelectric conversion element with a polycrystalline or single-crystalline Si layer formed by vapor phase growth. An object of the present invention is to provide a light-driven semiconductor device with reduced cost and improved reliability.

(Means for Solving the Problems) A light-driven semiconductor device of the present invention is a light-driven semiconductor device in which a vertical MOS FET and a high-voltage output solar cell are formed on the same substrate. A high-voltage output solar cell is formed with a polycrystalline or single-crystalline Si layer formed by vapor phase growth, thereby achieving the above object.

The above-mentioned vertical MOS PET and high voltage output solar cell are formed in a planar manner on a substrate, for example. In this case, the solar cell is fabricated via an insulating film formed on the substrate. Alternatively, first fabricate a vertical MO3FET on the substrate,
After covering with an insulating film, a solar cell may be fabricated on the insulating film.

A high voltage output type solar cell is composed of a plurality of solar cell elements. For example, a polycrystalline or single-crystalline Si layer is formed on the insulating film by a vapor phase growth method, the Si layer is divided into a plurality of island-like regions by a one-selection etching technique, and each of these island-like regions is A solar cell is created by incorporating a solar cell element into the cell and connecting it with electrodes.

Usually, a high-voltage output solar cell used in a photoMOS relay or the like is arranged to face one light-emitting element (for example, one light-emitting diode) at an interval of several hundred μm. In this case, the solar cell is used with a large light energy such as a light intensity of 100 mW/all, and if the conversion efficiency is about 2 to 3%, the power MO5FET can be easily driven. In the present invention, vertical MOS
Even when a solar cell is manufactured using a polycrystalline Si layer formed on an FET with an insulating film interposed therebetween, it is easy to obtain conversion efficiency of this level.

The optically driven semiconductor device of the present invention may be manufactured as necessary.

In order to improve the switching operation speed, we have developed a day-length MOS PI! A peripheral circuit including T or the like may be provided. This is BLO (Epitaxial Later)
A single crystal part is formed on the above insulating film using an over-growth technique.

A polycrystalline part consisting of enlarged crystal grains is formed.

This is achieved by incorporating a peripheral circuit such as a daybreak type MO5FET into the single crystal part and a solar cell element into the polycrystal part.

To improve switching operation speed.

For example, the resistance due to the thickness of the substrate may be reduced by thinning the substrate by performing lapping or the like on the back surface of the substrate.

(Example) The present invention will be described below with reference to examples.

2 Transmission In this example, the vertical MOS FET and the solar cell are
Manufacturing of a light-driven semiconductor device formed planarly on an i-substrate will be described. A partial sectional view of this optically driven semiconductor device is shown in FIG.

First, using n”-5t (100) wafer 1 as a substrate,
An n-5t pitaxial single crystal layer 2 was formed on the substrate.

This n"'-3i epitaxial single crystal layer 2 has a thickness of about 1.
It was formed by reducing 5iC14 with hydrogen in a temperature range of 100 to 300°C while flowing a predetermined doping gas such as PR. The single crystal layer 2 has a thickness of about 9
It can also be formed by thermally decomposing SiH4 while flowing a predetermined doping gas such as PHx in a temperature range of 0.00 to 1.100°C. The layer thickness of the n-Si epitaxial single crystal layer 2 is about 30 am, and its specific resistance is 5
It was 0 to 55Ω.

Next, an insulating film 3 was formed on the entire surface of this n-5t pitaxial single crystal layer 2, and then the insulating film 3 was removed except for the area where the solar cell was to be incorporated by photo-etching or selective etching.

This insulating film 3 is made of 5in2 or SiJ.

It can be formed by a thermal oxidation method, a low-temperature CVD method, a plasma CVD method, or the like.

Further, 53 layers 4 were formed on the two n-5i epitaxial single crystal layers and the insulating film 3. This 5iii4 is on the n-Si epitaxial single crystal layer 2.

Consisting of a Si epitaxial single crystal layer, on the insulating film 3, a Si single crystal grown in a lateral vapor phase and the insulating film 3 are formed.
It consists of Si crystal grains grown from nuclei generated above. This 53 layer 4 reduces 5iC14 with hydrogen in a temperature range of 1.100 to 1,300°C or 900 to 1
．． S i I in the temperature range of 100°C! , was formed by pyrolysis of . This is because the Si layer 4 is formed at such a high temperature.

Since the Si single crystal portion formed on the insulating film 3 by lateral vapor phase growth was large and the number of nuclei formed on the insulating film 3 was small, enlarged Si crystal grains were obtained. The layer thickness of the 53 layer 4 was set to 3 to 20 μm in consideration of the conversion efficiency of a solar cell to be formed later on the region on the insulating film 3. Also, 53
The specific resistance of layer 4 is: n-Si epitaxial single crystal layer 2
Similarly, it was 50-55Ω.

Next, after forming a Sin film as a mask on the entire surface,
By selective etching technology, the Sin! A predetermined pattern of film was formed. In this case, the SiO□ film serving as a mask can be formed by a thermal oxidation method, a CVD method, or the like.

Also, as a one-selection etching technique.

For example, photoetching is used.

After implanting boron into the 53 layer 4 masked with the 5iO1 film under predetermined conditions using ion implantation technology, a drive-in process is performed to form the p-5i well 5. which forms the channel portion of the vertical MOS FET. p- for high voltage resistance
5t guard ring 5゛ and P in the solar cell element
A p-5t diffusion layer 5'' for N junction was formed.

During drive-in processing, heat treatment is performed for a long time in oxygen at a temperature of about i,ioo'c, so p-S
i-well5. p-3i guard ring 5”, and p-5
Thousands of 510g films are also formed on the t-diffusion layer 5''. These SiO□ films and the SiO film used as a mask
The g film is a portion that becomes the channel region of the vertical MOS FET by photo-etching or selective etching.

Openings were made in the portions that would become the source contact region and the portions that would form the n-5t diffusion layer of the solar cell element, forming the Si0g film 6 in a predetermined pattern as shown in FIG.

Next, a SiO□ film of approximately 1,000 layers is formed by thermal oxidation, and a poly-Si film is formed on the SiH4 film.
Formed by pyrolysis. By removing unnecessary portions of these SiO□ films and poly-Si films using photoetching technology or selective etching technology (for example, two-reactive ion etching), a reduced-type MO3PET consisting of SiO□ gate insulating film 7 and poly-Si film 8 can be formed. The gate part was created.

Then, as shown in FIG. 2, n''-Si diffusion layers 9 and 9 are formed into the source contact region of the vertical MO5FET and the light-receiving surface of the solar cell element by ion implantation or thermal diffusion, respectively. After forming the 5iOz film 6 on the unnecessary vertical MOS FET portion using photo-etching technology or selective etching technology, and the n''-Si diffusion layers 9 and 9' using the thermal diffusion method, The formed 5ift film was removed.

Next, a predetermined pattern of unnecessary SiO□ film 6 is removed by photo-etching or selective etching. p
-Si diffusion N5'' and Si layer 4 are sequentially removed.

After separating each island-like area to incorporate solar cell elements.

An insulating film 10 made of SiO□ or the like was formed over the entire surface. The insulating BIJ and IO can be formed by a low temperature CVO method, a plasma CVD method, or the like.

By photo-etching technology or selective etching technology,
After opening a predetermined region of the n"-Si diffused layer 9 which becomes the electrode contact part in the source region of the @i-type MOS PET and the p-3i diffused layer 5 and the p-Si guard ring 5', AI evaporation is performed. The entire surface was covered with a membrane.

This A1 vapor deposition film can be formed by sputtering, electron beam evaporation, or the like. Unnecessary portions of this AI vapor deposited film were removed by photoetching or selective etching to form a predetermined pattern of wiring 11, and then the entire surface was covered with an insulating film 12. The insulating film 12
is made of SiO□ or 5iJ4, etc., and low-temperature CV
It can be formed by the D method, plasma CVD method, or the like.

Next, the above A1 placement! In the same manner as when forming flA11, the electrode contact portion of each solar cell element and A
After opening a predetermined electrode portion (not shown) of the I wiring 11, each solar cell element was connected by forming an AI wiring 13 in a predetermined pattern. These solar cell elements are connected in series with each other to constitute a high voltage output type solar cell. Further, the AI wiring 13 crosses over the AI wiring 11 in the p-Si guard ring portion and connects the AI wiring 11 and the solar cell element through the predetermined electrode portion.

In this way, vertical MO3FE as shown in Fig.
A light-driven semiconductor device was obtained in which a T and a high-voltage output solar cell were formed in a planar manner on a substrate. In this example, since the vertical MOS FET and each solar cell element are fabricated simultaneously on the same substrate, the p-5t diffusion layer, the n-5i diffusion layer, etc. can be processed at the same time in the same process. , the manufacturing process has been simplified.

Note that the optically driven semiconductor device of this embodiment does not include a peripheral circuit for improving the switching operation speed, but as in the second embodiment described below, a peripheral circuit including a dave-regression MO3FET, etc. can be incorporated.

1 device 1 In this example, a vertical MOS FET was first fabricated on a Si substrate, and then a high voltage output solar cell was fabricated on the vertical MOS FET via an insulating film. I will explain about it. A partial sectional view of this optically driven semiconductor device is shown in FIG.

First, an n''-5i (100) wafer 13 is used as a substrate,
After forming an n-5i epitaxial single crystal layer 14 on the substrate in the same manner as in Example 1, a p-5i well 1 was formed.
5. p-Si guard ring 161 surface protection insulating film 17
．． Sin, gate insulating film 18. Poly-Si film 19. Protective insulating film 20. and an n''-5i diffusion layer 21 in the source region of the vertical MOS FET.The surface protective insulating film 17 and the protective insulating film 20 were
It consists of i, N4, etc.

Next, the entire surface was covered with a heat-resistant conductive film, and a predetermined pattern of heat-resistant wiring 22 was formed by photo-etching or selective etching. This heat-resistant conductive film is
4. It consists of Mo+ WSiz, Mo5iz, etc.

It can be formed by sputtering, electron beam evaporation, low-temperature CVD, or the like.

After forming the insulating film 23 on the heat-resistant wiring 22 thus formed, the surface protection insulating film 17 is etched by photo-etching or selective etching. Protective insulating film 20. The insulating film 23 was sequentially removed to form a seed portion 24 in a predetermined pattern. The insulating film 23 is made of Sing or Si3N4
It can be formed by low temperature CVD method, plasma CVD method, etc.

A p-Si layer 2 is formed on this insulating film 23 and seed part 24.
5 was formed. This p-3i layer 25 is formed in the seed portion 24.
And on the insulating film 23 near the seed part 24, Si
It is composed of an epitaxial single crystal layer, and on the insulating film 23 remote from the seed portion 24, it is composed of Si polycrystalline grains that have grown large from nuclei generated on the insulating film 23. This p-S
The i-layer 25 was formed by ELO technology using thermal decomposition of SiH4 in a temperature range of 900 to 1.100''C.

Next, after forming an insulating film 26 made of SiO□ or the like on the entire surface of the p-Si layer 25 by low-temperature CVD or the like,
By photo-etching technique or selective etching technique.

Si formed on the insulating film 23 away from the seed part 24
A portion of the polycrystalline layer that becomes the light-receiving surface of the solar cell element;
Daveresion type MO3P in the Si epitaxial single crystal layer formed on the insulating film 23 near the seed part 24
f! The portion of the insulating film 26 that corresponds to the T portion was removed.

Then, in the same manner as in Example 1, a 5ift gate insulating film 27 and a poly-Si film 28. n''-3t diffusion layer 2 in the drain region and source region of vertical MO5FET
9° as well as n for PN junctions in solar cell elements.
After forming the "-Si diffusion layer 29", a protective insulating film 3o made of 5i01 or the like was formed over the entire surface by low-temperature CVO method or the like. A partial sectional view at this stage is shown in FIG.

Next, a predetermined pattern of the protective insulating film 30, which becomes unnecessary, is removed by photo-etching or selective etching.
Insulating film 26. After sequentially removing the p-Si layer 25 and separating the solar cell element from the peripheral circuit section incorporating the dabursion type MO5FET, a protective insulating film 31 was formed on the entire surface by low-temperature CVO method or the like.

By photo-etching technology or selective etching technology,
Predetermined areas of protective insulating films 30 and 31 in a solar cell element and a daybreak type MO5FET.

Also, after opening a predetermined region of the heat-resistant wiring 22 that will be a contact region with the vertical MO5FET, an AI wiring 32 was formed in the same manner as in Example 1.

In this way, a vertical MOSFE as shown in FIG.
A light-driven semiconductor device was obtained in which a high voltage output solar cell made of polycrystalline Si was fabricated on T with an insulating film interposed therebetween. In the optically driven semiconductor device of this example.

A peripheral circuit consisting of a day-growth MO3FET is provided on the Si epitaxial single crystal layer formed on the insulating film by providing a Si single crystal seed portion and using ELO technology. By providing such a peripheral circuit, the switching operation speed of the optically driven semiconductor device has been improved. In addition.

When a peripheral circuit is not provided, a solar cell element can be manufactured by forming only a Si polycrystalline layer on the insulating film without forming the seed portion.

(Effects of the Invention) According to the present invention, as described above, vertical MOS
A light-driven semiconductor device having an FET and a high-voltage output solar cell formed of a polycrystalline or single-crystalline Si layer formed by vapor phase growth via an insulating film is obtained. Such a light-driven semiconductor device is used by disposing the nine light-emitting elements so that they face each other in close proximity to each other.
Even solar cells using polycrystals can achieve sufficient photoelectric conversion efficiency.

The polycrystalline or single-crystalline Si layer of the above-mentioned high-voltage output solar cell is formed by a vapor phase growth method, so when amorphous Si formed by a discharge plasma method or Si single crystal formed by a laser melting crystallization method is used, In comparison, manufacturing costs are reduced and reliability is improved. Moreover, since the vertical MO5PET and the high voltage output solar cell are integrated on the same substrate, it is not necessary to provide a commonly used part of the pixel element on the substrate or adopt a common manufacturing process at the manufacturing stage. Can be done. Therefore, manufacturing costs are reduced compared to the conventional case where pixel elements are manufactured separately.

In addition, one photo-MO5 using the optically driven semiconductor device of the present invention
When manufacturing a relay, the number of chips to be mounted in the package of the photoMOS relay is reduced.

Therefore, the manufacturing cost of the photoMOS relay is reduced, and its reliability is improved due to its simple structure.

Furthermore, according to the present invention, an optically driven semiconductor device can be obtained in which peripheral circuits including a daybreak type MO3PET and the like are incorporated on the same substrate as necessary. Such a light-driven semiconductor device has a high switching operation speed and contributes to improving the performance of a photoMOS relay.

4. U Figure 1 is a partial cross-sectional view of a light-driven semiconductor device that is an embodiment of the present invention, Figure 2 is a partial cross-sectional view of the light-driven semiconductor device in the middle of manufacturing, and Figure 3 is a partial cross-sectional view of the light-driven semiconductor device that is an embodiment of the present invention. FIG. 4 is a partial cross-sectional view of an optically driven semiconductor device according to another embodiment of the present invention. FIG. 4 is a partial cross-sectional view of the optically driven semiconductor device in the middle of manufacturing.

1.13-n″″-Si (100) wafer, 2
, 14=n-3i engineered pitaxial single crystal layer, 5.15.
...p-3t well, 7°18, 27...Si0g gate insulating film, 8.19.28...poly-Si film, 9
．． 21...n''-5i diffusion layer in the source region of vertical MOS FET, 5', 16.''p-3i guard ring, 5-...p-Si diffusion layer of solar cell element, 9°
...n''-3i diffusion layer of solar cell element, 25...p
-Si layer, 29... n''-5i diffusion layer in the drain region and source region of the day-growth MO3FET, 29°... n''-3t diffusion layer of the solar cell element.

that's all

Claims (1)

[Claims] 1. A light-driven semiconductor device in which a vertical MOSFET and a high-voltage output solar cell are formed on the same substrate, wherein the high-voltage output solar cell is grown using a vapor phase growth method. A light-driven semiconductor device formed of a polycrystalline or single-crystalline Si layer formed by.