JPH0244474U - - Google Patents
Info
- Publication number
- JPH0244474U JPH0244474U JP12392088U JP12392088U JPH0244474U JP H0244474 U JPH0244474 U JP H0244474U JP 12392088 U JP12392088 U JP 12392088U JP 12392088 U JP12392088 U JP 12392088U JP H0244474 U JPH0244474 U JP H0244474U
- Authority
- JP
- Japan
- Prior art keywords
- input terminal
- synchronization signal
- circuit
- field discrimination
- clock input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Synchronizing For Television (AREA)
Description
第1図は本考案の一実施例を示す回路図。第2
図は第1図の動作を示すタイミングチヤート図。 2……外部同期信号発生器、4……FF、8…
…遅延回路、10……パルス幅延長回路。
図は第1図の動作を示すタイミングチヤート図。 2……外部同期信号発生器、4……FF、8…
…遅延回路、10……パルス幅延長回路。
Claims (1)
- 外部からの垂直同期信号と水平同期信号とをD
入力端子およびクロツク入力端子に供給されるF
Fと、このFFの出力端子がカメラ部の内部同期
信号発生回路に接続されたフイールド判別回路に
おいて、前記FFのクロツク入力端子に遅延回路
を接続するとともにD入力端子にパルス幅を延長
するパルス幅延長回路を接続したことを特徴とす
るフイールド判別回路。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12392088U JPH0244474U (ja) | 1988-09-20 | 1988-09-20 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12392088U JPH0244474U (ja) | 1988-09-20 | 1988-09-20 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0244474U true JPH0244474U (ja) | 1990-03-27 |
Family
ID=31373208
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12392088U Pending JPH0244474U (ja) | 1988-09-20 | 1988-09-20 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0244474U (ja) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62140559A (ja) * | 1985-12-13 | 1987-06-24 | Nec Home Electronics Ltd | フイ−ルド判定回路 |
-
1988
- 1988-09-20 JP JP12392088U patent/JPH0244474U/ja active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62140559A (ja) * | 1985-12-13 | 1987-06-24 | Nec Home Electronics Ltd | フイ−ルド判定回路 |