JPH024313B2 - - Google Patents

Description

[Detailed description of the invention] The present invention relates to a combination game machine.

Conventionally, a plurality of display devices, each capable of displaying several types of symbols, have been made to variably display the several types of symbols in accordance with the operation of a start switch portion, and have been made variable in accordance with the operation of a stop switch portion. A combination game machine is known that stops the display and dispenses prizes according to the combination of symbols on the plurality of display devices when the display is stopped.

In such combination game machines, once a player becomes skilled in operating the stop switch section, he or she will be able to combine symbols fairly accurately by pressing the stop operation button at the right time, making the game less monotonous and An extremely large amount of prizes will be awarded only from a specific combination game machine. By the way, in game arcades that have a large number of such combination game machines, it is common to limit the total amount of prizes given out for business reasons, so in order for a large number of players to enjoy the game, it is common to limit the amount of prizes given out by only certain people. It is undesirable for a person to win a particularly large amount of prizes.

The purpose is to provide a first delay circuit that makes it relatively easy to obtain a specific combination of symbols having a plurality of indicators in order to win a prize, and a second delay circuit that avoids a specific combination of symbols. To provide a combination game machine that changes the probability of "hitting" a specific symbol by changing the probability of hitting a specific symbol, thereby achieving harmony between a party receiving a profit from a game and a party giving it, and reducing the disparity in profits between gaming machines. It is to be.

FIG. 1 is a front view of the combination game machine. On the front of the combination game machine main body 1, three rotating disks 2 as display devices are arranged so as to partially overlap each other, and on the front of each rotating disk 2, several types of symbols 3 are arranged in a circumferential manner. They are arranged and drawn. Here, the number of symbols 3 on the left and right rotating disks 2 is 15
The number of symbols 3 on the central rotating disk 2 is 12. A cover plate 5 having a window 4 is disposed in front of the rotating disk 2.
This cover plate 5 is fixed to the main body 1. The rotating disk 2 is rotated by the operation of the start operation button 6 of the start switch section, and is rotated by the operation of the stop operation buttons 7, 8, 9 of the stop switch section for stopping each of the rotating disks 2, 2, 2 separately. will be stopped. The amount of prize medals to be ejected is determined by the combination of symbols 3 appearing on the window 4.
Ejected to 0.

FIG. 2 shows a rotational drive mechanism, a stopping mechanism, and a position detection mechanism as a symbol data detector for the rotating disk 2. As shown in FIG. Three support shafts 11 extending in the front-rear direction are rotatably supported on the main body 1, and a rotary plate 2 is fixed to the front end of each support shaft 11. A pulley 12 as a rotary drive wheel is rotatably supported on each support shaft 11, and each pulley 12 is connected to a pulley 15 provided on a drive shaft 14 via a belt 13. The drive shaft 14 is connected to a motor 16.

The rotational drive mechanism of the rotary disk 2 in this embodiment has four magnets 17 fixed on the end face of each pulley 12 at equal intervals in the circumferential direction, and a disk-shaped The magnetic plate 18 is connected to the rotating member 2
The motor 16 rotates the pulley 12, and the magnetic attraction force of the magnet 17 rotates the magnetic plate 18, and therefore the rotating disk 2.

As a stopping mechanism for the rotating disk 2, a stop plate 20 having an engagement recess 19 on its outer periphery is attached to the support shaft 11. The number of engaging recesses 19 is the same as the number of symbols on the corresponding rotary disk 2. Three stop levers 21 are supported on the main body 1 so as to be swingable about a shaft 22 (only one is shown here). One end 21A of the lever 21 is connected to a stop solenoid 23, and the other end 21B is formed to be engageable with the engagement recess 19 of each stop plate 20.

To stop the rotating disk 2, press the stop operation buttons 7, 8,
9 to energize the stop solenoids 23 corresponding to the respective operation buttons, the stop lever 21 is swung by the pressing force of the stop solenoid 23, and its end 21B is inserted into the engagement recess of the stop plate 20. 19
The stop plate 20 is engaged with the rotating disk 2 or the magnetic plate 1.
8 and is mechanically stopped.

The stop position detection mechanism (symbol data detector) of the rotating disk 2 includes a hole 24 in the stop plate 20 as a position indicator corresponding to the position and type of the symbol, and a light as a position detector provided in the main body 1. Detector 25
It consists of In this embodiment, each symbol is represented by a binary 4-bit signal. The photodetector 25 has two parallel plates sandwiching the stop plate 20, and a light emitting element as a light source is attached to one of the plates, and a light receiving element is attached to the other. Photodetector 2
Four pairs of light-emitting and light-receiving elements are attached every five. In such a photodetector 25, when the light emitted from the light emitting element passes through the hole 24 and is received by the light receiving element, the light receiving element emits an output, while on the other hand, when the light is blocked by the stop plate 20, the light receiving element emits an output. The light receiving element emits no output.

In the embodiment, such an output is a binary 1-bit signal, and since the light-emitting and light-receiving elements are composed of four pairs, the symbol is represented by a binary 4-bit signal.
It can also represent 15 different symbols.

FIG. 3 is a block diagram of a circuit that delays the stop timing of the rotary disk 2 in various states by operating the stop switch section. Such a circuit is provided for each rotating disk mechanism. Hereinafter, only one of the circuits will be explained, but the configuration and operation of the other circuits are exactly the same.

The stop signal indicated by in FIG.
+5V. Hereinafter, such positive voltage will be referred to as "H" and zero voltage will be referred to as "L". ) is the DC signal. This stop signal is input to a shift register 27 and a data comparison circuit 28 via an AND gate 26. The AND gate 26 is an AND circuit having two input terminals, the input terminal b of which is connected to the stop signal generation circuit, and the input terminal a of which is connected to the output terminal of the inverter 29. Further, the output terminal of the AND gate 26 is connected to the input terminal a of the shift register 27 and the terminal a of the data comparison circuit 28.

The delay control signal indicated by in FIG. 3 is a repetitive pulse signal generated by the delay control signal generation circuit periodically or as needed, and is input to the waveform shaping circuit 30. The waveform shaping circuit 30 is a circuit that shortens the rise time and fall time of the pulse waveform of the delay control signal, raises its voltage value to the "H" level logic level, and shapes the delay control signal into an ideal square waveform. . The output terminal of the waveform shaping circuit 30 is the input terminal a of the AND gate 31.
and is connected to the input terminal b of the determination circuit 32.

A portion surrounded by a dotted line 33 is a first delay circuit 33 that is controlled by the delay control signal and randomly delays the stopping operation of the rotating member by the stop signal. The oscillation circuit 34 is a circuit that generates a reference clock pulse signal for operating the shift register 27 and the subtraction circuit 35.
Generates a repetitive pulse wave that oscillates between “L” levels. The pulse width of this pulse wave is set smaller than the pulse width of the delay control signal described above. An output terminal of the oscillation circuit 34 is connected to an input terminal b of an AND gate 31 having two input terminals. The AND gate 31 is an AND circuit similar to the AND gate 26, and the input terminal a is the waveform shaping circuit 3.
0, and its output terminal is connected to the respective input terminals b of the shift register 27 and the subtraction circuit 35. As mentioned above, the input terminal a of the shift register 27 is connected to the output terminal of the AND gate 26, and its output terminal c is connected to the subtraction circuit 35.
is connected to input terminal a of. An output terminal c of the subtraction circuit 35 is connected to an input terminal a of the determination circuit 32. The shift register 27 is an 8-bit data storage circuit, and repeatedly counts the clock pulse signal applied to its input terminal b between 0 and 255. And shift register 27
When an "H" level signal is applied to the input terminal a of the shift register 27, the count number counted by the shift register 27 at that time is set as set data and outputted to the output terminal c. The subtraction circuit 35 converts the set data applied to its input terminal a by 1 for each pulse of the clock pulse signal applied to its input terminal b.
This circuit subtracts one by one and repeats the subtraction until the subtracted value becomes zero. When the subtracted value becomes zero, an "H" level output signal is generated at the output terminal c.

The part surrounded by the dotted line 36 is controlled by a delay control signal, and when the delay control signal is input, the symbol data signals from each position detector are compared, and when the combination is a specific combination, This is a second delay circuit that delays the stopping operation of the rotating member. The judgment circuits 32 and 37 are circuits having two input terminals a and b and two output terminals yes and no. This is a circuit that divides between yes and no. That is,
When an “H” level signal is input to input terminal a, if input terminal b is at “L” level, output terminal no.
“H” level is output to “H” level, and input terminal b is “H”
If the level is high, the "H" level is output to the output terminal yes. The output terminal no of the determination circuit 32 is connected to the input terminal a of the OR gate 38, and the output terminal yes is connected to the input terminal a of the determination circuit 37. The input terminal b of the determination circuit 37 is connected to the output terminal c of the data comparison circuit 28, its output terminal yes is connected to the terminal b of the data comparison circuit 28, and its output terminal no is connected to the input terminal b of the OR gate 38. .
The data comparison circuit 28 receives binary 4-bit symbol data signals D ₁ , D ₂ , D ₃ corresponding to the symbols 3 on each rotating disk from each photodetector 25 shown in FIG. It has been entered. The OR gate 38 is an OR circuit having two input terminals a and b, and its output terminal is connected to the input terminals of the solenoid driver 40 and the one-shot circuit 41, respectively.

A portion surrounded by a dotted line 39 is a stop circuit 39 for energizing the stop solenoid 23 to stop the rotating disk 2. The solenoid driver 40 connects the stop solenoid 23 to the standard voltage.
This is an output interface circuit for excitation with current, and its output terminal is connected to the stop solenoid 23.
is connected to the excitation coil.

The part surrounded by the dotted line 42 is a circuit for preventing malfunction. The one-shot circuit 41 is a circuit that outputs an "H" level output signal for a certain period of time when it receives an "H" level trigger signal at its input, and its output terminal is connected to the lamp driver 43 and the AND gate 26 via the inverter 29. Connected to input terminal a. The lamp driver 43 is an output interface circuit for lighting the stop lamp 44, and its output terminal is connected to the stop lamp 4.
Connected to 4. This stop lamp 44 is a lamp for indicating that the rotating disk 2 can be stopped, and when turned on, the stop operation is possible.

The circuit constructed as described above operates as follows to delay the time from when the stop operation button is pressed until the rotating disk is stopped in various states.

When the game starts and the rotating disk is rotating and a stop operation is possible, the input terminal a of the AND gate 26 is at the "H" level. When the player presses the stop operation button to stop the rotating disk 2, an "H" level stop signal is generated, and this stop signal is input to the input terminal b of the AND gate 26, but the input terminal a is also input to the input terminal a. Since the signal is at the "H" level, an output signal of the "H" level is output from the output terminal of the AND gate 26. When the delay control signal is not being generated, no clock pulse signal is input to the input terminal b of the shift register 27, so the shift register 27 is not counting and its set data is zero. Therefore, when the "H" level stop signal is input from the AND gate 26 to the input terminal a of the shift register 27, the set data of zero is applied to the input terminal a of the subtraction circuit 35. Since the subtraction value is zero in the subtraction circuit 35, an "H" level output signal is immediately outputted to its output terminal c, and this output signal is inputted to the input terminal a of the determination circuit 32. In the determination circuit 32, since no delay control signal is output, its input terminal b is "L".
“H” input to input terminal a because it is at level
The level signal is distributed to the output terminal no and sets the terminal to "H" level. As a result, the OR gate 38 outputs an "H" level signal, which activates the solenoid driver 40 to drive the stop solenoid 23. In this state where the delay control signal is not generated, when the player presses the stop operation button, the stop solenoid 23 is immediately driven and the rotating disk 2 is stopped.

Next, the case where the stop operation button is pressed while the delay control signal is being generated will be described. First, the operation of the first delay circuit will be described. Since the AND gate 31 is a circuit that outputs "H" when its two input terminals a and b are both "H", the pulse-like delay control signal is transmitted to the waveform shaping circuit 31.
is applied to the AND gate 31 via the clock pulse signal, a signal in which the delay control signal and the pulse signal from the transmitting circuit 34 are superimposed is outputted from the AND gate 31 as a clock pulse signal (note that the pulse of the delay control signal The width is set larger than the pulse width of the pulse signal of the transmitting circuit 34). This clock pulse signal is input to the input terminal b of the shift register 27.
will repeatedly count this clock pulse signal between 0 and 255. Now, when a stop signal is input to the input terminal a of the shift register 27 via the AND gate 26, the set data at that time is applied to the subtraction circuit 35. The value of this set data is a random number between 0 and 255 determined by the timing at which the stop signal is applied. The subtraction circuit 35 subtracts this set data one by one using the clock pulse signal received from the AND gate 31, and when the subtracted value becomes zero, it outputs an output signal to its output terminal c, but the time required for the subtraction is , the set data is a random number between 0 and 255, and the number of pulses of the clock pulse signal is also a random number determined by the relationship between the delay control signal and the output signal of the oscillation circuit 34. becomes. Therefore,
The time from when the stop signal is input to the AND gate 26 until it is output to the output terminal c of the subtraction circuit 35 is delayed by a certain random time necessary for the subtraction circuit 35 to subtract the set data. This is the first delay operation.

Next, the operation of the second delay circuit 36 will be described. First, it is assumed that the input terminal a of the determination circuit 32 receives an output signal from the first delay circuit 33, that is, a stop signal. When the delay control signal applied to the input terminal b of the determination circuit 32 is at the "L" level, the output signal from the subtraction circuit 35 is input to the stop circuit 39 via the output terminal no of the determination circuit 32 and the OR gate 38. The rotating disk 2 is immediately stopped. When the delay signal is at the "H" level, the output signal from the first delay circuit 33 is inputted to the input terminal a of the determination circuit 37 via the output terminal yes of the determination circuit 32. Now, the data comparison circuit 28 is a circuit that is activated by receiving inputs to terminals a and b, and the circuit 28 receives binary 4-bit symbol data signals D ₁ , D ₂ , D from each photodetector 25, respectively. ₃ is entered, and
Certain combinations of such symbol data signals are stored in advance. Note that each photodetector 25
From this point on, a symbol data signal is always generated regardless of whether the rotating disk is rotating or stopped. The data comparison circuit 28 compares the symbol data signal of the symbol 3 obtained by the photodetector 25 of the rotating disk 2 that was stopped first with the light detection of the rotating disk 2 that was pressed the stop operation button in order to stop. The symbol data signal of symbol 3 obtained by the device 25 is compared to see if it matches the specific combination described above, and if the symbol data signals match, an "H" level output signal is sent to the output terminal c. issue. Therefore, while the data match, the determination circuit 37 distributes the "H" level output signal from the determination circuit 32 to the output terminal yes and outputs it.
The data comparison circuit 28 repeats the data comparison. When the symbol data signals do not match, the output of the data comparison circuit 28 goes to "L" level, outputs an "H" level output signal to the output terminal no of the determination circuit 37, and activates the above-mentioned stop circuit 39 via the OR gate 38. to stop the rotating disk 2. Even if the stop signal is input to the input terminal a of the determination circuit 32 in this way, if the delay control signal is input to the input terminal b, the stop signal will be delayed until the data comparison circuit 28 repeats the data comparison. Therefore, the activation of the stop circuit 39 is delayed by the time it takes to repeat the same data comparison. This is the second delay operation.

The operation of the malfunction prevention circuit 42 is as follows. When an output signal is issued from the OR gate 38 to activate the stop circuit 39, this signal is also input to the one shot circuit 41. As a result, the output side of the one-shot circuit 41 changes from the "L" level to "H" level for a certain period of time.
level. As a result, the output side of the inverter 29, which had been at the "H" level, becomes the "L" level for a certain period of time. As a result, the input terminal a of the AND gate 26 connected to the output terminal is at "L" level for a certain period of time, and during that time, the AND gate 26 is closed and the stop signal cannot pass through the AND gate 26, causing the shift It is not input to input terminal b of register 27. Therefore, for a certain period of time after the rotating disk 2 is stopped, even if a stop signal is further input, the circuit shown in FIG. 3 will not be activated, and malfunctions can be prevented. Note that the lamp driver 43 will not be operated during this certain period of time, so the lamp 44 that was lit will be
is turned off to inform the player that a stop operation is not possible.

Although one embodiment has been described above, the idea of the present invention is to actuate the start switch section using a pachinko ball, and accordingly display symbols on the display in a variable manner, and to change the symbols when the display is stopped. It may also be applied to a pachinko game machine in which prize balls are ejected according to combinations.

Therefore, the present invention generates a stop signal in response to the operation of the stop switch section and a delay control signal that is independent of the operation of the stop switch section, and generates a stop signal under the control of the delay control signal. A first delay circuit is provided to randomly delay the stop operation of the display device, and in addition to this first delay circuit, symbols of a plurality of display devices are detected and corresponding symbol data signals are generated. , under the control of a delay control signal, compared with symbol data of a specific combination of symbols, which is a pre-stored prize winning condition,
Since we have provided a second delay circuit that delays the stop operation of the display device when the two match, the first delay circuit allows the variable speed of the display device to be adjusted at the point where the symbol expected by a skilled player is displayed. The state is set to a relatively high probability state that prevents the display from being stopped, but in the second delay circuit, the data comparison circuit generates a stop signal for the time it takes to repeat the data comparison using the delay control signal. Because of the delay, the specific symbol combinations are excluded from the prize winning conditions, so the probability can be changed by lowering the probability of winning the prize, that is, winning. From this, it is possible to achieve a sense of fairness to players by reducing the disparity in profits between gaming machines, while striving for profit and technical harmony between the players and the gaming hall management. .

[Brief explanation of drawings]

FIG. 1 is a front view of the combination game machine, FIG. 2 is an internal mechanism diagram, and FIG. 3 is a circuit block diagram of the main part of the present invention. 2...Rotating disk, 23...Stop solenoid, 25...Photodetector, 33...First delay circuit, 36...Second delay circuit, 39...Stop circuit.

Claims (1)

[Scope of Claims] 1. A plurality of display devices each capable of displaying several types of symbols are made to variably display the several types of symbols in accordance with the operation of a start switch portion, and the plurality of symbols are displayed variably in response to the operation of a stop switch portion. In a combination game machine that stops the variable display of display devices and dispenses prizes according to the combination of symbols of the plurality of display devices at the time of stopping, a symbol data detector that detects the type of object being displayed and generates a symbol data signal corresponding to the detected type; a stop signal generating circuit that generates a stop signal in response to the operation of the stop switch section; and an operation of the stop switch section. a delay control signal generation circuit that issues a delay control signal regardless of the delay control signal; a first delay circuit that is controlled by the delay control signal and randomly delays the variable display stop operation of the display device caused by the stop signal; comprising a data comparison circuit that compares a combination of symbol data detected by the symbol data detector when a control signal is inputted with a specific combination of symbol data stored in advance;
A combination game machine comprising: a second delay circuit that delays the stop signal by the amount of time during which the comparison is repeated when the combination is a specific combination.