JPH0239892B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a voltage controlled oscillator, and relates to a PLL (Phase
Related to voltage controlled oscillators used in locked loop) system circuits, etc.

Figure 1 shows the built-in stereo demodulation circuit, etc.
The IC equivalent circuit of a voltage controlled oscillator used in a PLL system is shown. This voltage controlled oscillator is provided with a differential pair 6 consisting of a pair of transistors 2 and 4 whose emitters are commonly connected, and a constant current is connected between the commonly connected emitters and a reference potential point (GND). source 8 is connected. An external connection terminal 12 is connected to the base of the transistor 2 via a base protection resistor 10, and a control input is provided from a current amplifier 14. External connection terminal 12
A capacitor 16 and a variable resistor 18 are connected as an oscillating element for applying a bias voltage to the base of the transistor 2. On the other hand, a bias circuit 32 consisting of transistors 20, 22, 24 and resistors 26, 28, 30 is provided at the base of the transistor 4. A transistor 34 having three collectors is installed on the collector side of the transistor 4 in order to take out the output current of the differential pair 6. One collector of transistor 34 is commonly connected to the base, and an output current taken from the one collector is applied to the base of transistor 20. Transistor 20 has two emitters, and a current taken out from one of the emitters is supplied to resistors 26 and 30. Therefore, this bias circuit 32
An upper limit bias voltage V _ha and a lower limit bias voltage V _La are generated at the connection point A in accordance with the conduction state and non-conduction state of the transistor 4, and these upper limit bias voltage V _ha and lower limit bias voltage V _La are alternately applied to the base of the transistor 4. Added. Further, the oscillation output of the differential pair 6 obtained through the other collector of the transistor 34 is applied to the frequency divider 36, frequency-divided, and then taken out.

In order to charge the capacitor 16 in accordance with the operation of the transistor 4, the transistor 2
A charging circuit made up of a resistor 38 is formed between the other emitter of 0 and the capacitor 16. Note that 40 and 42 are constant current sources that flow a constant current to the transistor 34 and the bias circuit 32;
A constant voltage V _reg is applied as a driving voltage to each circuit such as the differential pair 6 and the bias circuit 32 from a constant voltage source 44, and the constant voltage source 44 is composed of a transistor 46, a Zener diode 48, and a resistor 50.
A specific power supply voltage _Vcc is applied to the power supply terminal 52 from an external power supply.

Therefore, in this voltage controlled oscillator, a charging current flows from the transistor 20 to the capacitor 16 via the resistor 38, and the charging voltage of the capacitor 16 provides the base voltage of the transistor 2. This base voltage is the connection point A of resistors 26, 28, and 30.
When the upper limit bias voltage V _ha is exceeded,
Transistor 4 becomes non-conductive, and at this time,
Since transistor 34 and transistor 20 also become non-conductive, charging of capacitor 16 is released. Further, due to the non-conducting state of the transistor 20, the resistor 26 is placed in an open state, and the voltage at the connection point A shifts to the lower limit bias voltage V _La determined by the resistors 28 and 30, and the charging voltage of the capacitor 16 is discharged through the variable resistor 18. When the voltage generated at the external connection terminal 12 due to this discharge, that is, the voltage at the connection point B, decreases to the lower limit bias voltage V _Lb , which is lower than the lower limit bias voltage V _La , the transistors 4, 20, and 34 become conductive again. Then, the capacitor 16 is charged again. Therefore, an oscillation operation is performed by repeating the conduction and non-conduction of the transistors 2 and 4 and the charging and discharging of the capacitor 16, and the oscillation output is output from the collector side of the transistor 34, and is output from the frequency divider 36.
taken out through. In FIG. 2, A indicates a change in the voltage at the connection point A during the above operation, and B indicates a change in the voltage at the connection point B.

In the free-running oscillation operation of such a voltage controlled oscillator, when the voltage at the connection point B, which is the base voltage of the transistor 2, rises from the lower limit bias voltage V _Lb to the upper limit bias voltage V _hb , the voltage from the transistor 20 is transmitted through the resistor 38. A charging current (rush current) flows through the capacitor 16. This current is extremely steep as shown in A in FIG. 2, and its changes are large. Therefore, if the constant voltage source 44 is not provided with current supply capability for this current, the constant There was a risk that the voltage V _reg would fluctuate and the stabilization ability would be instantaneously lost. FIG. 3 shows the fluctuation of the constant voltage V _reg in this case, and the waveform B indicated by a broken line in the figure shows the change in the voltage at the connection point B. Therefore, in order to eliminate this inconvenience, it is necessary to set the current supply capacity of the transistor to a high value and to constantly supply an excess current that exceeds the current value required to maintain oscillation operation.This excess current causes the voltage controlled oscillator to This is a cause that hinders lower power consumption.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a voltage controlled oscillator that eliminates excessive current flow and achieves lower voltage and lower power consumption.

That is, the voltage controlled oscillator of the present invention includes first, second, and third constant current sources 78, 80, and 82 that generate a constant current when a power supply voltage is applied thereto, and a constant voltage source 68 to which a current is supplied and generates a constant voltage lower than the power supply voltage; and first and second voltage sources to which the constant voltage is applied from the constant voltage source to the collector side and whose emitters are commonly connected. a differential pair 6 consisting of transistors 2 and 4;
The constant voltage is applied to the collector side from the constant voltage source, and first and second resistors are provided on the first emitter side of the third transistor 20, which has a common base as the first and second emitters. 26 and 30 are connected in series, and the third transistor is made conductive by the output current of the differential pair taken out from the collector side of the second transistor.
The current flowing through the transistor generates an upper limit bias voltage at the connection point A' between the first and second resistors, and the fourth transistor 22 and the third resistor 28 to which the constant voltage is applied to the collector side. is connected in series to the second resistor 30, and generates a lower limit bias voltage at the connection point A' with a current flowing through the fourth transistor when the third transistor is non-conductive; When the second transistor is conductive, it is charged by the output current of the differential pair supplied from the second emitter side of the third transistor, and when it is not conductive, the fourth resistor (variable resistor 18) is charged. The second capacitor 16 is configured between the base and emitter of the fifth transistor 64 and the first
a first level shift circuit 60 that raises the charging voltage of the first capacitor with a base-emitter voltage generated by a constant current from a constant current source and applies it to the base of the first transistor; The upper limit bias voltage or the lower limit bias voltage of the bias circuit is raised by the base-emitter voltage generated by the constant current from the third constant current source. a second level shift circuit 62 applied to the base of the second transistor;
The second capacitor 88 is connected in parallel to the constant voltage source and suppresses fluctuations caused in the constant voltage due to the charging current flowing through the first capacitor.

Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 4 shows an embodiment of the voltage controlled oscillator of the present invention, in which the same parts as in FIG. 1 are given the same reference numerals. This voltage controlled oscillator is equipped with a differential pair 6 consisting of first and second transistors 2 and 4 whose emitters are connected in common, and a bias voltage is applied to the base side of the transistor 4. A circuit 32 is installed.

The bias circuit 32 includes a third transistor 2 having a common base and having first and second emitters.
0, fourth transistor 22, transistor 2
4, a first resistor 26, a second resistor 30, a third resistor 28, and a constant current source 42. That is, resistors 26 and 30 are connected in series between the first emitter of the transistor 20 and the reference potential point, and a resistor 28 is connected in series with the resistor 30. Therefore, since the output current of the differential pair 6 taken out from the collector side of the transistor 4 through the transistor 34 is applied to the base of the transistor 20, the bias circuit 32 has
The transistor 20 is switched to a conductive state or a non-conductive state depending on the output current, and an upper limit bias voltage V _ha or a lower limit bias voltage V _La is generated at the connection point A' in response to the switching. Further, the oscillation output of the differential pair 6 obtained through the transistor 34 is input to a frequency divider 36.

Then, on the base side of transistor 2, a fourth
A first level shift circuit 60 is installed, which has a variable resistor 18 installed as a resistor in the discharge circuit, and increases the charged voltage of the first capacitor 16 by a certain voltage and applies it to the base. , the upper limit bias voltage V _ha and the lower limit bias voltage V _La generated by the bias circuit 32
A second voltage is applied to the base by raising it by a certain voltage.
A level shift circuit 62 is installed. That is, the level shift circuit 60 is configured between the base and emitter of the fifth transistor 64, and converts the bias voltage given by the charging voltage of the capacitor 16 to the voltage between the base and emitter of the transistor 64, that is, by supplying a constant current. Then, the forward voltage drop V _f generated between the base and emitter of transistor 64 is pulled up and applied to the base of transistor 2 . Further, the level shift circuit 62 is configured between the base and emitter of the sixth transistor 66, and the connection point
The upper limit bias voltage V _ha and the lower limit bias voltage V _La generated by the bias circuit 32 are applied to A' as the base-emitter voltage of the transistor 66, that is,
By supplying a constant current, the forward drop voltage V _f generated between the base and emitter of the transistor 66 is pulled up and applied to the base of the transistor 4 .

A constant voltage source 68 is provided for driving the differential pair 6 and the bias circuit 32 with a constant voltage V _reg ', and this constant voltage source 68 is composed of diodes 74 and 76 connected in series. That is, due to the power supply voltage _Vcc applied through the power supply terminal 52, a constant current obtained in the first constant current source 78 is supplied to the diodes 74, 7 through the transistors 70, 72.
6, and a constant voltage V _reg ' lower than the power supply voltage V _cc is generated in the diodes 74 and 76 . This constant voltage V _reg ' is a value lower than the constant voltage V _reg of the constant voltage source 44 of the conventional circuit shown in FIG. 1 (V _reg '<
V _reg ).

Further, second and third constant current sources 80 and 82 are installed which generate constant current by supplying the power supply voltage _Vcc . From the emitter and constant current source 82 to the base of transistor 4 and the transistor 6 of level shift circuit 62
A constant current is supplied to emitter No. 6.

A stabilizing circuit 84 is installed in this voltage controlled oscillator to suppress fluctuations caused in the constant voltage V _reg ' of the constant voltage source 68 due to rush current flowing into the capacitor 16 during oscillation. A second capacitor 88 is connected between an external connection terminal 86 formed at the driving voltage application points of the differential pair 6, the bias circuit 32, and the transistor 34 and a reference potential point.

With such a configuration, since the level shift circuits 60 and 62 are added to the base input portions of the transistors 2 and 4 of the differential pair 6, the bias voltage to be applied to the bases of the transistors 2 and 4 is as follows. The voltage required is much lower than that required in the past, and stable oscillation operation can be obtained with this low value, and the constant voltage V _reg ' of the constant voltage source 68 can be set to a low value accordingly. Drive is realized. Further, by adding a stabilizing circuit 84 consisting of a capacitor 88 to the series circuit of diodes 74 and 76, the output voltage of the constant voltage source 68 is made constant and current consumption is reduced. While the conventional circuit required a current consumption of about several mA, the current consumption was reduced to about 200 μA in the circuit of this embodiment. Even if the current is reduced in this way, the fluctuation in the constant voltage V _reg ' of the constant voltage source 68 caused by the rush current flowing into the capacitor 16 during oscillation can be effectively eliminated by adding the stabilizing circuit 84. Can be done. In other words, during free-running oscillation, the voltage at connection point B' changes from the lower limit bias voltage V _Lb to the upper limit bias voltage.
The inrush current flowing into the capacitor 16 when reaching V _hb can be removed by the capacitor 88 absorbing the fluctuating current. As a result, stable free-running oscillation can be performed with a drive current that is a fraction of the current of conventional circuits, and the current consumption can be reduced in various electronic circuits such as FM stereo demodulation ICs. This makes it possible to extend battery life, especially in portable radios and tape recorders that have built-in batteries.

As explained above, according to the present invention, the output voltage of the constant voltage source is stabilized by the inrush current flowing through the first capacitor as the oscillation element, so there is no need for excessive current, and the low voltage stabilizes the output voltage. In addition to being able to maintain the oscillation operation, it is possible to reduce power consumption, and it is possible to extend the battery life of small audio equipment such as portable radios and tape recorders that use batteries as a driving power source.

[Brief explanation of drawings]

Figure 1 is a circuit diagram showing a conventional voltage controlled oscillator.
2 is a diagram showing the operation of the voltage controlled oscillator shown in FIG. 1, FIG. 3 is a diagram showing fluctuations in the output voltage of the constant voltage source used in the voltage controlled oscillator shown in FIG. The figure is a circuit diagram showing an embodiment of the voltage controlled oscillator of the present invention. 2...First transistor, 4...Second transistor, 6...Differential pair, 16...First capacitor, 18...Variable resistor (fourth resistor), 20...
...Third transistor, 22... Fourth transistor, 26... First resistor, 28... Third resistor, 30... Second resistor, 32... Bias circuit, 60... First Level shift circuit, 62...
Second level shift circuit, 64...Fifth transistor, 66...Sixth transistor, 68...
constant voltage source, 78... first constant current source, 80... second constant current source, 82... third constant current source, 84...
...Stabilization circuit, 88...Second capacitor.

Claims (1)

[Scope of Claims] 1. First, second, and third constant current sources to which a power supply voltage is applied to generate a constant current; and the constant current is supplied from the first constant current source to generate a constant current to which the power supply voltage is applied. a constant voltage source that generates a lower constant voltage; and a first source to which the constant voltage is applied to the collector side from this constant voltage source and whose emitters are commonly connected.
and a differential pair consisting of a second transistor, and a third transistor to which the constant voltage is applied from the constant voltage source to the collector side and has a common base and first and second emitters. Connect the first and second resistors in series to the emitter side of the
The output current of the differential pair taken out from the collector side of the second transistor makes the third transistor conductive, and the current flowing through the third transistor connects the first and second resistors. A fourth transistor to which an upper limit bias voltage is generated at a point, and a fourth transistor to which the constant voltage is applied to the collector side and a third resistor are connected in series to the second resistor, and the third transistor is non-conducting. a bias circuit that generates a lower limit bias voltage at the connection point with a current flowing through the fourth transistor; and a bias circuit that generates a lower limit bias voltage at the connection point with a current flowing through the fourth transistor; The first resistor is charged by the output current of the differential pair and discharged through the fourth resistor when the differential pair is non-conducting.
and a fifth transistor between the base and emitter, and the charging voltage of the first capacitor is raised by the base-emitter voltage generated by the constant current from the second constant current source. A first level shift circuit applied to the base of the first transistor and a base-emitter of a sixth transistor, which is generated by a constant current from the third constant current source. a second level shift circuit that raises the upper limit bias voltage or the lower limit bias voltage of the bias circuit with a voltage and applies it to the base of the second transistor; and the first capacitor connected in parallel to the constant voltage source. A voltage controlled oscillator comprising: a second capacitor that suppresses fluctuations caused in the constant voltage due to a charging current flowing through the oscillator.