JPH0239770A - Picture editing device - Google Patents

Abstract

PURPOSE:To edit pictures much complicated than before by generating a picture editing signal whose picture element and a line have been delayed, corresponding to an applied picture processing circuit in a circuit to generate the picture editing signal on a real time basis. CONSTITUTION:In a picture editing processor to execute, for example, trimming or picture inversion for one part of a picture signal, for example, a normal mode is set at a table 1, and a negative mode is set at a table 2 in a log converting part 200, and they are switched by an editing signal 210. In a trimming part 202, an editing signal 213 executes the trimming processing of a binary picture signal. In an edge emphasis/smoothing part 201, the processing is executed by using the both data of a notable picture element and a circumferential picture element. For this reason, the picture signal delays for approximately two lines. Consequently, since editing signals 211, 212 and 213 are necessary to be delayed, the delayed editing signal B is used.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to an image editing processing device that trims a part of an image signal or inverts the image, and particularly relates to an image editing processing device that generates timing signals necessary for image editing in such a device. related to circuits.

[Conventional technology]

Conventionally, in order to manipulate image signals and perform various image processing in real time, an image editing signal is set in a RAM or the like, and image processing is switched by switching banks of the RAM (there is an image editing signal generation circuit).

[Problem that the invention is trying to solve]

However, in systems with multiple image processing units, image signal delays may occur at each stage of each of the multiple image processing units, and conventional image editing processing circuits cannot handle such complex systems. .

That is, in each stage of the plurality of image processing units, a delay time necessary for processing at each stage occurs. Therefore, if you try to process an image signal corresponding to a predetermined area of the image by switching the processing state at multiple stages, such as color conversion and spatial filtering, and simultaneously switch each stage of the circuit, the above-mentioned delay time will cause The timing of the processing of the image signal at each stage will be different, resulting in a problem that the accuracy (image editing) cannot be performed. An object of the present invention is to provide an image processing device that allows editing to be performed with high precision.

[Means to solve the problem]

In order to achieve the above-mentioned object, the image processing apparatus of the present invention is an image editing apparatus having a generating means for generating an image editing signal for editing an image signal, wherein the generating means responds to the delay of each stage of the image processing circuit. It is characterized by generating an image editing signal.

[For production]

In the above configuration, the generating means generates an image editing signal according to the delay of each stage of the image processing circuit.

〔Example〕

Hereinafter, the configuration of an embodiment of the image editing signal generation circuit according to the present invention will be described in detail with reference to FIGS. 1 to 11 of the accompanying drawings.

(Description of Outer Shape) FIG. 1 shows the outer shape of a digital color copying machine 10 to which an embodiment of the image recording device according to the present invention is applied.

This digital color copying machine 10 is roughly divided into two elements. That is, this copying machine 1O has one main component: a color image scanner (hereinafter abbreviated as "league section") 1, which is located above and reads a document image in color and outputs digital color image data.
2. Within this League Division 12, digital
A controller unit 14 is built in, which performs various types of image processing on color image data and has processing functions such as interface with external devices.

The league part 12 is located under the document holding plate 16 and serves as a mechanism for reading images of three-dimensional or sheet-like originals placed face down on a document table (not shown), as well as for reading large-sized sheet-like originals. It also has a built-in Also, League Division 1
An operating section 18 connected to the controller section 14 is provided on one side of the top surface of the copying machine 2, and this operating section 18 is provided for inputting various types of information regarding the copying machine.

The controller unit 14 controls the league unit 12 and the printer unit 2 (described later) according to information input via the operation unit 18.
0 regarding these operations. Furthermore, when it is necessary to perform complicated editing processing, etc., a digitizer or the like is attached in place of the document presser plate 16, and this is connected to the controller section 14, thereby making it possible to perform advanced image processing.

The copying machine 10 also has a printer section located below the league section 12 for recording color digital image signals outputted from the controller section 14 on recording paper. It is equipped with 20. In this embodiment, the printer section 20 is
Full-color ink recording using the ink bubble jet recording head described in Publication No. 936.
Jet printers are used.

The above-mentioned two main elements can be separated from each other, and can be installed at separate locations by extending the connecting cable.

(League Division) Figure 2 shows the digital color copying machine 10 shown in Figure 1.
FIG. 2 is a cross-sectional view schematically showing the internal configuration of the device when viewed from the side.

First, in the league unit 12 of the copying machine IO, an exposure lamp 22, a lens 24, and an image sensor 26 (C0D in this embodiment) capable of reading line images in full color are used to place an original on a glass platen 28. An image of the original document, an image projected by a projector, or an image of a sheet-like original document by the sheet feeding mechanism 30 is read.

Next, in this way, various image processing is performed by the league unit 12.
This is performed by the controller unit 14, and then the read image is recorded on recording paper by the printer unit 20.

(Printer Section) Here, in FIG. 2, the recording paper is stored in a paper feed cassette 32 that stores cut sheets of small standard sizes (A4 to A3 size in this embodiment) and large size (A2 in this embodiment). Roll paper 3 for recording (up to A1 size)
4 is selectively supplied.

Also, paper feeding is carried out by inserting the recording paper one sheet at a time from the manual feed slot 36 shown in FIG. 1 along the paper feeding section cover 38.
Paper feeding from outside the device (manual paper feeding) is also possible. In addition, a paper feed cassette 32 installed in the printer section 20
A pick-up roller 40 for taking out cut sheets one by one from the paper feed cassette 32 is disposed above the paper feed cassette 32. The cut paper taken out by the pick-up roller 40 is conveyed to a paper feeding roller 44 by a cut paper feed roller 42.

On the other hand, the roll paper 34 is continuously fed out by a roll paper feed roller 46, cut into a standard length by a cutter 48, and conveyed to the above-mentioned paper feed roller 44. Similarly, the recording paper inserted through the manual feed slot 36 is conveyed to the 10th paper feed roller 44 by the manual feed roller 50.

Here, the above-mentioned pick up roller 40° cut paper feed roller 42, roll paper feed roller 46, paper feed first
The 0-ra 44 and the manual feed roller 50 are connected to a paper feed motor (not shown).
In this embodiment, the rollers are driven by a DC servo motor (a DC servo motor is used), and the rotational drive can be controlled on and off at any time by electromagnetic clutches attached to each roller.

Here, when the printing operation is started in response to an instruction from the controller section 14, the recording paper selectively fed from any of the above-mentioned paper feeding paths is conveyed to the paper feeding path 44. In addition, in order to remove the skew of the recording paper,
When feeding the paper, after forming a predetermined amount of paper loops on the recording paper, the paper feeder 44 is turned on and rotated.
Next, the recording paper is conveyed to the paper feeding number 20-ra 52.

Further, between the paper feed box 10-ra 44 and the paper feed number 20-ra 52, a paper feed roller 64 disposed above the recording head 56 and a paper feed roller 64 disposed below the paper feed number 52 are provided. In order to perform an accurate paper feeding operation between the recording paper and the roller 52, the recording paper is configured to slacken a predetermined amount to create a buffer. A buffer amount detection sensor 54 is disposed in this buffer to detect the buffer amount as the amount of slack in the recording paper. By constantly creating a buffer in the recording paper during paper transport in this way, the paper feed roller 64 and the paper feed roller 5, especially when transporting large size recording paper, can be
2 can be reduced, and accurate paper feeding operation becomes possible.

In the printer section 20 configured with the recording paper conveyance system as described above, when printing is performed by the recording head 56, the scanning carriage 58 to which the recording head 56 is mounted
is configured to move back and forth on a carriage rail 60 by a scanning motor 62 to perform scanning in the main scanning direction. In the forward scan, an image is printed on the recording paper by the recording head 56, and in the backward scan, the paper feed roller 64 performs a feeding operation in the sub-scanning direction to feed the recording paper by a predetermined amount.

Here, the feed amount along the sub-scanning direction is defined as a rated movement amount, which will be described later.
In other words, although not shown, the length corresponds to the width of the suction holes formed across the surface of the platen 74 facing the recording head 56. It is set. Regarding this suction hole, the 11th
This is similar to the suction hole provided in the suction mechanism in the prior art described with reference to FIGS. A to 11C, and the description thereof will be omitted.

On the other hand, during this return scan, while detecting the buffer amount via the buffer 1 detection sensor 54, the drive system is controlled by the paper feed motor 62 so that the buffer amount is always a predetermined buffer amount. ing.

The printed recording paper is then discharged to the paper discharge tray 66, completing a series of printing operations.

(Configuration around the operation carriage) Next, the configuration around the scanning carriage 58 will be explained in detail using FIG. 3.

In FIG. 3, a paper feed motor 68 is provided as a drive source for intermittently feeding the recording paper along the sub-scanning direction. The rotation amount of this paper feed motor 68 can be arbitrarily set and changed, and the paper feed motor 68 is connected to the paper feed 20th roller 5 through the paper feed roller 64 and the paper feeding 20th roller clutch 70.
2.

Further, the aforementioned scanning motor 62 is provided as a drive source for causing the scanning carriage 58 to scan along the main scanning direction indicated by arrows A and B via the scanning belt 72. In this embodiment, as described above, since accurate paper feed control is required at an arbitrary feed amount, the paper feed motor 68 is
, a pulse motor is used for the scan motor 62.

Here, when the recording paper reaches the 20th paper feeding roller 52, the clutch 70 for the 20th paper feeding roller and the paper feed motor 68 are turned on, and the leading edge of the recording paper is held between the pair of paper feeding rollers 64. The paper is conveyed on the platen 74 until it reaches the end. and,
A paper detection sensor 76 provided on the platen 74 detects that the conveyed recording paper has passed over the platen 74, and the sensor information is used for position control, jam control, and the like.

When the leading edge of the recording paper reaches the paper feed roller 64, the clutch 70 for the 20th paper feed roller and the paper feed motor 68 are turned off, and then the space inside the platen 74 is filled by the activation of a suction motor (not shown). Negative pressure is created and suction operation is started. Due to this suction operation, the recording paper is pulled onto the platen 74.
It will be attached to the top.

Here, prior to the image printing operation on the recording paper, the scanning carriage 58 is moved to the position where the home position sensor 78 is disposed, and then forward scanning is performed in the direction of arrow A. In this forward scanning, each ink of cyan, C, magenta, M, yellow, Y, and black is ejected from the recording head 56 as appropriate from a predetermined position.
The image is recorded (printed).

After completing the image recording operation for a predetermined length along the main scanning direction, the driving direction of the scanning motor 62 is reversed, and the scanning carriage 58 is moved in the direction indicated by arrow B in the opposite direction to start backward scanning. do. The scanning motor 62 is then driven in the reverse direction until the scanning carriage 58 returns to the position where the home position sensor 78 is located. During this backward scanning, the length along the sub-scanning direction recorded by the recording head 56 (
That is, the paper feed operation by the width of the recording head 56 is performed in the sub-scanning direction shown by arrow C by starting the paper feed motor 68 and rotationally driving the paper feed roller 64.

Here, although the details will be described later, the above-mentioned paper feed amount, that is,
The amount of movement in the sub-scanning direction is not set only to the width of the recording head 56 described above, that is, the amount of constant test movement (although it may be set to the one-way amount of movement defined by the final line width).

In this embodiment, the recording head 56 is an ink jet nozzle of the type previously described, with 256 nozzles
, M, C, and K, respectively.

On the other hand, when the scanning carriage 58 stops at the home position defined by the home position sensor 78,
A recovery operation of the recording head 56 is performed. This recovery operation is a process to perform a stable recording operation, and in order to prevent unevenness at the start of ejection caused by changes in the viscosity of ink remaining in the nozzles of the recording head 56, paper feeding time,
Pressure is applied to each nozzle of the recording head 56 according to pre-programmed conditions such as the temperature inside the device and the ejection time.
This is a process in which ink is idle-discharged from each nozzle.

By repeating the operations described above, an image is recorded over the entire surface of the recording paper.

(System Configuration) Next, image signal processing and control of the control system in the digital color copying machine 10 of this embodiment will be described with reference to FIGS. 4A to 4C.

In FIG. 4A, reference numeral 100 indicates a main CPU as a main controller that controls the entire apparatus. Connected to this main CPU 100 are a printer control CPU 102 that controls printer control operations, a reader control CPU 104 that controls reading control operations, a main image processing section 106 that processes image display operations, and an operation section 108 that serves as an input section for the operator. ing. Here, the printer control CPU 102 and the league control CPU 104 control the printer and reader operations, respectively, and the main CPU
100 is set in a master-slave relationship.

The main image processing unit 106 described above is configured to perform processing such as edge emphasis smoothing, masking, black extraction, binarization, and trimming. Also, printer control C
A synchronous memory 110 is connected to the PU 102 and the main image processing unit 106. This synchronous memory 110 is configured to absorb time variations in input operations and to correct delays due to the mechanical arrangement of the recording heads described above.

This synchronous memory 110 is connected to a recording head 56 as an ink bubble jet head. on the other hand,
The printer control CPU 102 is connected to a printer drive system 114 that controls the input drive of the printer.

The league control CPU 104 is also connected to an input system image processing unit 116 that performs necessary correction processes in the reading system such as shading correction, color correction, and γ correction, and a league unit drive system 118 that controls the input drive of the reader. has been done. Further, a CCD line sensor 26 is connected to the input system image processing section 116 described above, and this input system image processing section 11
6 is connected to the main image processing section 106 mentioned above.

Here, the main CPU 100. League control CPU104
, a main image processing section 106, an operation section 108, an input system image processing section 116, a league section drive system 118, and a CCD line sensor 26 as an image sensor. In addition, the printer control CPU
102, synchronous memory 110, recording head 56, and
The printer section 20 is composed of a printer section drive system 114.

Next, referring to FIG. 5, the configuration of the main image processing section 106 particularly related to the present invention will be explained. In Figure 5, 200
201 is an edge enhancement/smoothing unit; 202 is a color conversion unit; 203 is a black extraction unit; 204, 20
5 is a masking unit and a γ correction unit that correct the output characteristics of the printer; 206 is a binarization unit that performs binarization processing; and 207 is a trimming unit. Log conversion unit 200, γ correction unit 205
is a lookup table, and two types of conversion tables can be set for each. For example, in the log conversion unit 200, table l is set to normal mode and table 2 is set to negative mode, and this is set in the editing signal 210.
Switch with . Similarly, in the γ correction section, table 1 is set to normal mode, table 2 is set to photographic mode, and switching is performed using editing signal 213. The color conversion unit 202 performs processing such as single color mode and color conversion mode, and converts the editing signal 211
Turn it on and off. When ON, each mode set in advance by the CPU operates, and when OFF, normal images are played. In the trimming section 202, the editing signal 2
At step 13, the binary image signal is trimmed. Edge enhancement and processing in the smoothing unit 201 (processing is performed using data of both the pixel of interest and pixels around it)
Due to this, the image signal is delayed by about two lines. Therefore, since the editing signals 211, 212, and 213 also need to be delayed accordingly, the delayed editing signal B is used.

220 is an image editing signal generation circuit that outputs editing signals 211, 212, and 213.

Next, a configuration example and timing of the editing signal generation circuit 220 shown in FIG. 5 will be explained using FIG. 6.

Timer 150, 153, 154, 155, 161, 17
1.172 is Intel's 8255 programmable timer counter, and mode in the figure indicates its operating mode, and a detailed explanation of its operation will be omitted as it is described in the manual.

Timer 150, selector 151 SD type F/F152
, timer 153, 154, D type F/F 156, 15
7, NOR gate 159, counter 164, memory 16
3, D type F/F162, D type F/F 158,
A circuit comprised of a timer 155.degree. 161, an inverter 160, and an AND gate 165 is a circuit for generating a BVE signal indicating an image valid section of main scanning. BVE
The signal is gate signal to timer 150=BTE signal (CP
The drive pulse clock of the main scanning motor 62 after U is input (set at the output port) = PMCK is counted by a predetermined clock, and then the count-up output signal = PM
TG signal or sensor 78 placed on the main scanning rail
signal=PGS signal is selected by selector 151 (signal RG
SE) It is possible.

If the PMTG signal is selected, it is possible to produce an image based on an arbitrary movement distance of the reading system, and if the RGS signal is selected, it is possible to produce an image based on the mounting position of the sensor.

An example of a timing chart when the GTE signal is selected is shown in FIG. 6-b. PM after GTE signal is input
It shows how the PMTG signal is generated after counting the number of clocks of the CK signal by the clavicle set by the CPU.

When the GTE signal is selected, a minimum amount of run-up (until the main scanning speed reaches a constant speed) is required from any position on the document table, so that the scanning time can be shortened. Furthermore, when the RGS signal is selected, accurate reading is possible without being affected by vibrations of the drive system. Both are used as needed.

D type F/F152, 156, 157, timer 153
The circuit consisting of ゜154 uses a constant frequency clock CL.
This circuit divides the frequency of the KA signal to delay the trigger ITP signal by an arbitrary amount of time, and is an effective circuit when editing images. In this embodiment, the timers 153 and 154 are provided in two stages, so that the range of delay time can be varied finely and over a wide range.

The H3I signal output from the D type F/F157 is C
Synchronization signal that controls the CD reading cycle = H3H3 signal This is a signal for synchronizing the counter 1 by the H3I signal.
64 loads (count initialization in this case) are performed.

This makes it possible to match the image reading position for each main scan with the storage time period of the CCD, making it possible to perform accurate reading operations.

The counter 164 generates the H3 signal (the time period from starting counting to counting up from the initial value), and the count value (Q output) is also used as an address signal for accessing the memory 163. A timing signal is written in the memory 163 in advance, and the D type F/
After data is latched at F162, signals for timing control of the editing circuit, etc. are generated.

The timer 155 counts the H8 signal and generates an interval signal=BVEO signal corresponding to the H3 signal pulse set by the CPU. As for the BVEO signal, a timer 161 generates a signal delayed by the number of leading edge pulses, and an AND gate 162 converts it into a final main scanning interval signal=BVE signal.

The reason for cutting the beginning part of the BVEO signal in this way is to take into account the delay in the cut image processing of dust images when the CCD is initialized, and to prevent unnecessary images from being captured in the BVE signal valid section. It's for a reason. A timing chart up to the generation of the BVE signal is shown in FIG. 6-a.

Next, the lower half of FIG. 6-a, the editing signal generation block, will be explained.

The timers 171 and 172 count the H8 signal and generate a pulse when a predetermined number of pulses are counted.

In this embodiment, the timer 17 is set to reduce the load on the CPU.
1 and 172 operate alternately to ensure a time period from when the timer counts up until one of the timers counts up, and a margin until the CPU sets the next count value.

Since the SR clutch 70 is set (Q output is 1) by the BVEO signal via the AND gate 168, in this embodiment, when the BVEO signal is enabled, the timer 172 is set.
should start working first.

Timer 171. 172 counts up, D type F/F1 is output via NAND gate 173.
A rising pulse of the BCHG signal enters the clock input of 67, and an interrupt is requested to the CPU by the 1NTR signal at the Q output. When the CPU accepts an interrupt, the ICR
*Gives a negative pulse to the signal and clears the lNTR signal,
Prepare for the next interrupt.

The CPU sets the count values of the timers 17 and 172 for each interrupt, and writes address information of one of the plural editing timing data written in advance in the memory 179 to the D type F/F 175. D type F/
The address information written to F175 is the next timer 1.
D type F/F176 with count up of 71,172
latched to. Since the D type F/F 176 is cleared by the BVEO signal, in this embodiment, the edit timing data at address 0 is selected first.

The counter 177 is a counter that generates an address signal for accessing edit timing data, and when it is loaded with the EDLD* signal from the D input address, the counting operation is repeated every cycle by the EDCK signal.

The selector 178 is a circuit that switches between the signal from the Q output of the counter 177 and the address signal from the CPU, and controls the select signal (MDS signal) to preset the contents of the memory 179 (.

The memory 179 uses a random access memory in this embodiment, and is a memory for dividing the memory space into a plurality of blocks and storing necessary editing timing data for each block. The contents of memory 179 are rewritten via bus transceiver]82.

When editing an image, select input A of the selector 178 and input the timing signal read from the memory to the D type F/F.
The edit signal A1 is latched at 180 and sent to the image processing circuit as the edit signal B via the line delay circuit 181.

This is because by generating the EDLD* signal and the EDCK signal in the memory 163, the memory 179 can be accessed in any period between the H5 signals and only the necessary portion, and the memory capacity of the memory 179 can be reduced. The situation is shown in the timing signal section of FIG. 6-c.

Furthermore, in a color copying machine to which the present invention is applied, one pixel data is separated into Y, M, C, and Bk components, and these are serially processed in sequence in 4 clocks of the VCK signal.
The memory capacity of the memory 179 can be further reduced by dividing the signal l clock by four and using a signal with a period equal to four VCK signal clocks.

An operation timing chart of the editing signal generating section described above is shown in FIG. 6-d. It can be seen that the CPU can control with sufficient margin.

Next, in an embodiment of the present invention, the operation procedure of each of the above-mentioned circuits will be explained by the main CPU 100. Printer control CPU 102,
The contents of the copy sequence executed in the league control CPU 104 will be explained using FIGS. 7 to 10. First, when the start key of the operation unit 108 (shown in FIG. 4) is pressed, the copy sequence task is called and processing is started. First, in step 1, the operation section 1
The copy area is set based on the data set in step 08, such as the original size, magnification ratio, paper size, and area designation. Here, area designation is a function that allows specific image processing to be performed only within an arbitrary area within a document by setting the coordinate values of a certain area and the image processing method within that area using the operation unit. As an example, in Figure 9, area 1 is set to cyan monochrome mode that outputs an image in cyan monochrome, area 2 is set to negative/positive inversion mode, and area 3 is set to masking mode where the area is blanked out. FIG.

Next, in step 2, data necessary for initial setting is transmitted to the league control CPU, that is, initial communication to the league section 12 is executed. Furthermore, in step 3, data necessary for initial settings is transmitted to the printer control CPU 102.

Continuation < 5 In TEP4, area information setting is performed to calculate area information in one scan. This will be explained in detail in FIG.

First, at TEP4-1 in FIG. 8, the area existing in the current line is determined. For example, the I scan line in FIG. 9A includes area 01, which is the entire original document, and all of the set areas I and 2.3, so these are registered. Next, in 5TEP4-2, 1
Divide the line into each registered area boundary a (0
), a (IL . . . a [:n) small area is formed. For example, in area a [3], the upper half is 12
Eight pixels are a normal image, and the lower half is a negative image. Continuing (in STEP 4-3, edit interval corresponding to the width of small area a (n'l) int [0], 1nt (1
), -1nt l:n) are calculated. 5 more TE
At P4-6, information corresponding to the small area a[n] is written into the editing memory 179. For example, at the time of the l scan line in FIGS. 9A and 9B, a [0], a (
2).

a[4], aI:6], area 01, that is, normal image processing settings are performed for 270 images. a
For [1], set the color conversion section 202 in Fig. 5 to ON, and for a[3], set the bank of the log conversion section to the negative side for 128 pixels in the lower half, and for a[3], set the bank of the log conversion section to the negative side. 5], settings are made to turn on the image trimming section 207, respectively. Therefore, the relationship between information in the editing memory and addresses is as shown in FIG. 9C.

Next, in 5TEP4-5, timer 1 shown in FIG.
72, timer 173 int (0), int [1
), respectively. When the BVEO in FIG. 6 is in the active state, that is, when the main scanning operation starts and the image begins to flow, the timer 172 first counts H3int[01 times, then generates an interrupt signal to the main CPU, and then waits for H3int (1). is activated.

Finally, in 5TEP4-6, the edit memory address where the information corresponding to a (1) is written is set in the address latch 175. In the example shown in FIG. 9, 270 is set and is loaded into an address in the memory 179 every time an interrupt signal is generated by the timers 171 and 172.

After the processing in 5TEP4 is completed, 5TEP5
Proceed to set image processing parameters. Here, an edge emphasis section 2011, a color conversion section 202, a masking section 20
4. Parameters related to image processing such as the γ correction unit 205 and the binarization unit 21 are set. In the example of FIG. 9, the cyan single color mode is specified in area l, so when the color conversion unit 202 is turned on by the editing signal, the parameters are set so that the mode is set.

Next, at 5TEP6, wait until the league section and printer section are in a scan ready state, and then at 5TEP7, a start signal is sent to each of the reader and printer so as to synchronize them.

When the main scanning starts and BVEO becomes high, the timer 172 starts counting up. int[0]
When the count ends, the FIF 167 generates an interrupt signal 1NTR to the CPU, which causes the 5TEP8 interrupt process to be performed. This will be discussed in detail in FIG. In FIG. 1O, 5TEP8-1, the timer 171. 172, and if it is timer 171, 5TEP8-
2 to tie 7171 next interval int [:x]
If not, the timer 172 is set at 5TEP8-3.

Next, in 5TEP8-4, the next edit memory address is set in the address latch 175, and in 5TEP8-5, the interrupt clear signal ICR* is turned ON and OFF to clear the interrupt signal 1NTR and end the interrupt processing. This process is repeated until the main scanning is completed.

In the example in FIG. 9B, timer 172 is int
[An interrupt occurs after counting 01 times a [1]
The memory address for is loaded and timer 171 is activated. Here, int (2) is set in the timer 172, the memory address for a[2] is set in the address latch 175, and the process is continued in the same manner until reaching a[6].

5TEPII determines whether the main scan is complete, and after completion, proceeds to 5TEPI2, determines whether all area scanning has been completed, and if not, 5TEPI4.
Return to , and then finish the copy operation.

As explained above, this embodiment is a circuit that generates an image editing signal for manipulating an image editing signal, and is characterized in that the applied image processing circuit operates in a period required to generate the image editing signal. The present invention relates to an editing signal, and the means for operating the image processing circuit in sections is not limited.

For example, signals EDLD*, EDCK that operate the editing circuit
In the embodiment described above, memory is used as a means for generating , but this may be replaced by hard logic.

Furthermore, although this embodiment describes an example in which the present invention is applied to a digital color copying machine, the present invention is of course not limited to this application. May be applied.

As explained above, the embodiment is a circuit that generates an image editing signal for manipulating an image signal, and is characterized in that the image editing signal is generated in accordance with the delay of the applied image processing unit. The invention relates to a circuit, and the means for delaying an image editing signal is not equally limited.

Furthermore, although one line delay is provided in this embodiment, it is conceivable to provide a plurality of delay means in order to accommodate a more complicated honeyd structure.

Further, in this embodiment, an example in which the present invention is applied to a digital color copying machine has been described, but of course, as described above, the present invention is not limited to such an application.

As explained above, according to this embodiment, in a circuit that generates an image editing signal in real time, it is possible to generate an image editing signal with pixel and line delays depending on the applied image processing circuit. This has the effect of making it possible to perform more complex image editing than ever before.

〔Effect of the invention〕

As described above, according to the present invention, editing can be performed with good accuracy without being affected by delays in each stage of the image processing section.

[Brief explanation of the drawing]

Fig. 1 is a perspective view showing the external appearance of a device according to an embodiment of the present invention, Fig. 2 is a sectional view of the device shown in Fig. 1, Fig. 3 is an enlarged view of the vicinity of the herad carriage, and Fig. 4 is a 1. FIG. 5 is a block diagram showing the configuration of the processing unit 116 shown in FIG. 4. FIG. 6-a is a block diagram of the image editing signal generation circuit shown in FIG. 5. 6-b, 6-c, and 6-d are timing charts showing the operation of the circuit shown in FIG. 6-a, and FIGS. 7, 8, and 10 are timing charts showing the operation of the circuit shown in FIG. Flowcharts showing the operation of the main CPU 209, FIGS. 9A, 9B, and 9C are diagrams explaining the operation of the image editing signal generation circuit shown in FIG. 6-a. 208 ・・・・・・・・・・・・・・・・・・・・・
・・・・・・・・・・・・・・・・・・・・・・・・
・・・・・・Reader CPU163, 179 Main CPU To edit signal Edit signal B Memory

Claims (1)

[Claims] (1) An image editing device having a generating means for generating an image editing signal for editing an image signal, characterized in that the generating means generates an image editing signal according to the delay of each stage of the image processing circuit. Image editing device.