JPH0238823U - - Google Patents
Info
- Publication number
- JPH0238823U JPH0238823U JP11804588U JP11804588U JPH0238823U JP H0238823 U JPH0238823 U JP H0238823U JP 11804588 U JP11804588 U JP 11804588U JP 11804588 U JP11804588 U JP 11804588U JP H0238823 U JPH0238823 U JP H0238823U
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- conductivity type
- inverter
- transistors
- vdd
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 4
Landscapes
- Manipulation Of Pulses (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11804588U JPH0238823U (en:Method) | 1988-09-08 | 1988-09-08 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11804588U JPH0238823U (en:Method) | 1988-09-08 | 1988-09-08 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0238823U true JPH0238823U (en:Method) | 1990-03-15 |
Family
ID=31362053
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11804588U Pending JPH0238823U (en:Method) | 1988-09-08 | 1988-09-08 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0238823U (en:Method) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005260602A (ja) * | 2004-03-11 | 2005-09-22 | Seiko Epson Corp | 高ヒステリシス幅入力回路 |
-
1988
- 1988-09-08 JP JP11804588U patent/JPH0238823U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005260602A (ja) * | 2004-03-11 | 2005-09-22 | Seiko Epson Corp | 高ヒステリシス幅入力回路 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS5915216B2 (ja) | 電圧レベルシフタ | |
| JPS60120420A (ja) | 電力用マルチプレクサ・スイツチ | |
| JPH0220017B2 (en:Method) | ||
| JPS6045512B2 (ja) | ダイナミック型シフトレジスタ回路 | |
| JPH0238823U (en:Method) | ||
| JPH0236225U (en:Method) | ||
| JPS6243392Y2 (en:Method) | ||
| JPH0421361A (ja) | 半波整流回路 | |
| JPS61214817A (ja) | Cmos集積回路 | |
| SU801226A1 (ru) | Двухтактный усилитель мощности | |
| JPH0157822U (en:Method) | ||
| JPS6342747Y2 (en:Method) | ||
| JPH0666658B2 (ja) | パルス発生回路 | |
| JPS6273638U (en:Method) | ||
| JPS61288615A (ja) | スイツチトコンパレ−タ | |
| JPH0253638U (en:Method) | ||
| JPS6152835U (en:Method) | ||
| JPH028486B2 (en:Method) | ||
| JPH02118329U (en:Method) | ||
| JPH0268526U (en:Method) | ||
| JPS6381518U (en:Method) | ||
| JPS6261528U (en:Method) | ||
| JPH02138929U (en:Method) | ||
| JPH0623326U (ja) | Pチャンネルmos fetのチョッパ式スイッチング回路 | |
| JPS6284808U (en:Method) |