JPH0234253U - - Google Patents
Info
- Publication number
- JPH0234253U JPH0234253U JP11227688U JP11227688U JPH0234253U JP H0234253 U JPH0234253 U JP H0234253U JP 11227688 U JP11227688 U JP 11227688U JP 11227688 U JP11227688 U JP 11227688U JP H0234253 U JPH0234253 U JP H0234253U
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- driver ics
- resin
- bonding surface
- thermal head
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims description 7
- 239000011347 resin Substances 0.000 claims description 3
- 229920005989 resin Polymers 0.000 claims description 3
- 238000010438 heat treatment Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
Landscapes
- Electronic Switches (AREA)
Description
第１図は本考案によるサーマルヘツドの一実施
例を示す平面図、第２図は第１図の―′線に
沿つた断面図、第３図は第１図例を製造する工程
を示す平面図、第４図は同じく断面図、第５図は
従来のサーマルヘツドを示す平面図、第６図は第
５図の―′線に沿つた断面図、第７図は第５
図例の説明に使用する断面図である。
１…基板、２…発熱抵抗体、３，４…ドライバ
ＩＣ、５…樹脂、６…基板の接合面。
Fig. 1 is a plan view showing an embodiment of the thermal head according to the present invention, Fig. 2 is a sectional view taken along the line -' in Fig. 1, and Fig. 3 is a plan view showing the manufacturing process of the example shown in Fig. 1. 4 is a sectional view, FIG. 5 is a plan view showing a conventional thermal head, FIG. 6 is a sectional view taken along the line -' in FIG. 5, and FIG.
FIG. 3 is a cross-sectional view used to explain the example. DESCRIPTION OF SYMBOLS 1...Substrate, 2...Heating resistor, 3, 4...Driver IC, 5...Resin, 6...Bond bonding surface.
Claims (1)
の基板をドライバＩＣの搭載方向に接合するとと
もに、上記複数個のドライバＩＣを樹脂で封止し
て成るサーマルヘツドにおいて、 上記基板の接合面に隣接するドライバＩＣと上
記基板の上記接合面との間隔を、上記基板を接合
する前に、上記基板ごとに、上記複数個のドライ
バＩＣに対する樹脂封止を行つたとしても、樹脂
が上記基板の上記接合面にはみ出すことのない間
隔としたことを特徴とするサーマルヘツド。[Claims for Utility Model Registration] A thermal head comprising a plurality of substrates on which a plurality of driver ICs are mounted in a row are bonded together in the mounting direction of the driver ICs, and the plurality of driver ICs are sealed with resin. , The distance between the driver IC adjacent to the bonding surface of the substrate and the bonding surface of the substrate is determined by assuming that the plurality of driver ICs are resin-sealed for each substrate before bonding the substrates. The thermal head is also characterized in that the spacing is such that the resin does not protrude onto the bonding surface of the substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11227688U JPH0234253U (en) | 1988-08-26 | 1988-08-26 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11227688U JPH0234253U (en) | 1988-08-26 | 1988-08-26 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0234253U true JPH0234253U (en) | 1990-03-05 |
Family
ID=31351068
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11227688U Pending JPH0234253U (en) | 1988-08-26 | 1988-08-26 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0234253U (en) |
-
1988
- 1988-08-26 JP JP11227688U patent/JPH0234253U/ja active Pending