JPH0234190B2 - KOSOKUDAIOODO - Google Patents

Description

[Detailed description of the invention]

The present invention relates to a high-speed diode, and the present inventor has obtained better characteristics than that disclosed in Japanese Patent Application No. 56-150671, "High-speed Diode", which the present inventor previously filed. The patent application filed
As disclosed in Publication No. 56-209910, "High-speed diode", it is different from P ⁺ -P-Ni-P ⁺ junction.
This is due to P ⁺ -P-Ni-N junction. With recent rapid progress in the power semiconductor industry, thyristors with turn-off times of 5 μsec or less are appearing. When applied to voltage type inverters,
It is common to use a thyristor with a diode connected in antiparallel. A diode used in anti-parallel connection to a thyristor with a short turn-off time is required to be an element (an element with a small reverse recovery charge) that has a high-speed current shedding ability corresponding to the turn-off time ability of the thyristor. Since the reverse recovery charge is expressed as Qr=Tr×irp/2, the following two characteristics are required of a high-speed diode. In addition
Tr is the reverse recovery time, and irp is the peak current during reverse recovery. (1) Short reverse recovery time. In other words, the peak voltage re-applied to the thyristor during commutation is affected by the reverse recovery charge of the diode, and increases as the reverse recovery charge of the diode increases, so a thyristor with a higher rated voltage is required, and the thyristor application technology , a diode with a large reverse recovery charge is not preferred. (2) The peak current during reverse recovery is small and its di/dt
However, recovery should be gradual (Soft Recovery).
In other words, in the characteristic (Snap-off) where the di/dt at the time of reverse recovery of the diode is sharp, the voltage re-applied to the thyristor during commutation is a voltage with a high dv/dt, and the dv/dt characteristic of the thyristor is From the viewpoint of thyristor application technology,
Diodes with snap-off characteristics are not preferred. For the above reasons, the di/dt during reverse recovery of high-speed diodes used for the above purpose is soft-
A diode with recovery characteristics and a short reverse recovery time is desirable. The present invention has been made for the above-mentioned purpose, and one embodiment of the present invention will be described in detail below with reference to the drawings. Figure 1 is an explanatory diagram of the current waveform during reverse recovery of a diode with Snap-off characteristics, and Figure 2 is an illustration of the current waveform during reverse recovery of a diode with Snap-off characteristics.
FIG. 3 is an explanatory diagram of a current waveform during reverse recovery of a diode having recovery characteristics. In the reverse recovery characteristics of diodes, there are two types: the Snap-off characteristic, which shows a sharp change in di/dt with a short reverse recovery time Tr, as shown in Figure 1, and the Snap-off characteristic, which shows a long and gradual change in reverse recovery time Tr, as shown in Figure 2. Soft showing changes in di/dt
The difference in −Recovery characteristics is related to the lifetime of the diode base material layer. For example, in the case of a P ⁺ −Ni−N ⁺ junction, the shorter the lifetime of the Ni layer, the shorter the Snap-off characteristic with reverse recovery time. The longer the lifetime of the Ni layer, the longer the reverse recovery time.
Recovery characteristics can be obtained. The present invention combines a region having Snap-off characteristics and a region having Soft Recovery characteristics in series in the thickness direction of a diode wafer made of a single silicon disk, and has Snap-off characteristics in this series-combined region. By combining regions in parallel, Soft−
This realizes a diode with recovery characteristics. FIG. 3 is a partial longitudinal sectional view of a high speed diode showing an embodiment of the present invention. 1 is an anode electrode formed by aluminum vapor deposition method,
3 is a P layer formed by diffusion of gallium or aluminum as a P-type impurity, 4 is a Ni layer, 5 is an N ⁺ layer formed by selectively diffusing phosphorous as an N-type impurity and dispersing it in multiple pieces, and 6 is a N to Ni layer 4 surrounded by N ⁺ layer
N layer formed by diffusing antimony as a form impurity,
7 is a metal brazing material, and 8 is a reinforcing support electrode which becomes a cathode electrode. 2 is a P ⁺ layer formed by diffusing boron as a P type impurity into the P layer 3. Figure 4 shows cross sections A to A in the vertical direction of the anode electrode in Figure 3, namely P ⁺ layer 2, P layer 3, Ni layer 4, N ⁺
3 is an explanatory diagram showing the concentration distribution of lifetime killer (Au) in each layer of layer 5. FIG. The concentration of lifetime killer is highest near the P ⁺ -P-Ni layer (area A in the figure), then in the center of the Ni layer (area B in the figure), and the lowest concentration is in the N ⁺
- Near the Ni layer (region C in the figure, which provides a carrier fastening effect to provide soft recovery characteristics). FIG. 5 shows a Rollo cross section in the vertical direction of the anode electrode in FIG. 3, that is, P ⁺ layer 2, P layer 3,
FIG. 6 is an explanatory diagram showing the concentration distribution of lifetime killer in each layer of Ni layer 4 and N layer 6. FIG. The concentration of lifetime killer is near the P ⁺ -P-Ni layer (area A in the figure)
and near the Ni-N layer (region D in the figure) are almost equal,
Moreover, it is larger than the central part of the Ni layer 4 (region B in the figure). The high-speed diode of the present invention is characterized in that it can easily obtain the lifetime killer concentration distribution shown in FIGS. 4 and 5 by being formed with the configuration shown in FIG. 3. Next, the reverse recovery characteristics of the diode having the lifetime killer concentration distribution shown in FIGS. 4 and 5 will be explained. When a reverse voltage is applied to this diode in a conductive state, carriers during conduction move centered around the P-Ni junction, holes move toward the anode electrode 1, electrons move toward the cathode electrode 8, and the P-Ni Recombination occurs depending on the lifetime killer concentration near the junction, and the carrier concentration decreases, and the vicinity of the P--Ni junction becomes a depletion layer with a thickness corresponding to the value of the reverse voltage. At this time, the thickness of the depletion layer increases from the junction surface of the P-Ni junction toward the Ni layer. Generally speaking, the reverse voltage applied to the diode during switching is about 1/5 to 1/20 of the rated voltage, so
Conceptually, the depletion layer thickness caused by applying a reverse voltage is
It can be thought that it spreads to the center of the Ni layer or below. Therefore, as the lifetime killer concentration within the depletion layer thickness increases, the carrier within the depletion layer shows a rapid change, and therefore the reverse recovery current also shows a sudden change. (A,
Region B) Next, the carriers that have moved to the outside of the depletion layer (from the center of the Ni layer to the N ⁺ layer) move to a region with a low lifetime killer concentration, so in this location the carriers are slowly attenuated by recombination. Therefore, the reverse recovery current also attenuates while showing a gradual change and becomes zero as time passes, and the reverse recovery time is determined through this process. (Regions B and C) To explain this situation in a little more detail, the reverse recovery current during switching of a diode with the lifetime killer concentration distribution shown in Figure 4 is determined by the reverse recovery current in the early period when the reverse recovery current begins to flow and has passed the peak value of the reverse recovery current. It is possible to obtain a reverse recovery characteristic that shows a two-stage current change, in which a Snap-off characteristic that shows a rapid current change appears, and a soft recovery characteristic that shows a gentle current change appears in the second half. FIG. 6 is an explanatory diagram showing a current waveform during reverse recovery to explain the above-mentioned state. In the reverse recovery characteristics of the diode, a region 9 where di ₁ /dt is large and exhibits a Snap-off characteristic, and a region 9' where di ₂ /dt is small and exhibits a soft recovery characteristic appear. A particularly important point for high-speed diodes is to keep di ₂ /dt in region 9' small. This idea is based on the patent application filed by the inventor on September 25, 1980.
Described in No. 150671. The diode having the lifetime killer concentration distribution shown in FIG. 4 has significantly improved characteristics compared to conventional high-speed diodes. However, if we try to further shorten the reverse recovery time while maintaining the two-stage reverse recovery current characteristics, the lifetime killer concentration distribution shown in Figure 4 alone is insufficient.
This improvement method will be explained. When the N layer 6 is provided as shown in FIG. 3, excess electrons left behind in the neutral region are extracted from the N ⁺ layer 5 and the N layer 6 to the cathode electrode 8. In this case, the discharge of excess electrons tends to flow toward the N layer 6, which has a lower impurity concentration than the Ni layer 4. The reason for this is that the Ni-N structure has a lower potential disturbance than the Ni-N ⁺ structure. That is, compared to the case where there is no N layer, the time for excess electrons to disappear in the neutral region can be shortened. By utilizing this effect, it becomes possible to further shorten the reverse recovery time of the diode and reduce the peak current IRP during reverse recovery. In other words, it means that the lifetime may be increased in order to obtain the same reverse recovery time. When comparing diodes of the same size with the same reverse recovery time, a diode with an N layer is a high-speed diode with a lower on-voltage and a smaller leakage current than a diode without an N layer. The lifetime killer concentration in Fig. 5 is low in region B of Ni layer 4 (equal to region B in Fig. 4);
U-shaped regions A and D (equivalent to region A in FIG. 4) are formed symmetrically with respect to layer 4 in the direction of P ⁺ layer 2 and N layer 6. The area showing the lifetime killer concentration distribution in the diode element showing the lifetime killer concentration distribution in Fig. 4 is several 10 times the total area of the N ⁺ layer 5.
When carriers are added locally in parallel in multiple dispersed shapes in %, the carriers existing in the C region with low lifetime killer concentration shorten the lifetime and increase the N layer 6.
due to the synergistic effect of reducing the potential barrier. However, since the lifetime killer concentration distribution is about several 10% of the total area of the N ⁺ layer 5, the
This does not significantly impair the effect of the lifetime killer concentration distribution shown in the figure, that is, the effect of gently attenuating di ₂ /dt shown in FIG. In this case, the effect of reducing the peak current during reverse recovery is more remarkable. That is, the peak current during reverse recovery becomes smaller than in the case of only the lifetime killer concentration distribution shown in FIG. 4, and the reverse recovery time is accordingly shortened. Therefore, higher speed can be achieved. This point is the greatest feature of the present invention. Next, the manufacturing process of one embodiment of the high-speed diode according to the present invention will be explained using FIGS. 7a, b, c, and d. Note that the same reference numerals as in FIG. 3 indicate the same or corresponding parts. Figure 7a shows a silicon substrate with a specific resistance of 70Ωcm.
N-type silicon with a thickness of 0.27 mm and a diameter of 23 mm is used. In advance, one side of the silicon substrate is coated with gallium or aluminum as a P-type impurity using a diffusion method.
P layer 3 has a surface concentration of approximately 5×10 ¹⁷ atoms/cc and a thickness
It is formed with a thickness of 40 μm, and the other surface is made of phosphorus as an N-type impurity, with a surface concentration of 1×10 ²¹ atoms/cc,
An N ⁺ layer 5 with a thickness of 10 μm is formed using selective diffusion technology using a known oxide film and photoresist technology, a Ni layer 4 has a thickness of 220 μm, and a P layer 3
A silicon disk having an oxide film 11 on other parts than on the surface is prepared. For the silicon disk at this point, the degree of disorder of the crystal structure of the Ni layer is
When examining rocking curves using the line two crystal method, almost no crystal structure disorder was observed in the Ni layer. The reason for this is that one side of the Ni layer has a gallium or aluminum diffused P layer with an atomic radius of 1.26 Å, which is 107% of the silicon atomic radius of 1.17 Å, and the other side has a P layer with an atomic radius of 1.26 Å. Since 94% of phosphorus with an atomic radius of 1.10 Å forms a selectively diffused N ⁺ layer,
It is inferred that both diffusion layers absorb the difference in atomic radius and that no disturbance occurs in the crystal structure. In this way, even if gold, which is a lifetime killer, is thermally diffused into a nearly perfectly crystalline silicon disk, the concentration distribution of gold as shown in Figures 4 and 5 will be reduced to 1.
It is impossible to obtain by spreading money twice. The present invention enables the fourth thermal diffusion of gold to be performed once during bond formation.
In order to simultaneously obtain the gold concentration distributions shown in Fig. 5 and Fig. 5, we first induced a disorder in the crystal structure corresponding to the gold concentration distribution in the thickness direction of the silicon disk, and the gold atoms moved into the disordered part of the crystal structure. This is an attempt to obtain the above-mentioned concentration distribution of gold by utilizing the property that gold accumulates in large amounts in gold. First, in order to obtain the gold concentration distribution shown in Figure 4, gallium or aluminum diffusion with an atomic radius of 1.26 Å was used to achieve a low surface concentration (5×10 ¹⁷ atoms/cc).
Boron with a small atomic radius (0.88 Å) is added at a high surface concentration (about 10 ²⁰ atoms/cc
order), the influence of boron atoms becomes stronger in terms of crystal structure, and it becomes easier to induce disorder in the crystal structure in the direction of the Ni layer than with gallium or aluminum alone. However, if the thickness of the P ⁺ layer is made too thick, the crystal structure will be disturbed throughout the Ni layer, so it is necessary to balance the relationship between the thickness of the P ⁺ layer and the thickness of the P layer. For the above-mentioned reason, from above the third surface of the P layer in FIG. 7a,
The surface concentration of boron is 5×10 ²⁰ atoms/cc, and the thickness is 5μ in advance to make it less than 1/3 of the P layer.
The P ⁺ layer 2 shown in FIG. 7b was formed by diffusion of m.
Due to this diffusion, a new oxide film 11 is formed on the surface of the P ⁺ layer 2. Next, for the purpose of obtaining the total concentration distribution shown in FIG. 5, antimony as an N ^- type impurity (with respect to silicon with an atomic radius of 1.36 Å 116%), a window 12 is opened in the oxide film 11. Next, antimony was diffused onto the surface of the Ni layer 4' at a surface concentration of 6×10 ¹⁷ atoms/cc to a thickness of about 5 μm to form the N layer 6 shown in FIG. 7c. In addition, the area ratio of N ⁺ layer 5 and N layer 6 is N/N ⁺ =
Designed for 15%. Due to this antimony diffusion, the final thickness relationship is 15 μm for the P ⁺ layer and 15 μm for the P layer.
45 μm, the Ni layer is 180 μm, and the N ⁺ layer is 30 μm. Note that a new oxide film 11 is formed on the surfaces of the P ⁺ layer 2 and the N layer 6 by the aforementioned boron diffusion. For the silicon disk in Figure 7c, P layer 3 and
Examining the degree of disorder in the crystal structure of Ni layer 4, N layer 6, and Ni layer 4 using ^rocking curves using the It was also found that strong crystal disorder occurred in the direction from the N layer 6 to the Ni layer 4. The cause of this is large compared to silicon (atomic radius 1.17 Å), and boron (atomic radius 1.17 Å) has a different atomic radius.
This is thought to be due to the diffusion of surface concentrations of antimony (atomic radius 1.36 Å, 116% relative to silicon) and antimony (atomic radius 1.36 Å, 116% relative to silicon). This crystal disorder is caused by P-Ni in the cross section A to A in Figure 3.
It was found that it appears strongly near the junction and decreases from the Ni layer 4 to the N ⁺ layer 5. On the other hand, in the cross section from Ro to Ro in Figure 3, it appears strongly near the P-Ni junction,
It decreases toward Ni layer 4, and it appears strongly near the N-Ni junction, and from N layer 6 to Ni layer 4.
It was also found that there was a decrease towards The tendency of disorder of the crystal structure in the thickness direction of the silicon disk corresponds to regions A and B of the gold concentration distribution in FIG. This corresponded to regions A, B, and C of the gold concentration distribution in Figure 5. This point is the greatest feature of the present invention. Next, in order to reduce the reverse recovery time of the diode wafer shown in FIG. A heat treatment is performed for 60 minutes. As a result of this heat treatment, the gold concentration distribution in the section corresponding to the cross section A to A of FIG. 3 forms regions A, B, and C shown in FIG. 4. The reason why regions A and B in Figure 4 appear after one thermal diffusion of gold corresponds to the tendency of the crystal structure to be disordered as described above, and the reason why the region C decreases is that gold ^is
This is because it is targeted by someone. The N ⁺ layer formed by diffusing phosphorus is sometimes effective for the getter effect of gold, which is one of the features of the present invention. Furthermore, the reason why regions A, B, and D in Figure 5 appear after one thermal diffusion of gold is that antimony does not have the effect of getting gold, so the distribution corresponds to the disorder of the crystal structure described above. be understood. After this heat treatment, the N ⁺ layer 5 and N
A supporting electrode 8 made of tungsten and having the same diameter as the diode wafer is placed on the surface of the layer 6 via a metal solder 7 mainly composed of aluminum, and is fixed together by heat treatment in an inert gas. . As a result, the N ⁺ layer 5 and the N layer 6 are short-circuited with aluminum. After that, a diameter of 15 mm and a thickness of 10 μm, which will become the anode electrode 1, is attached to the surface of the P ⁺ layer 2.
An aluminum evaporation current with . Through the manufacturing process as explained above, the gold concentration distribution shows three regions A, B, and C shown in Figure 4, and three regions A, B, and D shown in Figure 5. Gold concentration distribution can be achieved. After completion of fixing, the P-Ni junction, which is a voltage blocking junction, is shaped into a negative bevel by spherical polishing or the like, and then chemical polishing, surface protection film formation, etc. are performed on the beveled surface to complete the diode. The rating of the diode made in this way is
At 150 A and 2000 V, the reverse recovery time was approximately 1 μsec, and the current waveform during reverse recovery exhibited two-stage di/dt characteristics as shown in FIG. Note that the reverse recovery charge measurement conditions are forward current
It was carried out at 300A and a forward current drop rate of 50A/μS.

[Table] Table 1 compares the device manufactured according to this example with a conventionally manufactured device having the same rating. As can be understood from Table 1, the device according to the present invention has a small reverse recovery time and a small peak current during reverse recovery, and has a large influence on the dv/dt withstand capability of a thyristor that is used in anti-parallel connection with a diode. It has become possible to manufacture an excellent high-speed diode with di ₂ /dt lower than that of conventional elements. Therefore, the effect of contributing to thyristor application technology is extremely large. In this embodiment, a single diode has been described, but other semiconductor devices in which a diode is combined, such as a reverse conduction thyristor or a composite reverse blocking thyristor in which a reverse conduction thyristor wafer and a diode wafer are integrated, are also applicable. Those in the same industry can easily guess that it can also be used for other purposes.

[Brief explanation of drawings]

Figure 1 is an explanatory diagram of the current waveform during reverse recovery of a diode with Snap-off characteristics, and Figure 2 is an illustration of the current waveform during reverse recovery of a diode with Snap-off characteristics.
An explanatory diagram of a current waveform during reverse recovery of a diode having recovery characteristics, FIG. 3 is a partial cross-sectional view of a high-speed diode showing an embodiment of the present invention, and FIG.
FIG. 5 is an explanatory diagram showing the gold concentration distribution in the cross section A to A of the diode of the present invention shown in FIG. FIG. 6 is an explanatory diagram showing the current waveform during reverse recovery, and FIG. 7 is a longitudinal cross-sectional view showing the manufacturing process of one embodiment of the high speed diode of the present invention. 1...Anode electrode, 2...P ⁺ layer, 3...P
Layer, 4, 4'...Ni layer, 5...N ⁺ layer, 6...N
Layer, 7...metal brazing material, 8...support electrode, 11...
...Oxide film, 12...Window.

Claims (1)

[Claims] 1 A P layer formed by diffusing P-type impurity gallium or aluminum on one side of a silicon substrate Ni layer made of a high-resistance N-type base material, and an N layer on the other side.
P with an N ⁺ layer as the main region formed by selectively diffusing phosphorus as a shape impurity and dispersing it into multiple pieces.
-Ni-N ⁺ junction and P-Ni junction that has multiple small regions surrounded by dispersed N ⁺ layers, formed by diffusing P-type impurity boron onto the P layer of both junctions. A P ⁺ layer formed by diffusing antimony as an N type impurity onto the surface of the Ni layer having the plurality ^of small regions is provided.
The diode wafer has both -N ⁺ and P ⁺ -P-Ni-N junctions formed, and gold, which is a lifetime killer, is thermally diffused from both sides of the diode wafer to reduce reverse recovery charge. In the P ⁺ -P-Ni-N ⁺ junction, the gold concentration distribution in the thickness direction of the fiber has a gradient that decreases in three stages from the P ⁺ layer to the N ⁺ layer, and the P ⁺ -P-Ni-N P ⁺ at the junction
A high-speed diode characterized by exhibiting a U-shaped distribution from the layer to the N layer.