JPH0233193A - Image display circuit - Google Patents

Abstract

PURPOSE:To prevent a black frame from appearing on a picture which has been printed by selecting a part of the outside of a memory image in a white level in an output video signal. CONSTITUTION:When an image memory control circuit 22 gives a read-out address (k) of image data to an image memory 21, image data g11, g21 and g31 are held in a latch 26, and subsequently, brought to D/A conversion 23, pass through selectors 281, 282 and inputted to a video decoder 24, and outputted as a video signal (i) to the outside. When a user has selected the printer corre spondence, a selecting signal (n) is outputted as '1' from a selecting switch 20, and a black selecting signal generating circuit 272 selects an indicating signal (p) for indicating a black level period required to the minimum for the signal (i), and outputs (i) as a black selecting signal (m). On the other hand, a white selecting signal generating circuit 271 selects a memory image period indicating signal (o) in accordance with '1' of the input signal (n), and outputs it as a white selecting signal (l). Accordingly, the part of the outside of a mem ory image becomes a white level.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates particularly to an image display circuit having one image memory and outputting the contents as a video signal.

Connect a video printer etc. and Ii! The present invention relates to an image display circuit useful when printing images.

[Conventional technology]

It has an image memory and an image display circuit that outputs the contents to an external monitor.

For example, there are Burnal Combi, -Yu, and still image transmission devices.

In these devices, an image display circuit that generates an output signal from one image memory to a monitor is composed of an image memory, an image memory control circuit, a D/A converter, and a video encoder.

For example, RGB image data is stored in the image memory, and the image data is sequentially outputted according to the address given from the image memory control circuit.

The D/4 converter at the next stage converts this image data into an analog image signal. The next video encoder;-da is D/
The image signal output from the A converter is converted into a video signal and output to a monitor.

By the way, when the memory image output by the single-image display circuit is only a part of the display screen, the outside of the memory image is generally displayed black on the monitor. Specifically, a selector is inserted between the D/A converter and the video encoder to switch between one image standard and the black level of the image, and the image memory control circuit switches this in accordance with the output of the memory image. There is.

However, the output of the single image display circuit is not only displayed on a monitor, but also printed on a video printer. At this time, if the memory image of the image display circuit is smaller than the image capture range (and print range) of the video printer, the outer part of the memory image that is blacked out for viewing on a monitor will also be printed. There is a problem that the printed image is surrounded by a black frame. When printing on white paper, the outside of the am image is white (
Since it is natural, if the outside of an image becomes black, it will create a sense of discomfort.

Is this kind of problem l? It was described in Publication No. 60-60062. This problem can be solved by means similar to a color graphic display device that can color the outside of a memory image in an arbitrary color.

[Problem to be solved by the invention]

However, according to the method according to the previously proposed example mentioned above,
@ro There were problems in that the configuration became complicated and the scale of the system became large. For example, if one image data consists of 8 bits each of KGB, 24 registers and 24 selectors are required.

Therefore, one object of the present invention is to solve the above-mentioned problems of the prior art, and to prevent the printed image from being surrounded by a black frame when printing with a connected video printer. Moreover.

An object of the present invention is to provide an image display circuit that can be realized with a simple circuit configuration.

[Means to solve the problem]

In order to achieve the above-mentioned object, the present invention.

synchronization signal generation means for generating vertical and horizontal synchronization signals;
an image memory storing a memory image as digital image data; an image memory control means for controlling reading of at least the image data from the image memory based on the vertical and horizontal synchronization signals; A digital/analog converting means for converting the output digital image data into an analog image signal and outputting the same; and a converting means for converting the image signal output from the digital/analog converting means into a video signal and outputting the same. , an image display circuit comprising: a memory image period instruction signal indicating a period during which the memory image is read out as the image data from the image memory; and a video signal compatible with a monitor or a video printer; black selection signal generating means for generating a black selection signal based on a monitor/printer compatibility selection signal for selecting whether to use a compatible video signal; and a black selection signal generating means for generating a black selection signal based on the memory image period instruction signal and the monitor/printer compatibility selection signal. a white selection signal generating means for generating a white selection signal; 1 a first replacing means for replacing the image data or the image signal with data or a signal indicating black in accordance with the generated black selection signal; 1 the generated black selection signal; A second replacement means is provided for replacing the III-era image data 19 image signal with data or a signal indicating white in response to the white selection signal.

[Effect]

When the monitor/printer compatible selection signal selects a video signal compatible with a monitor, the black selection signal generating means and the first replacing means control whether or not the memory image is read out based on the memory image period instruction signal. During this period, the image data or the previously arranged image signal is replaced with data or a signal indicating black.

As a result, the one-image display circuit outputs a video signal in which the outside of the memory image is black. Therefore.

If this video signal is captured on a monitor and displayed on one screen, the outside of the memory image can be displayed in black. Also, the ffQE monitor/printer compatibility selection signal selects a video signal compatible with a video printer. Sometimes, instead of the first replacement means for the black selection signal generation means, the white selection signal generation means and the second replacement means perform a period in which the memory image is not read out, based on a memory image period instruction signal. The previous fE2 image data or the image signal is replaced with data indicating white or a forward signal. As a result, the single-image display circuit outputs a video signal in which the outside of the memory image is made white. Therefore, if this video signal is taken in by a video printer and printed, the conventional problem that the outside of the memory image becomes black can be solved.

〔Example〕

Hereinafter, embodiments of the present invention applied to a TIII display circuit in a still image transmission device will be sequentially described.

First, before describing each embodiment, the entire still image transmission device will be described.

Figure g12 is a configuration diagram of a still image transmission device that transmits color l1hl@ using a general public line.

g In Figure 12, 1 is a still image transmission device, 2 is an image display circuit, 11 is a video decoder, 12 is an A/D converter,
15 is a control unit, 14 is a modem unit, 15 is a network control circuit, 2
1 is a memory for 1lIl, 22 is an image memory control circuit, 2
3 is a D/A converter, and 24 is a video encoder.

On the color image sending side, the image to be transmitted is recorded as an image memo 1J21.
For example, it is necessary to connect a video camera and input the video signal a1 to the still image transmission device 1. The video signal a is converted into five RGB ambient signals through a video decoder 11. These image signals are processed by the next stage 4/D converter 12, each of which has 1, for example, 6 bits.
iIj is converted into data C. Image memory control circuit 2
2 gives a write address k to the 1 image memory 21,
These image data c1 are sequentially written into the image memory 21. After storing - still images in the image memory 21 in this way, the sending side connects the telephone line to the receiving side and starts transmitting the color image.

Stationary transmission side (2) The control unit 13 of the transmission device 1 is connected to the memory 2
The image slag data dt- is read from 1, encoded, and sent to the modem section 14. This encoded image data p
e is modulated by the modem section 14, passed through the network control circuit 15, and sent out to the telephone line. This network control circuit 15 is
When transmitting a color image, the telephone line is connected to the modem section 14 side of the still image transmitting device 1, and at other times, the telephone line is switched to an external telephone set connected to the still image transmitting device 1.

The still image transmission device 1 on the receiving side inputs the modulated image data transmitted through the telephone line to the modem section 14 through the network control circuit 15, demodulates it, and sends it to the control section 15. Control part 1
In step 5, the demodulated image data fy&: is decoded and written into the image memory 21. The RGE image data in the image memory 21 is output to the D/4 converter 23 according to the read address given by the image memory control circuit 22.

The D/A converter 23 converts the RGB digital image data g into R
Convert to GB analog picture SW number. , the next-stage video encoder 24 receives these RGB analog image signals ht.
- Convert to video signal 1 and send it externally, for example to a video monitor.

Output.

A single image display circuit 2 to which the present invention is applied will be described in detail.

FIG. 1 is a detailed configuration diagram of an image display circuit as a first embodiment of the present invention, and 20 is a selection switch.

21 is an image memory, 22 is an image memory control circuit, 23 is a D/A converter, 24 is a video encoder, 25 is a synchronization signal generation circuit, 26 is a latch, 271 is a white selection signal generation circuit, 272 is a black selection signal generation circuit Circuits 281 and 282 are selectors. Note that the same parts as in FIG. 12 are indicated by the same symbols.

In accordance with the vertical and horizontal synchronizing signals j outputted from the synchronizing signal generating circuit 25, the first memory control circuit 22 provides the image memory 21 with a read address ki for one piece of data. The three image memories 21 store color images as three primary color data of RGB, and read image data g10g2 . Output g3. Here, one pixel of a color image is composed of 6 bits each of RGB, and when all 6 bits of each RGB are 20', the pixel is black, and when all 6 bits of each KGB are 11', it is black. It is assumed that the pixel indicates white. The three latches 26 at the next stage hold these images f-P gl , g2 , and gs. The next stage D/A converter 23 receives the digital image data g11, g21, g31 held by the latch 26.
is converted into analog image signals bt, hz, ha. Here, when all the outputs of 6 bits each of RGB of the latch 26 are 10', the potential level output from the D/A converter 23 is the lowest, and when all the outputs of 6 bits each of RGB of the latch 26 are 51', @ It is assumed that the potential level output from the D,/4 converter 23 is the highest. These D/A converters 2
Three l1ii signals ht, hz, h output from 3
3 is input to the video decoder 24 through two-stage selectors 281 and 282, and is converted into video signal 1.
Output to the outside. By the way, this two-stage selector 28
When the white selection signal 1 is inputted from the white selection signal generation circuit 271, the three selectors 281 at the first stage among the 1, 282, and 1 image signals hl, h2, . Switch h5 to the highest potential level and output it in white. Also, the three selectors 2 in the latter stage
When the black selection signal m is inputted from the black selection signal generation circuit 272, 82 switches the one-image signals hl, h2 to h5 to the lowest potential level and outputs them as black.

The user selects the selection switch 20 from outside the still image transmission device 1.
and select whether it is compatible with a monitor or a printer. Here, it is assumed that the 1 selection switch 20 outputs 10' as the monitor/printer selection signal n when it is compatible with a monitor, and outputs 11' as the monitor/printer selection signal n when it is compatible with a printer.

1 selection switch 20 when the user selects monitor support
outputs 'O' as the monitor/printer compatible selection signal n. At this time, the black selection signal generation circuit 272 having the configuration shown in FIG. 5 selects the memory image period instruction signal 0 and outputs it as the black selection signal m at the timing shown in FIG. In other words.

The black selection signal m is output only during the video output period outside the memory image. On the other hand, the music selection signal generation circuit 271 has the configuration shown in FIG.

When 10' is input as the monitor/printer compatible selection signal n, the music selection signal J is not generated. Therefore, as shown in FIGS. 8 and 11, the outer portions of the memory image have a black level.

When the user selects printer support 1 selection switch 2
0 outputs 11' as the monitor/printer compatible selection signal n. At this time, the black selection signal generation circuit 272 having the configuration shown in FIG. It is output as a black selection signal m at the timing shown in the figure. On the other hand, when 11' is input as the monitor/printer compatible selection signal n, the music selection signal generation circuit 271 having the configuration shown in FIG. The song selection signal J is generated at the timing shown in FIG. Therefore, as shown in Figure #11 and FIG. 11, the outer part of the memory image becomes the white level. However, after selector 281 that switches the video signal to white, selector 2 that switches the video signal to black
82, the black selection signal m is given priority over the song selection l911, and the minimum black level period required for the video signal i to be output is ensured.

As described above, in this embodiment, when the user selects printer compatibility, the portion of the output video signal outside the memory image becomes white.

A simple circuit can avoid the traditional problem of black borders appearing on pictures printed using video printers.

In this embodiment, the user switches the selection switch 20 to select whether the device is compatible with a monitor or a printer, but if the still image transmission device 1 can directly control a video printer, the still image transmission At the same time that device 1 gives instructions to the video printer to print the transmitted Ili image,
By internally switching the monitor/printer compatibility selection signal n to printer compatibility, it is also possible to automatically whiten the outside of the memory image and output it only when printing.

FIG. 2 is a block diagram showing an image display circuit as a second embodiment of the present invention.

In FIG. 2, 20 is a selection switch, 21 is an image memory, 22 is an image memory control circuit, and 23 is a D/A converter 2.
3.24 is a video encoder, 25 is a synchronization signal generation circuit, 26 is a latch, 271 is a song selection signal generation circuit, 272
is a black selection signal generation circuit. Incidentally, the same parts as in Fig. 12 and Fig. 1 are indicated by the same reference numerals.

In accordance with the vertical and horizontal synchronizing signals j output from the synchronizing signal generating circuit 25, the one-image memory control circuit 22 gives an image data read address k to the image memory 21. The three image memories 21 store color images as RGE three primary color data.

Image data g1 according to the given read address k
, g2 and g5 are output. Here, one pixel of a color image is composed of 6 bits each for RGB.

When all 6 bits of each RGB are 10', that pixel is black, and the pan of 6 bits of each RGB is 2.
1' indicates that the pixel is white.

The three latches 26 at the next stage hold the image data g', 82mg' output from the image memory 21.

These latches 26 also have a clear terminal and a preset terminal, and when a signal is input to the clear terminal, all outputs are set to 10'.

When a signal is input to the preset terminal, all outputs are set to 111, and when signals are input to both the clear terminal and the preset terminal, the clear terminal takes priority and all outputs are set to 50'. Let it be something like this. and,
The black selection code m is inputted to the clear terminal of these latches 26, and the music selection signal r is inputted to the preset terminal. The D/A converter 23 at the next stage receives the digital image data g11 and g21 held by the latch 26.
, g51 as analog image signals h1, h2,
Convert to h3. here.

All 6-bit RGB outputs of latch 26 are 'o1'
When , the potential level output from the D/A converter 23 is the lowest, and when all 6 bits of each RGB output from the latch 26 are '1#, the potential level output from the D/A converter 23 is the highest. shall be. The five image signals hl, h2°h5 outputted from the D/A converter 23 are inputted to the video encoder 24, converted into a video signal 1, and then outputted to the outside.

The user selects the selection switch 20 from outside the still image transmission device 1.
t-setting and select whether it is compatible with a monitor or a printer. Here, the 1 selection switch 20 selects the monitor and
It is assumed that 101 is output as the printer compatible selection signal n, and 11' is output when printer compatible.

1 selection switch 20 when the user selects monitor support
outputs '01' as the monitor/printer correspondence selection signal n. At this time, the black selection signal generation circuit 272 having the configuration shown in FIG. 5 selects the memory image period instruction signal 0 and outputs it as the black selection signal m at the timing shown in FIG. In other words.

The black selection signal m is output only during the video output period outside the memory image. This black selection signal m is input to the clear terminals of the three latches 26, and all the outputs of the latches 26 are set to 10', thereby setting the video signal 1 to the black level. On the other hand, the white selection signal generation circuit 271 having the configuration shown in FIG.
' is input, the white selection signal 1 is not generated. Therefore, as shown in FIG. #I8, of the video signal 1 output from the single-image display circuit 2, the portion outside the main image has a black level.

When the user selects printer support, select switch 2
0 outputs '11' as the monitor/printer compatible selection signal n. At this time, the black selection signal generation circuit 272 having the configuration shown in FIG. Latch 26 at the timing shown in the figure.
input to the clear terminal. On the other hand, when the white selection signal generating circuit 271 having the configuration shown in FIG. 6 receives 11' as the monitor/printer compatible selection signal n.

Memory image period instruction signal 0 is selected and input to the preset terminal of latch 26 at the timing shown in FIG. Therefore, as shown in FIG. 10, the portion of the video signal 1 output from the image display circuit 2 outside the memory image has a white level. However, in the latch 26, the clear terminal to which the black selection signal m is input has priority over the preset terminal to which the white selection signal J is input, so the minimum required black level period for the video signal 1 to be output is ensured. be done.

As mentioned above, even in this second embodiment, when the user selects printer support, the portion of the output video signal outside the memory image becomes white, so that the image printed using the video printer will not match. Traditional problems such as black frames appearing.

This can be avoided by a simple table circuit.

FIG. 3 is a block diagram showing an image display circuit as a third embodiment of the present invention.

However, in this embodiment, image data is stored in the image memory 21 as a luminance signal and two types of color difference signals.

Therefore, in the first and second embodiments described above, the video decoder 11 of the still image transmission device 1 shown in FIG. and two types of color difference signals. Similarly, video encoder 24 outputs a luminance signal and two
This converts 8i class color difference signals into video signals.

In FIG. 3, 20 is a selection switch, 21 is an image memory, 22 is a painter memory control circuit, 23 is a D/A converter,
24 is a video encoder, 25 is a synchronization signal generation circuit, 2
6 is a latch, 271 is a white selection signal generation circuit, 272 is a black selection signal generation circuit, 282 is a selector, and 29 is an OR circuit. Note that the same parts as in FIG. 12 and FIG. 1 are indicated by the same symbols.

In accordance with the vertical and horizontal synchronizing signals j output from the synchronizing signal generating circuit 25, the one-image memory control circuit 22 gives an image data read address k to the image memory 21. The three image memories 21 store a color image as a luminance signal and two
It is stored as a type of color difference signal and read according to the given read address.

Luminance data g6 and two types of color difference data g4. Output g5. Here, the luminance data g6 of the color image has a depth of 8 bits, and the two types of color difference data g41g5° each have a depth of 6 bits. Also, brightness data g6 and 281
Color difference data of class g4. When the pan of g5 is #0', it indicates that the pixel is black, and when the 8 bits of the luminance data g6 are 111 and the 6 pits of each of the two types of color difference data g4 and g5 are 10', the pixel is black. Indicates white. The five latches 26 at the next stage hold the luminance data g6 and two types of color difference data ga and g5 output from the one-image memory 21. These latches 26 have preset terminals, and when a signal is input to the preset terminals, all outputs are set to 11'. And these latches 2
The white selection signal 1 is input to the preset terminal 6. The D//1 converter 23 at the next stage outputs the digital image data g41. g51. gl
is an analog image signal h4. h5. Convert to h6. Here, the output g41 .
g51. When all g61 are 'OI, D/A converter 2
The potential level output by latch 3 becomes the lowest, and each latch 2
6 output g41. It is assumed that the potential level output from the D/A converter 23 is the highest when the pan angles of g51 and g61 are 11'. These Dl Ji exchange 1525 power i; b 5 Tsumf JRM No. bA.

h5. h6i1. The signal is input to the video encoder 24 through the selector 2B2, converted to video signal 1, and then output to the outside. Here, select/282c, image signal h4*h5. h6 is switched to the lowest potential level and output as black.

1 selection switch 20 when the user selects monitor support
outputs 10' as the monitor/printer compatible selection signal n. At this time, the black selection signal generation circuit 272 having the configuration shown in FIG. 5 selects the memory image period instruction signal 0 and outputs it as the black selection signal m at the timing shown in FIG. This black selection number m is the selector 2 for the luminance signal.
82 and the OR circuit 29 to the two selectors 282 for color difference signals, and the video signal 1 is set to the black level only during the video output period outside the memory image. on the other hand.

The white selection signal generating circuit having the configuration shown in FIG. 6 does not generate a white selection signal when 10' is input as the monitor/printer compatible selection signal n. Therefore, as shown in FIG. 8, among the video signals 1 output from the Li image display circuit 2.

The outer part of the memory painter is black.

When the user selects printer support, press 1 selection switch 2
0 outputs 11' as the monitor/printer compatible selection signal n. At this time, the black selection inertia generating circuit 272 having the configuration shown in FIG. It is output as a black selection signal m at the timing shown in FIG. On the other hand, when 21' is input as the monitor/printer compatible selection signal n, the white selection signal generation circuit 271 having the configuration shown in FIG. It is output as a white selection signal 1 at the timing shown in the figure. This white selection signal 1
is input to the preset terminal of the latte 26, and is also input to the two selectors 282 for color difference signals through the OR circuit 29, and the video signal 1t is output only during the output period outside the memory image.
- Set to white level. Therefore, as shown in FIG. 10, of the video signal 1 output from the device, the portion outside the memory image becomes white. However, since there is a selector 282 that switches the video signal 1 to the black level after the latch 26 that switches the video signal 1t to the white level, the white selection standard 1
The black selection signal m is given priority, and the minimum required black level period for the video signal 1 to be output is ensured.

As described above, even in this embodiment in which one image data is stored in the image memory 21 as luminance data and two types of color difference data, when the user selects printer compatibility, the outside of the memory image of the output video signal is Since the area becomes white, the conventional problem of black frames appearing on images printed using a video printer can be avoided with a simple circuit.

According to this embodiment, the black outside the memory image always matches the black level (setup level) of the video signal, and the white outside the memory painter always matches the highest brightness level of the memory image. There is also an advantage.

FIG. 4 is a configuration diagram showing an image display circuit as a fourth embodiment of the present invention.

However, in this embodiment, image data obtained by directly sampling a composite video signal is stored in the image memory 21.

Therefore, the video decoder 11 is not necessary in the still image transmission apparatus 1 shown in FIG.

Furthermore, the video encoder 24 is replaced by a synchronization addition circuit that adds vertical and horizontal synchronization signals to the image signal output from the D/A converter 23. moreover.

In this embodiment, two video signals are separately output: a video signal for a monitor in which the outside of the memory image is black, and a video signal for a video printer in which the outside of the memory image is white.

In FIG. 4, 21 is an m-image memory, 22 is an image memory control circuit, 23 is a D/A converter, 242 is a synchronization addition circuit, 25 is a synchronization signal generation circuit, 26 is a latch,
281, 282, and 285 are selectors. still.

The same parts as in FIG. 12 and FIG. 1 are indicated by the same reference numerals.

In accordance with the vertical and horizontal synchronizing signals j output from the synchronizing signal generating circuit 25, the 5-image measuring control circuit 22 provides an image data read address k to the image memory 21. The image memory 21 stores image data obtained by directly sampling a composite video signal, and outputs image data g according to a given read address k.

The latch 26 at the next stage is the Iiii output from the 1-image memory 21.
Hold image data g. The D/A converter 23 at the next stage converts the digital image data g held by the latch 26 into an analog image signal. This D/
The image signal output from the A converter 25 is sent to the selector 28.
5 and a synchronization addition circuit 241, and is outputted to the outside as a video signal 11 for monitoring. At the same time, the signal is outputted to the outside as the video signal 12 for the video printer through the selectors 281 and 282 and the synchronization addition circuit 242.

Here, the selector 283 sets the video signal 11 to the black level only during the output period outside the memory image according to the memory image output period instruction signal 0 inputted from the image memory control circuit 22. Therefore, as shown in FIG. 8, a video signal i1 in which the outer part of the memory image is made black is output for monitoring.

On the other hand, the selector 281 sets the video signal 12yk to the white level only in the output period outside the memory image according to the memory image period instruction signal 0 inputted from the image memory control circuit 22. The next stage selector 282 is the synchronization signal generation circuit 2.
According to the minimum black level period instruction signal p inputted from 5, the video signal 12 is set to the black level for only the minimum period necessary for the video signal. Therefore.

As shown in FIG. 10, a video signal 12 in which the outer portion of the memory image is whitened is output for a video printer.

As described above, in this embodiment, the monitor video signal 11 in which the outside of the memory image is made black and the video signal 12 for the video printer in which the outside of the memory image is made white are output separately. By inputting the signal to a 12fc video printer, the conventional problem of black borders appearing on printed images can be avoided. Also, the image displayed on the monitor is always black on the outside of the memory image, making it easy to see.

〔Effect of the invention〕

As described above, according to one aspect of the present invention, it is possible to switch between making the outside part of the memory image black or white in the output video signal using a simple circuit. By selecting the latter when printing using a video printer, the conventional problem of black frames appearing on printed images can be avoided.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an image display circuit as a first embodiment of the present invention, FIG. 2 is a block diagram showing an image display circuit as a second embodiment of the present invention, and FIG. 3 is a block diagram showing an image display circuit as a second embodiment of the present invention. of#! FIG. 4 is a block diagram showing an image display circuit as a fourth embodiment of the present invention; FIG. 4 is a block diagram showing an image display circuit as a fourth embodiment of the present invention;
FIG. 5 is a configuration diagram showing a specific configuration of the black selection signal generation circuit in wc1 to third rIA, and FIG. 6 is a configuration diagram showing a specific configuration of the white selection signal generation circuit in FIGS. 1 to 3. 7 and 8 are waveform diagrams showing the signal waveforms of the main signals when supporting the monitor in FIGS. 1 to 3, respectively.
FIG. 11 is an explanatory diagram for explaining the outline of the operation of the present invention, and FIG. 12 is a configuration diagram showing a general still image transmission device. , is. Explanation of symbols 1... Still image transmission device, 2... Image display circuit. 11...Video decoder, 12...A11) converter. 13...control section, 14...modem section. 15... Network control circuit, 21... Image memory. 22... Image memory control circuit. 23...D/A converter, 24...video decoder F. 25... Synchronization signal generation circuit, 26... Latch. 271...White selection atonement generation circuit. 272...Black selection signal generation circuit. 281.282,285...Selector, 29°°/Latch. 241.242...Synchronization addition circuit, 20...Selection switch. α...Input video signal, b...Input image signal. C... Input image data, d... Image data. e...Sending image data, f...Receiving image data. g...Output image source gator, h...Output image signal. 1... Output video signal, j... Vertical and horizontal synchronization signal. k...read address, J-...white selection signal. m...Black selection signal. n...Monitor/printer compatible selection signal. 0...Memory image period instruction signal. p: Minimum black level period instruction signal. Easy 50 ; Side 5th otto almost 7th area to 8th area fin V trillion e1121I see 10 Kaoru // En

Claims (1)

[Scope of Claims] 1. Synchronizing signal generating means for generating vertical and horizontal synchronizing signals; an image memory storing a memory image as digital image data; an image memory control means for controlling reading of the image data from the memory; a digital/analog conversion means for converting the digital image data read from the image memory into an analog image signal and outputting the analog image signal; In the image display circuit, the image display circuit includes a converting means for converting the image signal outputted from the analog converting means into a video signal and outputting the video signal, the period during which the memory image is read out as the image data from the image memory is defined as and a monitor/printer compatible selection signal for selecting whether the video signal is a video signal compatible with a monitor or a video signal compatible with a video printer. a second selection signal generating means for generating a second selection signal based on the memory image period instruction signal and the monitor/printer compatible selection signal; and the first selection signal generated. a first replacing means for replacing the image data or the image signal with data or a signal indicating a first color in response to a signal; and a first replacement means for replacing the image data or the image signal in response to the generated second selection signal. An image display circuit comprising: second replacement means for replacing data or signals indicating a second color. 2. synchronization signal generating means for generating vertical and horizontal synchronization signals, an image memory storing memory images as digital image data, and at least the image data from the image memory based on the vertical and horizontal synchronization signals; an image memory control means for controlling the readout of the image memory, a digital/analog conversion means for converting the digital image data read from the image memory into an analog image signal and outputting the digital image data; first replacement means for replacing the image signal output from the digital/analog conversion means with a signal indicating a first color in response to a memory image period instruction signal indicating a period during which image data is being read out; and outputting the signal indicating a first color; a first conversion means for converting the output from the first replacement means into a video signal and outputting the video signal; It is characterized by comprising a second replacing means for replacing and outputting a signal indicating a second color, and a second converting means for converting the output from the second replacing means into a video signal and outputting the video signal. image display circuit. 3. In the image display circuit according to claim 1 or 2, the image data stored in the image memory is
An image display circuit characterized in that the image data is obtained from a composite video signal, or from a luminance signal and a color difference signal, or from three primary color signals of red, green, and blue.