JPH0232531A - Semiconductor processing equipment - Google Patents
Semiconductor processing equipmentInfo
- Publication number
- JPH0232531A JPH0232531A JP18401788A JP18401788A JPH0232531A JP H0232531 A JPH0232531 A JP H0232531A JP 18401788 A JP18401788 A JP 18401788A JP 18401788 A JP18401788 A JP 18401788A JP H0232531 A JPH0232531 A JP H0232531A
- Authority
- JP
- Japan
- Prior art keywords
- reaction
- wafer
- gas
- separation
- reaction chamber
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 10
- 238000000926 separation method Methods 0.000 claims abstract description 32
- 235000012431 wafers Nutrition 0.000 claims description 38
- 239000011261 inert gas Substances 0.000 claims description 13
- 238000004519 manufacturing process Methods 0.000 claims description 9
- 239000007789 gas Substances 0.000 abstract description 26
- 239000012495 reaction gas Substances 0.000 abstract description 9
- 239000000203 mixture Substances 0.000 abstract description 3
- 238000007599 discharging Methods 0.000 abstract 1
- 238000000137 annealing Methods 0.000 description 8
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical group N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 6
- 229910001873 dinitrogen Inorganic materials 0.000 description 6
- 238000010586 diagram Methods 0.000 description 4
- 238000009792 diffusion process Methods 0.000 description 4
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 4
- 229910052721 tungsten Inorganic materials 0.000 description 4
- 239000010937 tungsten Substances 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 239000012535 impurity Substances 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
Landscapes
- Recrystallisation Techniques (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は、ウェーハに複数の処理を施す半導体製造装
置に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a semiconductor manufacturing apparatus that performs multiple processes on a wafer.
第2図は従来の半導体製造装置の一例としてのランプア
ニール装置を示す構成図である。図において、1は石英
ガラスより成る反応室、2は反応室1の加熱を行うタン
グステンランプ、4は熱処理されるべきウェーハ3を搬
送するアーム、5は反応室1の蓋、6は蓋5の反対側の
反応室に設けられたガス導入管である。FIG. 2 is a configuration diagram showing a lamp annealing apparatus as an example of a conventional semiconductor manufacturing apparatus. In the figure, 1 is a reaction chamber made of quartz glass, 2 is a tungsten lamp that heats the reaction chamber 1, 4 is an arm that carries a wafer 3 to be heat-treated, 5 is a lid of the reaction chamber 1, and 6 is a lid of the lid 5. This is a gas introduction pipe provided in the reaction chamber on the opposite side.
次に動作について説明する。反応室1の蓋5を開はアー
ム4でウェーハ3を、反応室1内に搬送し、反応室1に
蓋5をする。次に、ガス導入管6より反応室1内に反応
ガス7を導入し、同時にタングステンランプ2によって
反応室1を加熱することによりウェーハ3の表面に膜8
を堆積させる。Next, the operation will be explained. The lid 5 of the reaction chamber 1 is opened, the wafer 3 is transferred into the reaction chamber 1 by the arm 4, and the lid 5 is placed on the reaction chamber 1. Next, a reaction gas 7 is introduced into the reaction chamber 1 through the gas introduction pipe 6, and at the same time, the reaction chamber 1 is heated by the tungsten lamp 2, so that a film 8 is formed on the surface of the wafer 3.
deposit.
反応室1内に反応ガス7が存在した状態で蓋5を開ける
と、外気と反応ガス7が反応することによりウェーハ3
上の膜形成に影響を与えることから、その後、反応室1
内を不活性ガスである窒素ガスN2に置換し、ウェーハ
3を冷却する。そして、蓋5を開け、ウェーハ3を反応
室1より取り出す。When the lid 5 is opened while the reaction gas 7 is present in the reaction chamber 1, the reaction gas 7 reacts with the outside air and the wafer 3
Afterwards, reaction chamber 1
The inside of the wafer 3 is replaced with nitrogen gas N2, which is an inert gas, and the wafer 3 is cooled. Then, the lid 5 is opened and the wafer 3 is taken out from the reaction chamber 1.
このとき、ウェーハ3の表面に自然酸化膜9が形成され
る。更に別の膜を堆積させるため、別のランプアニール
装置を用いて反応ガスを変えウエーハ3に処理を施す。At this time, a natural oxide film 9 is formed on the surface of the wafer 3. In order to deposit yet another film, the wafer 3 is processed using another lamp annealing device and changing the reaction gas.
従来のランプアニール装置のような半導体製造装置は以
上のように構成され、ウェーハ3に多層膜を形成するに
は各膜形成ごとにウェーハ3を反応室1外に取り出し外
気にさらすので、堆積膜間に自然酸化膜が堆積してしま
う問題点があった。A semiconductor manufacturing device such as a conventional lamp annealing device is configured as described above, and in order to form a multilayer film on the wafer 3, the wafer 3 is taken out of the reaction chamber 1 and exposed to the outside air for each film formation, so that the deposited film is There was a problem that a natural oxide film was deposited in between.
また、処理毎にウェーハ3を反応室1外に取り出すため
処理に時間がかかるという問題点もあった。Another problem is that the processing takes time because the wafer 3 is taken out of the reaction chamber 1 after each processing.
この発明は上記のような問題点を解決するためになされ
たもので、ウェーハを外気にさらすことなく短時間にウ
ェーハに複数の処理を施すことができる半導体製造装置
を得ることを目的とする。The present invention was made to solve the above-mentioned problems, and an object of the present invention is to provide a semiconductor manufacturing apparatus that can perform a plurality of processes on a wafer in a short time without exposing the wafer to the outside air.
この発明に係る半導体製造装置は、処理されるべきウェ
ーハを収納する複数の反応室と、前記複数の反応室間に
設けられ、前記ウェーハを外気にさらすことなく前記複
数の反応室間を移動させるための搬送路と、前記搬送路
の途中に設けられ、不活性ガス導入手段と、不活性ガス
排気手段を有し、不活性ガスにより前記複数の反応室間
を分離する分離室とを備えた構成としている。A semiconductor manufacturing apparatus according to the present invention is provided with a plurality of reaction chambers that house wafers to be processed and between the plurality of reaction chambers, and allows the wafer to be moved between the plurality of reaction chambers without being exposed to the outside air. and a separation chamber provided in the middle of the transport path, having an inert gas introduction means and an inert gas exhaust means, and separating the plurality of reaction chambers by the inert gas. It is structured as follows.
この発明における搬送路はウェーハを外気にさらすこと
なく反応室から他の反応室へ移動させ、分離室は不活性
ガスにより、ある反応室のガスが他の反応室内へ混入す
ることがないようにする。The transport path in this invention moves the wafer from one reaction chamber to another without exposing it to the outside air, and the separation chamber uses an inert gas to prevent gas from one reaction chamber from mixing into another reaction chamber. do.
〔実施M) 第1図はこの発明の一実施例を示す図である。[Implementation M] FIG. 1 is a diagram showing an embodiment of the present invention.
この実施例に係る半導体製造装置では、各反応室間に分
離室を設け、分離室を分離ガス(不活性ガス)で満たし
、この分離ガスにより他の反応室に他の反応ガスが侵入
しないようにしている。図において、4A、4Bはウェ
ーハ3を外気にさらすことなく反応’JIAから1Bへ
移動させるための搬送路、10は分離室、11は分離室
10に分離ガス12を導入するための分離ガス導入管、
13は反応室IA、IB及び分離室10の排気を行うた
めの排気ポンプである。その他の構成は、従来例と同様
である。In the semiconductor manufacturing equipment according to this embodiment, a separation chamber is provided between each reaction chamber, and the separation chamber is filled with separation gas (inert gas), and this separation gas prevents other reaction gases from entering other reaction chambers. I have to. In the figure, 4A and 4B are transport paths for moving the wafer 3 from reaction 'JIA to 1B without exposing it to the outside air, 10 is a separation chamber, and 11 is a separation gas introduction for introducing separation gas 12 into the separation chamber 10. tube,
13 is an exhaust pump for evacuating the reaction chambers IA, IB and the separation chamber 10. Other configurations are similar to the conventional example.
次に動作について説明する。まず、分離ガス導入管11
から所定温度の分離ガス12(例えば窒素ガスN2〉を
分11Lv10に導入しつつ、排気ポンプ13により排
気を行うことにより分離室10内に反応ガスを分離する
分離ガスカーテン(窒素ガスカーテン)を設ける。次に
、蓋5を開け、処理すべきウェーハ3を反応室1A中の
アーム4上に設置し、蓋5を閉める。そして、反応ガス
導入管6より反応室IA、IBに各々の反応ガス7A。Next, the operation will be explained. First, the separation gas introduction pipe 11
A separation gas curtain (nitrogen gas curtain) is provided in the separation chamber 10 to separate the reaction gas by introducing a separation gas 12 (for example, nitrogen gas N2) at a predetermined temperature into the separation chamber 10 and exhausting it with the exhaust pump 13. Next, the lid 5 is opened, the wafer 3 to be processed is placed on the arm 4 in the reaction chamber 1A, and the lid 5 is closed.Then, each reaction gas is introduced into the reaction chambers IA and IB from the reaction gas introduction pipe 6. 7A.
7Bを導入しつつ排気ポンプ13により排気を行う。7B is introduced and the exhaust pump 13 performs exhaustion.
このとき、反応室IA、1B間は前述したように分離ガ
スカーテン(窒素ガスカーテン)により分離されている
ため、反応ガス7A、7Bが混合することはない。また
分離ガスは不活性ガスであるため、分離ガスが反応ガス
7A、7Bと反応することはない、
次に、タングステンランプ2Aにより反応室1Aを加熱
し、ウェーハ3上に第1の層を形成する。At this time, since the reaction chambers IA and 1B are separated by the separation gas curtain (nitrogen gas curtain) as described above, the reaction gases 7A and 7B do not mix. Furthermore, since the separation gas is an inert gas, the separation gas will not react with the reaction gases 7A and 7B.Next, the reaction chamber 1A is heated with the tungsten lamp 2A to form the first layer on the wafer 3. do.
その後アーム4によりウェーハ3を、搬送路4A。Thereafter, the wafer 3 is transferred to the transfer path 4A by the arm 4.
4B及び分離室10を介し反応室1Bに運ぶ。そして、
タングステンランプ2Bにより反応室1Bを加熱し、ウ
ェーハ3上に第2の層を形成する。4B and the separation chamber 10 to the reaction chamber 1B. and,
The reaction chamber 1B is heated by the tungsten lamp 2B to form a second layer on the wafer 3.
3層以上の多層膜を形成する場合は、反応室及び分離室
を増加させ、上記動作を繰り返せばよい。When forming a multilayer film of three or more layers, the number of reaction chambers and separation chambers may be increased and the above operations may be repeated.
上記のように分離ガスカーテン(窒素ガスカーテン)に
より反応室IA、IBを区切り、反応ガス7A、7Bが
混合しないようにするとともに、搬送路4A、4Bを介
しウェーハ3を外気にさらすことなく移動させ各反応室
においてウェーハ3上に多層膜を形成するようにしたの
で、従来のようにウェーハ3を反応室外に取り出す必要
はない。As mentioned above, the reaction chambers IA and IB are separated by a separation gas curtain (nitrogen gas curtain) to prevent the reaction gases 7A and 7B from mixing, and the wafer 3 is moved through the transport paths 4A and 4B without being exposed to the outside air. Since a multilayer film is formed on the wafer 3 in each reaction chamber, there is no need to take the wafer 3 out of the reaction chamber as in the conventional case.
そのため、多層膜間に自然酸化膜が形成されることなく
、短時間で多層膜の形成ができる。Therefore, a multilayer film can be formed in a short time without forming a natural oxide film between the multilayer films.
なお、上記実施例では、分離ガス12として窒素ガスを
用いたが、その他の不活性ガスでも良い。In the above embodiment, nitrogen gas was used as the separation gas 12, but other inert gases may be used.
また、上記実施例ではウェーハ3上に多層膜を形成する
場合について説明したが、ウェーハ3内の不純物のアニ
ール又は拡散と膜の形成との組み合わせでもよく、この
時には、分離ガス12の温度制御によって拡散又はアニ
ール時間及び温度履歴の微妙なコントロールができると
いう効果もある。Furthermore, although the above embodiment describes the case where a multilayer film is formed on the wafer 3, a combination of annealing or diffusion of impurities within the wafer 3 and film formation may also be used. Another advantage is that diffusion or annealing time and temperature history can be delicately controlled.
さらに、上記実施例ではアニール処理の場合について説
明したが、この発明は、ウェーハに他の処理を施す半導
体製造装置にも適用できる。Further, although the above embodiments have been described in the case of annealing processing, the present invention can also be applied to semiconductor manufacturing equipment that performs other processing on wafers.
以上のようにこの発明によれば、ウェーハを外気にさら
すことなく複数の反応室間を移動させることができる搬
送路と、搬送路の途中に、不活性ガス導入手段と不活性
ガス排気手段とを有した分離室を設けたので、外気にさ
らすことなくウェーハに複数の処理を施すことができ、
またある反応室内のガスが他の反応室内へ混入すること
がなく、その結果ウェーハ上に自然酸化膜が形成される
ことなく短時間でウェーハに複数の処理を施すことがで
きるという効果がある。As described above, according to the present invention, there is provided a transfer path that allows wafers to be moved between a plurality of reaction chambers without exposing them to the outside air, and an inert gas introduction means and an inert gas exhaust means provided in the middle of the transfer path. Since we have installed a separation chamber with a
Further, gas in one reaction chamber does not mix into other reaction chambers, and as a result, a wafer can be subjected to multiple processes in a short time without forming a native oxide film on the wafer.
加えて、ウェーハ内の不純物のアニール又は拡散と膜の
形成との組み合せによりウェーハを処理する場合は、分
離ガスの温度制御により拡散又はアニール時間及び温度
履歴の微妙なコントロールができるという効果もある。In addition, when a wafer is processed by a combination of annealing or diffusion of impurities within the wafer and film formation, the diffusion or annealing time and temperature history can be delicately controlled by controlling the temperature of the separation gas.
第1図はこの発明の一実施例を示す図、第2図は従来の
半導体製造装置を示す図である。
図において、1A及び1Bは反応室、3はウェーハ、4
A、4Bは搬送路、10は分離室、11は分離ガス導入
管、12は分離ガス、13は排気ポンプである。
なお、各図中同一符号は同一または相当部分を示す。FIG. 1 is a diagram showing an embodiment of the present invention, and FIG. 2 is a diagram showing a conventional semiconductor manufacturing apparatus. In the figure, 1A and 1B are reaction chambers, 3 is a wafer, and 4 is a reaction chamber.
A and 4B are conveyance paths, 10 is a separation chamber, 11 is a separation gas introduction pipe, 12 is a separation gas, and 13 is an exhaust pump. Note that the same reference numerals in each figure indicate the same or corresponding parts.
Claims (1)
と、 前記複数の反応室間に設けられ、前記ウェーハを外気に
さらすことなく前記複数の反応室間を移動させるための
搬送路と、 前記搬送路の途中に設けられ、不活性ガス導入手段と、
不活性ガス排気手段とを有し、不活性ガスにより前記複
数の反応室間を分離する分離室とを備えた半導体製造装
置。(1) a plurality of reaction chambers that house wafers to be processed; a transport path provided between the plurality of reaction chambers and for moving the wafer between the plurality of reaction chambers without exposing the wafer to the outside air; an inert gas introduction means provided in the middle of the conveyance path;
A semiconductor manufacturing apparatus comprising: a separation chamber having an inert gas exhaust means and separating the plurality of reaction chambers using an inert gas.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18401788A JPH0232531A (en) | 1988-07-22 | 1988-07-22 | Semiconductor processing equipment |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18401788A JPH0232531A (en) | 1988-07-22 | 1988-07-22 | Semiconductor processing equipment |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0232531A true JPH0232531A (en) | 1990-02-02 |
Family
ID=16145883
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18401788A Pending JPH0232531A (en) | 1988-07-22 | 1988-07-22 | Semiconductor processing equipment |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0232531A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04155107A (en) * | 1990-10-19 | 1992-05-28 | Corona Kk | Low nox burner |
JPH04169708A (en) * | 1990-10-31 | 1992-06-17 | Corona Kk | Low-nox burner |
JP2013140990A (en) * | 1998-03-03 | 2013-07-18 | Akt Kk | Method of coating and annealing large area glass substrate |
-
1988
- 1988-07-22 JP JP18401788A patent/JPH0232531A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04155107A (en) * | 1990-10-19 | 1992-05-28 | Corona Kk | Low nox burner |
JPH04169708A (en) * | 1990-10-31 | 1992-06-17 | Corona Kk | Low-nox burner |
JP2013140990A (en) * | 1998-03-03 | 2013-07-18 | Akt Kk | Method of coating and annealing large area glass substrate |
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