JP2001007117A - Treating apparatus and treating method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a treating apparatus and a treating method whereby substrates can be continuously treated at high speeds, the treating temp. of the substrate can be controlled at a high accuracy. SOLUTION: Plasma treating units 7, 8 for treating wafers one by one and annealing units 5, 6 for treating a plurality of wafers at the same time are disposed in a process chamber which is composed of a housing 14 of a treating apparatus and held in the same environment, and the wafers treated by the plasma treating units are carried one after another into the annealing units, thereby executing the plasma and annealing treatments in parallel in the separate units.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a technique for processing a substrate such as a silicon wafer, and more particularly, to an apparatus and a method for processing a substrate to be processed.

[0002]

2. Description of the Related Art Generally, in order to manufacture a semiconductor integrated circuit, a large number of desired elements are formed by repeatedly performing film formation and pattern etching on a substrate to be processed such as a semiconductor wafer.

In carrying out various processing steps as described above, since a semiconductor wafer is transferred between processing apparatuses, it is inevitable that the wafer is exposed to the atmosphere. Therefore, a natural oxide film is formed on a portion of the wafer surface exposed to the air due to oxygen and moisture in the air. This natural oxide film must be removed because it deteriorates the film quality, for example, electrical characteristics. Therefore, surface treatment for removing the natural oxide film from the wafer surface is performed as a pre-treatment such as the film forming step described above.

The surface treatment includes a wet method and a dry method. The dry method is more advantageous than the wet method because the end portions of the various material layers can be formed as smooth surfaces substantially perpendicular to the surface of the substrate to be processed. It turns out that there is.

FIG. 11 is a schematic configuration diagram of a plasma processing apparatus used in a typical dry method. In this plasma processing apparatus, as shown in FIG. 11, a mounting table 20 for mounting a wafer W in a chamber 16 is provided, and a plasma gas is supplied from above the mounting table 20. A heating lamp 36 for heating is provided below the mounting table 20 to heat and anneal the wafer W after the plasma processing.

In order to process the wafer W by the plasma processing apparatus, the wafer W on which various material layers are formed is patterned with a resist material by a CVD apparatus (not shown).
Pattern etching is performed with a plasma etching apparatus, and then a registry move is performed. At this time, a natural oxide film grows at the bottom of the pattern.

After that, plasma processing is performed by the plasma processing apparatus. Specifically, the wafer W is mounted on the mounting table 20, and the plasma gas is supplied to the wafer W at room temperature or at a lower temperature.
To convert the natural oxide film into a substance that can be evaporated, and then heats the wafer W to a predetermined temperature by energizing the heating lamp 36 to perform annealing.

Here, the reason why the plasma treatment is performed at room temperature or lower temperature is that the deterioration of the natural oxide film is inhibited at high temperatures, and the annealing is performed to evaporate the deteriorated natural oxide film. is there. Therefore, performing plasma processing by such a dry method requires processing under two temperature conditions of a low temperature during plasma processing and a high temperature during annealing, and it is manufactured to control these temperatures with high precision. It is indispensable to improve the quality of semiconductor devices.

[0009]

However, the processing at a low temperature and the processing at a high temperature as described above are performed in one processing vessel 16.
There is a problem in temperature control to perform inside.

That is, since the processing temperatures are different, the mounting table 20
In addition, there is a problem that a waiting time is required until the wafers W reach respective processing temperatures and stabilize, so that high-speed continuous processing cannot be performed.

Further, even if only the mounting table 20 is stabilized at the target processing temperature, heat may remain in other peripheral portions, for example, the cover member 66 and the heating lamp 36, and the heat may cause the heat to remain. There is a problem in that thermal variations occur in the wafer W, which causes deterioration in the quality of the product semiconductor element.

The present invention has been made to solve these problems. That is, an object of the present invention is to provide a heat treatment apparatus and a heat treatment method that can continuously process a substrate to be processed at high speed.

It is another object of the present invention to provide a heat treatment apparatus and a heat treatment method capable of controlling the processing temperature of a substrate to be processed with high accuracy.

[0014]

In order to achieve the above object, a processing apparatus according to the present invention comprises a processing vessel forming a closed processing space, a processing vessel disposed in the processing vessel, and a processing target at a first temperature. A first processing unit that processes the substrates one by one, a second processing unit that accommodates a plurality of substrates to be processed processed by the first processing unit, and processes the substrates to be processed at a second temperature; The first
Transport means for transporting the substrate to be processed between the processing unit and the second processing unit.

In the above-described processing apparatus, the first processing unit includes, for example, a plasma processing unit, and the second processing unit includes an annealing unit. Further, in the above processing apparatus, the annealing unit may be a unit also having a function as a load lock unit.

The processing method of the present invention comprises a first step of processing a substrate to be processed at a first temperature, and a second step of processing the substrate to which the first step has been performed at a second temperature. In the processing method, the first step is a step of exposing a plurality of substrates to be processed to the first temperature one by one, and the second step is simultaneously exposing the plurality of substrates to the second temperature. Characterized by the step of exposing to water.

In the above method, the first step may be a plasma processing step, and the second step may be an annealing step.

According to the present invention, two processing units, a first processing unit and a second processing unit, are disposed in the container, and the processing is performed by a dedicated processing unit for each processing temperature. This eliminates the need for a standby time for the process, and allows the substrate to be processed continuously at high speed.

Further, since the processing units are divided for each processing temperature, the temperature of each processing unit is easily stabilized, and the temperature control can be performed with high accuracy.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS (First Embodiment) Hereinafter, a processing apparatus according to an embodiment of the present invention will be described. FIG. 1 is a plan view showing a schematic configuration of a processing apparatus 1 according to the present embodiment.

As shown in FIG. 1, a transfer chamber 2 is disposed substantially at the center of the processing apparatus 1, and the load lock units 3, 4 and the annealing units 5, 6 surround the transfer chamber 2. , Two plasma processing units 7 and 8 are symmetrically arranged.

The units 3 to 8 and the transfer chamber 2 are disposed in a single housing 14 as a processing container, and the environment inside the housing 14 is maintained under the same conditions. A transfer arm 9 is provided inside the transfer chamber 2, and transfers a wafer W as a substrate to be processed between each of the units 3 to 8.

Loader arms 10 and 11 are arranged on the front side of the load lock units 3 and 4 in the drawing. These loader arms 10 and 11 further transfer wafers W into and out of the four carrier cassettes 13 set on a cassette stage 12 arranged on the front side.

FIG. 2 is a vertical sectional view showing a schematic configuration of the plasma processing unit 7 of the processing apparatus 1. As shown in FIG. 2, the plasma processing unit 7 mainly includes a chamber 20 for performing plasma processing, and a plasma forming tube 21 for supplying plasma into the chamber 20.

The chamber 20 is made of, for example, aluminum.
It has a substantially cylindrical shape. A mounting table 22 on which the wafer W is mounted is disposed substantially at the center of the bottom of the chamber 20. The mounting table 22 is made of, for example, SiC, and is supported from the bottom of the chamber 20 by columns 23, 23 made of quartz or alumina.
Exhaust ports 24, 24 are provided at the outer peripheral edge of the bottom of the chamber 20, and an exhaust system 26 connected to a vacuum pump 25 or the like is connected to the exhaust ports 24, 24 so that the inside of the chamber 20 can be evacuated. It has become.

A loading / unloading port 38 is provided on the side wall of the chamber 20, and a gate valve 40 which is opened and closed when a wafer W is loaded and unloaded is attached to the loading / unloading port 38. The plasma forming tube 21 is formed in a tubular shape from quartz or the like, and is provided with an opening in the ceiling portion 20A of the chamber 20, and is airtightly attached to this opening via a seal member 42 in a substantially upright state. ing. At the upper end of the plasma forming tube 21, N2 gas and H2 gas
A plasma gas introduction unit 44 for introducing a plasma gas made of a gas is provided. Specifically, the plasma introduction unit 44 has an introduction nozzle 46 inserted into the plasma forming tube 14, and the introduction nozzle 46 is connected to a gas passage 48.
Are linked. The gas passage 48 is branched into two, and each branch pipe is provided with a N2 gas source 52 filled with N2 gas and an H2 gas source 54 filled with H2 gas through a flow controller 50 such as a mass flow controller. Are connected respectively. Further, a plasma forming section 56 is provided directly below the introduction nozzle 46.

The plasma forming section 56 has, for example, 2.4
Microwave source 58 for generating microwaves of 5 GHz
And a microwave generated by the microwave generation source 58 through the rectangular waveguide 62, for example, the Evenson waveguide 60 provided in the plasma forming tube 21. And then introduced into the plasma forming tube 21 to generate plasma in the plasma forming tube 21 by the microwave, thereby forming H2 gas and N2 gas.
This downflow can be formed by activating the gas mixture.

On the other hand, an outlet 64, which is the lower end of the plasma forming tube 21, is provided with a quartz cover 66 that is spread downward or umbrella-shaped or conically in communication therewith. The gas efficiently flows down onto the wafer W by covering the upper part of the mounting table 20.

The NF is located immediately below the outlet 64.
An NF3 gas supply unit 68 for supplying 3 gas is provided. Specifically, the NF3 gas supply unit 68
As shown in FIG. 2, a ring-shaped shower head 70 made of quartz is provided, and a large number of gas holes 72 are formed in the shower head 70. In this shower head 70,
A communication pipe 74 is connected and taken out from the side wall of the container, and a gas passage 76 is connected to this. The gas passage 76 is connected to an NF3 gas source 80 for filling NF3 gas via a flow controller 78 such as a mass flow controller. FIG. 3 is a vertical sectional view showing a schematic configuration of the annealing unit 5 of the processing apparatus 1. As shown in FIG. 3, the annealing unit 5 includes a furnace body 90, a processing tube 91 provided in the furnace body 90, and a port for holding and transferring the wafer W into and out of the processing tube 91. 93 and a port mounting table 94 on which the port 93 is mounted and moved up and down.

The processing tube 91 is attached to the upper inside of the furnace body 90 with the opening thereof facing downward, and the port 93 is moved in and out from the lower side of the processing tube 91. Also,
The top of the processing tube 91 has a small diameter and has a small tubular shape, and the upper portion of the processing tube 91 penetrates substantially the center of the ceiling of the furnace body 90 and is led out of the furnace body 90. An inert gas supply pipe 102 is fitted into this thin tubular portion, and an inert gas, for example, nitrogen gas, supplied from an inert gas source (not shown) is supplied into the processing pipe 91 to be processed. The inside of 91 is purged with an inert gas.

A heater 99 is provided at a position surrounding the processing tube 91 at an upper portion inside the furnace body 90, and the processing tube 91 and the inside thereof can be heated by energizing the heater. I have.

An opening 100 is provided in a portion of the side wall of the furnace body 90 below the processing tube 91, and the port 93 is inserted into and out of the furnace body 90 through the opening 100. It has become. The opening 100 is provided with a gate valve 101 that can be opened and closed, and the opening 100 is opened and closed by an opening and closing mechanism (not shown).

An exhaust port 103 is provided in the side wall portion of the furnace body 90 opposite to the opening 100, and an exhaust pipe 104 is attached to the exhaust port 103. The other end of the exhaust pipe 104 is connected to a vacuum pump (not shown), and the inside of the furnace body 90 can be evacuated by operating the vacuum pump.

A table 98 on which a port mounting table 94 is mounted is provided below the furnace body 90. The table 98 is supported by lifting cylinders 96 and 97. The elevating cylinders 96 and 97 are moved up and down by an elevating mechanism 95 to move the port mounting table 94 up and down by a predetermined stroke.

The elevating mechanism 95 and the elevating cylinders 96 and 97 are arranged outside the furnace body 90, and the port mounting table 94 is moved up and down while the bottom of the furnace body 90 is kept airtight by a sealing member (not shown). You.

FIG. 4 is a plan view showing a schematic configuration of the transfer arm 9, and FIG. 5 is a perspective view of the transfer arm 9. FIG.
As shown in FIG. 5 and FIG. 5, in this transfer arm 9, single-stage arms 9C and 9D and multi-stage arms 9A and 9B are arranged at 90 degrees to each other about a vertical axis.
The single-stage arms 9C and 9D are for holding wafers W one by one, and the multi-stage arms 9A and 9B are capable of holding 25 wafers W at equal intervals and horizontally over a plurality of stages, for example, 25 stages. Has become.

Next, a procedure when processing the wafer W using the processing apparatus 1 will be described.

First, the wafer W on which the pattern is formed is loaded. That is, the wafer W patterned on the semiconductor material layer laminated on the surface by an etching device (not shown) is set on the cassette stage 12 in a state of being accommodated in the carrier cassette 13. Next, when the processing apparatus 1 is started in this state, the loader arms 10 and 11 operate to access the inside of the carrier cassette 13 and
The wafer W inside the transfer chamber 2 is taken out, turned around in a substantially horizontal plane, changed direction, and delivered to the transfer arm 9 (9C) in the transfer chamber 2.
When receiving the wafer W, the transfer arm 9 rotates in a substantially horizontal plane, and stops at a position facing the front of the plasma processing unit 7. Next, the gate valve 4 of the plasma processing unit 7
Then, the transfer arm 9 extends the arm 9 </ b> C and enters the plasma processing unit 7, and sets the held wafer W on the mounting table 22.

A contact hole 120 as shown in FIG. 7 is formed on the surface of the wafer W, and a natural oxide film 110 is formed on the bottom surface thereof. FIG.
(A) is an enlarged view showing a natural oxide film generated at the bottom of the contact hole on the surface of the wafer W.

When the wafer W is stored in the chamber 20,
The chamber 20 is closed by closing the gate valve 40, and the inside is evacuated. Next, N2 gas and H2 gas are introduced from the N2 gas source 52 and the H2 gas source 54 from the plasma gas introduction unit 44 into the plasma forming tube 21 at predetermined flow rates. At the same time, a microwave of 2.45 GHz is generated from the microwave generation source 58 of the microwave forming unit 56, guided to the Evenson-type waveguide 60, and introduced into the plasma forming tube 21. Thus, the N2 gas and the H2 gas are converted into plasma by microwaves and activated at the same time, and active gas species are formed. The active gas species forms a downflow by evacuation of the chamber 20 and flows down the plasma forming tube 21 toward the outlet 64.

On the other hand, from the ring-shaped shower head 70 of the NF3 gas supply unit 68, the NF3 gas supplied from the NF3 gas source 80 is activated by the down-flowing active gas species of the mixed gas composed of the N2 gas and the H2 gas. Is done. As described above, the NF3 gas is also converted into the active gas, and the wafer W is combined with the active gas species forming the down flow.
The protective film 82 reacts with the natural oxide film 110 on the surface to form a protective film 82 in which Si, N, H, F, and O are mixed, as shown in FIG. During this process, the protective film 82 is formed on the wafer W at room temperature or in a cooled state.

The processing conditions at this time are as follows. Regarding the gas flow rate, H2, NF3, and N2 are each set at 300 sc.
cm, 60 sccm, and 400 sccm. The gas pressure during the processing is 4 Torr, the plasma power is 300 W, and the processing time is 1 minute. Thus, the protective film 82 that has reacted with the natural oxide film 110 is formed on the surface of the wafer W. In this case, since the upper portion of the mounting table 22 is covered with the umbrella-shaped covering member 66, the dispersion of the active gas species in the downflow is suppressed, and the active gas species flows down onto the surface of the wafer W efficiently and is protected efficiently. A film 82 is formed.

When the formation of the protective film 82 is completed as described above, the supply of the gases H2, NF3 and N2 is stopped, and at the same time, the driving of the microwave generation source 58 is stopped. Then, the inside of the chamber 20 is evacuated to remove the residual gas, and the pressure is returned to the normal pressure again. Then, the gate valve 40 is opened. Next, the transfer arm 9 is operated to allow the arm 9C to access the inside of the chamber 20, and the wafer W after the plasma processing on the mounting table 22 is set.
Is lifted and taken out of the chamber 20.

FIG. 6 is a diagram schematically illustrating the positional relationship among the plasma processing unit 7, the annealing unit 5, and the transfer arm 9.

The transfer arm 9 holding the wafer W after the plasma processing moves from the chamber 20 to a position substantially at the center of the processing chamber 2 and rotates in a substantially horizontal plane to change the direction of the arm 9C. The arm 9C is stopped at a position in front of the adjacent annealing unit 5.

Next, the gate valve 101 of the annealing unit 5 is opened. At this time, the elevating mechanism 95 has lowered the mounting table 98 in the annealing unit 5, and the port 93 has been lowered to the position of the opening 100 on the side wall of the furnace body 90.

In this state, the transfer arm 9 operates to access the arm 9C into the annealing unit.
The wafer W after the plasma processing held by C
Set to 3. When the setting of the wafer W in the port 93 is completed, the gate valve 101 is closed to seal the inside of the furnace body 90, and the elevating mechanism 95 pushes up the port mounting table 94 to connect the port 93 on the port mounting table 94 to the processing pipe 91.
Housed inside.

When the port 93 is accommodated in the processing pipe 91, an inert gas such as nitrogen gas is supplied from the inert gas supply pipe 102 to purge the processing chamber 91 with the inert gas.
Further, the heater 99 is energized in advance, and the surroundings of the processing tube 91 are heated to a predetermined temperature.

In this state, when the port 93 accommodating the wafer W after the plasma processing is accommodated in the processing tube 91, the wafer W is placed in an inert atmosphere and under heating, for example, at a temperature of 100.degree. The subsequent annealing process is started.

By the annealing process, the protective film 82 is made of Si, N, H, F, O as shown in FIG.
Are sublimated as molecules 84 mixed with Thereby, the natural oxide film 110 of the wafer W is removed, and a Si surface appears on the surface of the wafer W.

Although the mechanism by which the natural oxide film 110 is removed by the above-described annealing treatment has not been elucidated in detail, each active species of H 2 gas, N 2 gas and NF 3 gas reacts with the natural oxide film 110 (SiO 2). Become large molecules containing Si, N, H, F, O, and N,
F and H act between O and Si to bind them, and this product easily sublimates by heat of 100 ° C. or more while maintaining the molecule of N—F—H—O—Si. It is thought to be.

On the other hand, while the one wafer W is being annealed as described above, the succeeding unprocessed wafer W is loaded and set in the plasma processing unit 7, and the preceding wafer W is annealed. During this time, the plasma processing is simultaneously performed on the subsequent unprocessed wafer W.

FIG. 9 is a flowchart illustrating a procedure for performing plasma processing and annealing using the processing apparatus of the present invention.

When the processing apparatus 1 is started, an unprocessed first wafer W is loaded from the carrier cassette 13 into the plasma processing unit 7 (step 1), and plasma processing is performed in the plasma processing unit 7. (Step 2) A protective film is formed. The wafer W having undergone the plasma processing is carried out of the plasma processing unit 7 (Step 3), and thereafter is carried into the annealing unit 5 (Step 4), where it is subjected to annealing (Step 5).

On the other hand, the second unprocessed wafer W is loaded from the carrier cassette 13 into the empty plasma processing unit 7 in which the wafer W after the plasma processing is unloaded and emptied in step 3 (step 6). Is subjected to plasma processing (step 7). The wafer W having the protective film formed on the surface by the plasma processing is unloaded from the plasma processing unit 7 in the same manner as the first wafer W (Step 8).
The wafer is carried into the annealing unit 5 (step 9) and subjected to annealing (step 10). Similarly, the third wafer, the fourth wafer,...
After the plasma processing is performed in the plasma processing unit 7 one by one, the wafer is carried into the annealing unit 5 for annealing. Thus, when the last wafer W, for example, the 25th wafer W is unloaded from the plasma processing unit 7 (step n) and loaded into the annealing unit 5 (step n + 1), the last annealing is performed (step n + 2). ). Thus, the annealing process is performed on the first wafer W to the last wafer W while all the wafers are held at the same port 93.

When the annealing (step n + 2) after loading the last wafer W is completed, the annealing unit 5
Is carried out of the wafer W (step n + 3).

That is, the lifting mechanism 95 shown in FIG. 3 lowers the port mounting table 94 to take out the port 93 on the port mounting table 94 from the processing tube 91 and open the opening 100.
And the port 93 are lowered to a position where they face each other. In this state, the gate valve 101 is opened, and the transfer arm 9 accesses the inside of the furnace body 90.

At this time, it is preferable that the transfer arm 9 takes out all the annealed wafers W accommodated in the port 93 at a time by using the multistage arm 9A or 9B. This is because the end points of annealing are made uniform by taking out all the wafers W after annealing under the same conditions, thereby homogenizing the quality of the wafers W.

The wafer W taken out from the annealing unit 5 is delivered from the transfer arm 9 to the loader arms 10 and 11 via the load lock 3 or 4, and is stored in the carrier cassette 13. The processed wafer W accommodated in the carrier cassette 13 is transferred to a subsequent processing device by a transfer unit (not shown) and is provided for the subsequent processing.

As described above, in the processing apparatus 1 according to the present embodiment, the plasma processing units 7 and 8 for processing the wafers W one by one, and the annealing units 5 and 5 for processing the plurality of wafers W collectively. 6 and 6 are provided separately and independently in a common processing container, so that a plurality of wafers W can be continuously and efficiently processed.

In the processing apparatus 1 according to the present embodiment,
Plasma processing units 7 having different processing temperatures for wafer W,
8 and the annealing units 5 and 6 are provided separately and independently in a common processing container, so that the temperature control in each processing unit becomes easy and the processing of the wafer W can be performed with high accuracy. Can be.

Further, in the processing apparatus 1 according to the present embodiment, a unit having a structure capable of simultaneously processing a plurality of wafers W is adopted as the annealing units 5 and 6, and the transfer arm can also take out a plurality of wafers W. Since a multi-stage arm having a simple structure is employed, the end points of the annealing performed on a plurality of wafers W can be made uniform, whereby the quality of the obtained wafer W can be homogenized. (Second Embodiment) Hereinafter, a second embodiment of the present invention will be described. Note that, in this embodiment, the description of the same parts as those in the first embodiment will be omitted. FIG.
FIG. 4 is a plan view illustrating a schematic configuration of a processing apparatus according to a second embodiment of the present invention.

In the processing apparatus according to this embodiment, the transfer chamber 2
The plasma processing units 7 and 8 are disposed on both sides of the left and right sides, respectively, and the annealing units 5 and 6 are disposed in the load lock units 3 and 4 between the transfer chamber 2 and the loader arms 10 and 11. The annealing units 5 and 6 have a structure in which the wafer W can be loaded and unloaded from either the transfer chamber 2 side or the load locks 10 and 11 sides.

According to the processing apparatus of this embodiment, since the annealing units 5 and 6 are provided in the load locks 3 and 4, the size of the entire processing apparatus can be reduced.

Since the distance between the annealing units 5 and 6 and the loader arms 10 and 11 is short, the wafer W annealed after the plasma processing can be immediately carried out of the processing apparatus, and the processing can be speeded up. .

The present invention is not limited to the above embodiment. For example, in the above embodiment, the processing in the plasma processing unit is performed at normal temperature, but a cooling device is provided on the mounting table of the plasma processing units 7 and 8, and the plasma processing is performed by cooling to a temperature lower than room temperature. It is also possible to

[0067]

According to the present invention, two processing units, a first processing unit and a second processing unit, are disposed in the container, and the processing is performed by a dedicated processing unit for each processing temperature. The waiting time for stabilization is not required, and the substrate to be processed can be continuously processed at high speed.

Further, since the processing units are divided for each processing temperature, the temperature of each processing unit is easily stabilized, and the temperature control can be performed with high accuracy.

[Brief description of the drawings]

FIG. 1 is a plan view illustrating a schematic configuration of a processing apparatus according to a first embodiment.

FIG. 2 is a vertical sectional view showing a schematic configuration of the plasma processing unit according to the first embodiment.

FIG. 3 is a vertical sectional view showing a schematic configuration of the annealing unit according to the first embodiment.

FIG. 4 is a plan view showing a schematic configuration of a transfer arm.

FIG. 5 is a perspective view showing a schematic configuration of a transfer arm.

FIG. 6 is a plasma processing unit according to the first embodiment,
It is the figure which drew the positional relationship between an annealing unit and a transfer arm typically.

FIG. 7 is a partially enlarged view of a vertical cross section of the surface of a wafer W.

FIG. 8 is a partially enlarged vertical cross section of the surface of a wafer W.

FIG. 9 is a flowchart illustrating a procedure for performing plasma processing and annealing using the processing apparatus of the present invention.

FIG. 10 is a plan view illustrating a schematic configuration of a processing apparatus according to a second embodiment of the present invention.

FIG. 11 is a vertical sectional view showing a schematic configuration of a conventional plasma processing unit.

[Explanation of symbols]

 2 Processing vessel W Wafer (substrate to be processed) 7, 8 Plasma processing unit (first processing section) 5, 6 Annealing unit (second processing section) 9 Transfer arm (Conveying means), 3, 4 ... Load lock unit.

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Hiroshi Kobayashi 650 Misakazawa, Hosaka-cho, Nirasaki-shi, Yamanashi F-term in Tokyo Electron Co., Ltd. Research Laboratory 5F004 BA19 BA20 BC05 BC06 BC08 DA17 DA24 DA25 DB03 FA01 5F031 CA02 DA17 GA43 GA44 GA50 HA67 MA04 MA07 MA24 MA28 MA30 MA32 NA09

Claims (5)

[Claims] 1. A processing container forming a closed processing space, a first processing unit disposed in the processing container and processing a substrate to be processed at a first temperature in a sheet-by-sheet manner; A second processing unit that stores a plurality of substrates and processes the substrate to be processed at a second temperature; and a transport unit that transports the substrate to be processed between the first processing unit and the second processing unit. A processing device, comprising: 2. The processing apparatus according to claim 1, wherein said first processing unit is a plasma processing unit, and said second processing unit is an annealing unit. 3. The processing apparatus according to claim 2, wherein the annealing unit is a unit that also has a function as a load lock unit. 4. A first method for processing a substrate to be processed at a first temperature.
And a second step of processing the substrate to be processed, which has been subjected to the first step, at a second temperature, wherein the first step includes a step of: A processing method wherein the second step is a step of simultaneously processing the plurality of substrates to be processed at the second temperature. 5. The processing method according to claim 4, wherein said first step is a plasma processing step, and said second step is an annealing step.