JPH02310922A - Etching of multilayer-interconnection integrated circuit - Google Patents

Abstract

PURPOSE:To surely open and investigate even a high-integration IC by a method wherein a silane coupling agent is dripped onto the surface of an integrated circuit, a heat treatment is executed, an organic substance which is inert against an etchant is then dripped, the substance is reacted with the silane coupling agent, a heat treatment is executed, a minute region on the surface of the integrated circuit is masked and, after that, an etching operation is executed. CONSTITUTION:A silane coupling agent is dripped onto the surface of an integrated circuit 1; a heat treatment is executed; then, a monomolecular layer of an organic substance is produced on the surface of a passivation 2; the surface in a recessed part and in a complicated plane is protected; an etching rate is made slow; as a result, the etching rate can be controlled. An organic substance which is inert against an etchant or a gas is dripped onto the surface; a liquid level is made definite; the organic substance is reacted with the silane coupling agent; a heat treatment is executed; thereby, a minute region on the surface is masked. As a result, this masked region 3 is not corroded by an etching operation to be executed later. Consequently, the IC can be etched from a protruding part.

Description

DETAILED DESCRIPTION OF THE INVENTION A. Field of Industrial Application The present invention relates to a method of etching a multilayer wiring integrated circuit used for internal investigation of the integrated circuit.

B1 Summary of the Invention The present invention involves dropping a silane coupling agent onto the surface of a multilayer wiring integrated circuit and subjecting it to heat treatment, then dropping an inert organic substance into an etching solution or etching gas, keeping the liquid level constant, and removing the silane coupling agent from the silane cup. After masking a minute region on the surface of the integrated circuit by reacting it with a ring agent and performing heat treatment, the inside of the integrated circuit is opened by etching.

C1 Conventional technology Conventionally, chemical etching using a wet chemical reaction, plasma etching using a plasma chemical reaction, and etching using a focused ion beam device (FIB) have been used to unpack and investigate the inside of an integrated circuit (IC). It is being

Problems to be solved by the invention This passivation cannot be dissolved. Furthermore, when highly active hydrogen fluoride or high-temperature phosphoric acid is used, it often dissolves passivation and at the same time destroys aluminum wiring, polysilicon, semiconductor parts, etc.

In the case of plasma etching, it is easy to selectively etch the IC gap, contact through hole, etc., and as shown by the arrow in FIG. 4, the polysilicon 2 semiconductor portion under the passivation film is etched and destroyed first. I end up. Especially in recent years, multilayer aluminum wiring 4 as shown in Fig.
．． This tendency is becoming stronger as the number of ICIs of 5 increases.

Etching using FIB uses the focusing properties of an ion beam to selectively etch minute portions.
It is used for failure analysis when the failure part can be localized, but it is primarily a device for IC developers and researchers, and is too expensive for IC users to use for failure investigation and evaluation.

For this reason, the above-mentioned conventional technology cannot cope with IC failures, which are becoming more likely to occur at the junctions of the glabella insulation and diffusion layers due to high integration and multilayering.

The present invention has been made in view of the above-mentioned problems of the prior art, and its purpose is to provide an IC etching method that can reliably inspect the opening of even highly integrated RCs.

E1 Means for Solving Problems In order to achieve the above object, the method of etching a multilayer wiring integrated circuit according to the present invention includes dropping a silane coupling agent onto the surface of the integrated circuit, performing heat treatment, and then applying an etching liquid or etching gas to the surface of the integrated circuit. This method is characterized by dropping an inert organic substance, keeping the liquid level constant, reacting with the silane coupling agent, heat-treating, masking a minute area on the surface of the integrated circuit, and then etching.

F0 action When a silane coupling agent is dropped onto the surface of an integrated circuit and heat treated, a monomolecular layer of organic matter is generated on the passivation surface, protecting the surface in recesses and complicated areas and slowing down the etching rate. can be controlled.

When an etching liquid or an organic substance inert to the gas is dropped onto the surface to keep the liquid level constant, it is reacted with the silane coupling agent, and heat treatment is performed, thereby masking a minute area on the surface. Therefore, the masked area is not immersed in subsequent etching.

Therefore, etching can be performed from the convex portion of the IC.

G, Example 1, a silane coupling agent is dropped onto the surface of an ICI chip, and heat treatment is performed to form a monomolecular layer of an organic substance on the passivation surface (FIG. 1). By the run coupling treatment, the [C1 surface is inactivated, and the reaction rate to etching is controlled to be slow. In addition, the density of organic reactive groups in the concave portions and complex surface portions increases, resulting in stronger hydrophobicity.

At this time, if the area to be protected on the chip surface is sufficiently narrow compared to the area to be melted, normal etching can be performed by treating it with a hydrophobic organic reactive group such as vinyl, methacryloxy, or epoxychlorohexyl. The reaction rate can also be slowed down to such an extent that the etching rate can be controlled within a few minutes.

2. Next, glycidoxyalkyl, aminoalkyl, which has a reactive group according to the organic reactive group of the silane coupling agent,
A low-viscosity organic substance such as a low-viscosity epoxy adhesive is dropped, high-speed rotation, vibration, ultrasonic waves, etc. are applied to keep the liquid level constant and the reaction is allowed to occur, and the reaction of the organic species is terminated by heat treatment. Figure 2 shows the reaction mechanism of the silane coupling agent. As a result, organic masking 3 can be applied to four parts of the surface of the ICI as shown in FIG.

3. Then, apply a chemical edge blower to only the top layer passivation layer 2 of the convex portion that is not masked 3. Etch using plasma etching or the like.

4. After etching the second aluminum wiring using phosphoric acid, remove the organic masking portion using an organic solvent, nitric acid, or the like.

The interlayer insulating film appears through the above processes 1 to 4, but repeat the processes 1 to 4 as necessary, masking the concave parts and etching from the surface of the convex parts each time until the desired part appears. .

■-! 1 Effects of the Invention Since the present invention is configured as described above, it produces the following effects.

■Contacts that conventionally tend to be selectively etched.

Through holes and the like are masked with organic matter, making them difficult to etch.

■Since the recesses are masked, etching can always be done from the upper layer.

■The silane coupling agent slows down the etching reaction, so even in integrated circuits with thin layers, an etching concentration of 1
By selecting the time, temperature, voltage, etc., the speed can be sufficiently controlled.

■Since the entire integrated circuit can be etched sequentially for each height,
Even if the faulty part inside the integrated circuit is unknown, it is possible to open the package and investigate. It can also be used to evaluate the quality and reliability of interlayer insulation films.

[Brief explanation of drawings]

Figure 1 is an explanatory diagram showing inactivation by silane coupling treatment, Figure 2 is an explanatory diagram showing the reaction mechanism of the silane coupling agent, Figure 3 is a cross-sectional diagram showing the relationship between the integrated circuit surface and masking, and Figure 3 is an explanatory diagram showing the reaction mechanism of the silane coupling agent. FIG. 4 is a top sectional view of a two-layer aluminum wiring integrated circuit, and FIG. 5 is a plan view showing the conventionally etched integrated circuit surface. ! ...Multilayer wiring integrated circuit, 2... Passivation, 3... Organic masking portion, 4... Second aluminum wiring, 5... First aluminum wiring, 6... Interlayer insulating film, 7
. . . first insulating film, 8 . . . semiconductor diffusion layer. 2 people Figure 1 Figure 2 Figure 3

Claims (1)

[Claims] (1) A silane coupling agent is dropped onto the surface of the integrated circuit and heat treatment is performed, then an inert organic substance is dropped into the etching solution or etching gas, the liquid level is kept constant, and the silane coupling agent is reacted with the silane coupling agent to perform heat treatment. A method for etching a multilayer wiring integrated circuit, comprising etching after masking a minute area on the surface of the integrated circuit.