JPH02310535A - Display device - Google Patents

Abstract

PURPOSE:To obtain a display device which can surely redress a faulty image element by arranging each counter electrode in a state where it extends over plural image element electrodes in a lower part in planar viewing and forming at least one photoelectric conversion element on each counter electrode. CONSTITUTION:Each counter electrode 38 is arranged in the state where it extends over plural image element electrodes 19 in the lower part in planar viewing and at least one photoelectric conversion element 37 is formed on each counter electrode 38. Therefore, even if the faulty image element exists because of the fault of a switching element 18, etc., the photoelectric conversion element 37 is actuated by receiving transmitted light from a normal image element on the periphery of the faulty image element part and electric field is impressed on an electrooptical material 43 in virtue of a current generated in the photoelectric conversion element 37. The electrooptical effect of the material 43 is changed with the electric field to redress the faulty image element. Thus, the display device in which an LCD is driven in a simple driving system without preventing high definition and which can surely redress the faulty image element is obtained.

Description

[Detailed description of the invention] 1! The present invention relates to a display device, more specifically, to a display device, and more specifically to a display device, which includes a lower substrate, an upper substrate disposed opposite to the lower substrate, and an electro-optic material interposed between the lower substrate and the upper substrate. The present invention relates to a liquid crystal display (LCD) including an active matrix drive type thin film transistor (TPT).

゛ Takami Gogaki Stop As information technology advances in recent years, there is a desire for even higher definition and brightness in the field of displays for displaying images. Currently, CRTs (cathode ray tubes) are the mainstream in most household and other fields. However, there is an increasing demand for flat panel displays that are small, lightweight, consume low power, and can provide high image quality. Among flat panel displays, LCDs using liquid crystals are currently the most widely used and promising displays. As driving methods for this LCD, there are a simple matrix driving method and an active matrix driving method. Among these, the active matrix driving method is a method in which a switching element is provided for each pixel to drive and control each pixel independently. Therefore, 1 for each pixel
It is possible to drive at a duty ratio close to 0.00%, and it is possible to obtain a large contrast ratio for one pixel.

Thin film transistors (TPTs) that use amorphous silicon as switching elements can have a large area.
Moreover, since it can be manufactured at low cost, it is viewed as promising and has been the subject of much research. Characteristics of thin film transistor (TPT) displays using amorphous silicon include the possibility of large-area displays and the relatively low-temperature process (3
Since it can be manufactured at a temperature of around 00°C, an inexpensive glass substrate can be used, and continuous film formation maintains the cleanliness of the film interface.

Based on the above, thin film transistor (TPT) type displays employing an active matrix drive method and using amorphous silicon are expected to develop as candidates for future new media displays.

Next, a conventional example of a display device driven by an active matrix circuit using TPT (hereinafter referred to as an active matrix type TPT circuit) is shown in FIG. 9 and FIG. 1O.

In the figure, there is a data line 1 in the vertical direction on the glass substrate ll.
2, an address line 13 is formed in the horizontal direction, and an amorphous silicon layer 14 of a semiconductor layer, a drain electrode 15, a gate electrode 16, a source electrode 17, etc. are formed near the intersection of these data lines 12 and address lines 13. A TPT 18 is formed. Drain electrode 15
A data line 12 is connected to the address line 13.
also serves as the gate electrode 16, and the source electrode 17 is a pixel type ti1i! formed in a matrix on the glass substrate 11. 1
9 is connected.

A glass substrate 20 (upper substrate) is disposed above these glass substrates 11 (lower substrate) in FIG. It is worn. Moreover, the glass substrate 11.
A polarizing film 22 is attached to the outside of each of the panels 20 . A liquid crystal 23 is filled between the glass substrate 11 and the glass substrate 20.

In the display device configured as described above, in order to display an image using the active matrix type TPT circuit, an alternating current bias pulse is applied to the data line 12 while applying a positive bias to the address line 13. As a result, a source voltage is generated on the pixel electrode 19 side, an electric field is applied to the liquid crystal 23, and the crystal liquid crystal 23 is charged.
The orientation direction changes. Transmitted light is turned on and off by this change in orientation of the liquid crystal 23. In the active matrix type TPT circuit for LCD, the above driving method is sequentially operated on all address lines 13 and all data lines 12 to display a desired image. A feature of the above-mentioned method is that since each pixel within the display surface can be independently driven and controlled by the TPT 18, a display with a high contrast ratio without crosstalk between pixels can be obtained.

The active matrix type TPT circuit as described above scans the address line 13 and the data line 12 and
This is a method in which each pixel is driven by turning on and off the FT18. Therefore, as the display area or number of pixels increases, circuit defects such as defects in the TFT 18, disconnections in wiring, and short circuits in wiring occur.
A pixel at a defective location or all pixels on a disconnected line becomes a display defect. In a normal TFTLCD, tens of thousands to hundreds of thousands of pixels and a TPT 18 as a switching element are formed on a large-area glass substrate. If there is even a slight circuit defect caused by a defect in the TPT 18 or poor wiring.

It is not possible to achieve a sufficient display function as an LCD. Therefore, it is very important to repair display defects caused by defects in the TFT 18 or poor wiring within the display surface. It is inevitable that TFTLCDs will become larger and more pixel-rich (higher definition) in the future, and the question is how to repair defective areas in large-area substrates and create LCDs with sufficient display performance. is becoming a big problem. Conventionally, as means for preventing the occurrence of defects, methods have been proposed in which a plurality of TPTs correspond to one pixel, or methods in which each wiring line is doubled. However, although these technologies can repair defective pixels, the TPT and wiring lines used to repair defective pixels become a major obstacle to achieving higher definition, or the provision of many TPTs and wiring lines is difficult to use for LCD driving. It had many disadvantages, such as complicated circuits and driving methods, and needed improvement.

The present invention was made in view of the above-mentioned problems, and is an active matrix type TPT circuit for LCD, which does not hinder high definition and can drive an LCD with a simple driving method. The present invention aims to provide a display device that can reliably repair defective pixels.

In order to achieve the above object, the present invention comprises a lower substrate, an upper substrate disposed opposite to the lower substrate, and an electro-optic material interposed between the lower substrate and the upper substrate. A display device comprising: pixel electrodes arranged in a matrix on the lower substrate, and switching elements for driving each pixel electrode arranged on the lower surface of the upper substrate. A plurality of counter electrodes are formed, and each of these counter electrodes is arranged so as to span a plurality of lower pixel electrodes in plan view, and each counter electrode has a small
It is characterized in that a number of photoelectric conversion elements are formed.

The configuration of the display device according to the present invention will be described in detail below. Note that parts having the same structure as those of the conventional example are given the same reference numerals.

In FIGS. 1 and 3, the outside of the glass substrate 11 (
A polarizing film 22 is attached to the lower side of FIG. 1, and an active matrix TPT circuit is formed inside.

A specific example of this active matrix type TPT circuit will be explained below.

Address lines 13 (gate electrodes 16
These address lines 13 are made of Cr, Mo, Ta, Aβ, or NiCr films, or a laminated film of these films. The thickness of these address lines 13 is determined by the film material, the target TPT structure, wiring resistance, etc. A gate insulating film 31 is laminated on the upper surface of these address lines 13 .

As the gate insulating film 31, a thin film having a high resistivity and excellent insulating properties and good interface properties is used. In the present invention, the gate insulating film 31 that satisfies these conditions is an SiN film, a SiO film, or a 5iON film formed by a plasma CVD method (P-CVD method), or by other forming methods such as sputtering method. A Ta20g film, a β203 film, or a laminated film of these can be used. When using 5iNIII as the gate insulating film 31, for example, a silane-based gas such as a mixed gas of S I Ha and NH3 or a mixed gas of N2, or a mixed gas of SiH4, NHI and N2 is used by plasma CVD. It can be formed by decomposition and deposition.

On the upper surface of the gate insulating film 31, an amorphous silicon layer 14 is vertically stacked at a predetermined location corresponding to the gate electrode 16. The amorphous silicon layer 14 is a semiconductor layer, and can be easily formed by a normal plasma CVD method using, for example, a silane-based gas.

On the upper surface of the amorphous silicon layer 14, an n0 amorphous silicon layer 32 is laminated as an ohmic contact layer. This amorphous silicon layer 32 is formed for the purpose of facilitating the movement of electrons, which are carriers, and blocking the flow of holes, and is mainly made of a silane-based gas, such as a mixed gas of SiH4 and PH. formed by.

A data line 12 (FIG. 3) is further laminated on the upper surface of the n0 amorphous silicon layer 32 in FIG. It is set up. A source electrode 17 is formed at a predetermined location facing this drain electrode 15 in the horizontal direction and sandwiching a gate electrode 16 therebetween. Electrode 19 is connected.

The drain electrode 15 and the source electrode 17 usually have a laminated structure of high melting point metal and Al1, for example, Cr/A.
I2, Mo/AI2, Ti/AJ2, etc. are used.

A transparent electrode is used for the pixel electrode 19.

Further, a glass substrate 11 on which the pixel electrode 19 is formed
A protective film 33 for protecting TPTlB,
A light shield 35 that prevents light from being irradiated onto the channel portion 34 of the TPTlB from above is sequentially laminated. The protective film 33 is made of SiN or the like, and the optical shield 35 is made of A2 or the like. the lower substrate of the glass substrate 11)
A glass substrate 20 (upper substrate) is disposed opposite the glass substrate 11 in the upper part of FIG. It is formed in a line shape parallel to the

A plurality of counter electrodes 38 forming part of the photocells 37 are formed in a matrix on the lower surface of the transparent electrode 36, sandwiching a photocell 37 which is a photoelectric conversion element, and an insulating film 39 is formed between the photocells 37. It is formed. As shown in FIGS. 2 and 3, each of these opposing electrodes 38 is arranged so as to span the lower four pixel electrodes 19 with equal area in plan view. On the upper surface of one counter electrode 38, one photocell 37 is formed for each pixel electrode 19 that overlaps in plan view, that is, four photocells 37 are formed for one counter electrode 38. is formed, and as shown in FIG.
Four photocells 37 are arranged near the FT 18. The counter electrode 38 is made of a transparent conductive film such as ITO (I
ndium TinOxide) film and Nesa pus (SnO2
), and the II thickness is preferably in the range of 500 to 3,000 people, more preferably in the range of 1,000 to 2,000 people.

Here, a typical photocell has a Schottky charge storage type photoelectric conversion element composed of three layers, for example, metal/amorphous silicon/electrode.In this type of photoelectric conversion element, the electrode is made of ITO. Photoelectric conversion elements using a film and having a metal/amorphous silicon/ITO structure are mainly used. The photocell 37 according to the present invention uses, for example, a photoelectric conversion element of the above type, and as shown in FIG. 1, a part of the counter electrode 38 is used as an electrode part, and an amorphous silicon layer 4
0. It has a structure in which two layers of metal films 41 are stacked.

The material of the metal film 41 of the photocell 37 has heat resistance.

Ease of manufacture, electrical characteristics of the cell, etc. are taken into consideration, and for example, C
r is most desirable, and the thickness of the metal film 41 is preferably in the range of 1000 to 3000 A, more preferably in the range of 1200 to 2000 A, in consideration of light shielding properties.

The amorphous silicon layer 40 is for photoelectric conversion and is usually formed at low temperature by P-CVD method. Since the characteristics of the amorphous silicon layer 40 greatly influence the performance of the photocell 37, its electrical and optical characteristics are important. As for the characteristics of the photocell 37, it is desirable that the dark resistivity is 1×10 11 to lXl0”Ω・am, more preferably lXl0” to lXl0”Ω
・The range is approximately CM. In a range other than this, the photocurrent decreases, leakage current increases, and the S/N ratio decreases, which is not preferable. In addition, it is desirable that the optical band gap is 1.7 to 1.8 eV.
Further, the photocurrent is preferably 10-" to 10°A/m" for 550 nm incident light of 100 I2ux, and the thickness of the amorphous silicon layer 40 is 0.3 to 3 μm. It is desirable that the thickness be within the range of 0.5 to 2 μm, and more preferably in the range of 0.5 to 2 μm. A film thickness outside this range is not preferable because it results in a decrease in photocurrent and an increase in resistance component.

The insulating film 39 is for insulating between adjacent photocells 37 (FIG. 1). Various materials can be considered for this insulating film 39, but Si is a material that can be formed by a simple method.
It is desirable to use N, Sin, 5iON, or the like. It is desirable that the insulating film 39 be formed to have the same thickness as the combined thickness of the metal film 41 and the amorphous silicon layer 40 that constitute the photocell 37, and be flat.

An alignment film 42 is provided on the upper surface of the glass substrate 11 on which the active matrix type TPT circuit is formed and on the lower surface of the glass substrate 20 on which the photocell 37 is formed in order to orient the liquid crystal.
is formed. Although organic or inorganic materials can be used for the alignment film 42, good alignment characteristics can be obtained when organic polyimide is used. Orientation film 42
The film thickness is preferably 500 to 3000 people.

More preferably, the number is in the range of 1,000 to 1,500 people. Outside this range, it is not preferable because it may damage the alignment film 42 during rubbing or cause a decrease in liquid crystal layer capacity.

Further, a liquid crystal 43 is sealed between the glass substrate 11 and the glass substrate 20. The liquid crystal 43 is G, which is a nematic type (N, Δε>0) liquid crystal added with a dichroic dye.
The H (Guest Ho5t) mode is used.

By using such a liquid crystal for the liquid crystal 43, the light incident on the liquid crystal 43 when no voltage is applied is absorbed by the pigment,
The transmitted light that has passed through the liquid crystal 43 is colored. On the other hand, when a voltage is applied, the liquid crystal 43 is oriented perpendicularly to the glass substrate 11.20, so that the dye does not absorb light and the transmitted light becomes colorless.

Next, the relationship between the light-receiving area of the photocell 37 and the amount of accumulated charge will be explained.

Charge storage type photocell 37 used in the present invention
Then, the amount of accumulated charge Q3 during light irradiation is given by the following equation.

However, the measurements were made using monochromatic light of 555 nm as the irradiation light.

Q, = 6.58xLxSxt ・mL: Illuminance (I2
ux) S: Light receiving area of photocell (cm2) t: Irradiation time (accumulation time) (sec) Capacity CLC of liquid crystal 43 required to turn on the pixel now
Assuming that C is 1 pF, this capacitance CLC is (11
By substituting the accumulated charge amount Q6 in the equation, the light receiving area S and illuminance required for charging within a predetermined time can be determined.

When the driving frequency of the active matrix circuit is 30Hz, the illuminance of the light irradiated to the counter electrode 38 is 100J2ux.
If S≧4.8 am” (approximately 2.2 gm square), the battery can be charged to full capacity.

In the example shown in FIGS. 2 and 3, one pixel electrode 19
, the four opposing electrodes 38 overlap in plan view, and one photocell 37 is formed in each of the overlapping portions of these four opposing electrodes 38, so that this pixel electrode 19 If light is irradiated onto the four opposing electrodes 38 in the ON state, the liquid crystal 43 on the surrounding pixel electrodes 19 can be charged from the four photocells 37. Under the most severe rescue conditions, one photocell 37 must be able to charge the liquid crystal 43 on the pixel electrode 19 and turn on the liquid crystal 43. Under this condition, the amount of accumulated charge Q@ of the photocell 37 is 3
/4CLc=0.75pF, (from formula 11, the light-receiving area of the photocell 37 required to light up the liquid crystal 43 only needs to be S≧3.24μm1 (approximately 1.8μ river angle). Another example of the number of photocells 37 formed on one counter electrode 38 is shown in FIG. 2 photocells per piece 3
7 are formed, and eight photocells 37 are formed in the entire counter electrode 38.

In the previous example in which only one photocell 37 is formed in the counter electrode 38 for one overlapping pixel electrode 19, if the photocell 37 does not operate due to a circuit defect, it is impossible to rescue the defective pixel. Can not. Therefore, it is desirable to form a plurality of photocells 37 in the counter electrode 38 for one overlapping pixel electrode from the viewpoint of more reliable relief of defective pixels. By forming the cell 37,
Since the light-receiving area of each photocell 37 can be reduced, even if the pixel area is reduced due to high definition, the photocell 37 will not be noticeable on the pixel, improving image display. be able to.

Next, the operating principle of defective pixel relief in this display device will be explained.

In FIGS. 2 and 3, if we pay attention to the pixel electrode Tr-5, this pixel electrode Tr-5 is connected to the counter electrode E-6.
, 7, 10, and 11 overlap each other by 174 areas in plan view. The pixel electrode Tr-5 is now in the 0FF (dark) state, and the surrounding pixel electrodes Tr-1, 2, 3, 4, 6,
Assuming that 7, 8, and 9 are all ON (bright), O
Light is irradiated onto the counter electrode 38 in 1/4 area units located on the pixel electrode in the N state. In the photocell 37 within this 1/4 region, a photocurrent is generated by the transmitted light from below, and charges are accumulated. Table 1 shows 174 areas of the counter electrode 38 that are irradiated with light. Here, each 1/4 area of the counter electrode 38 is numbered, and for example, the upper left 1/4 area of the counter electrode E-6 is displayed as E-6-1.

Table 1 As is clear from Table 1, the opposing amount %E-6, 7, 10, 11 that overlaps with the pixel electrode Tr-5 in plan view is the 174 area of the opposing electrode located on the pixel electrode Tr-5. (E
-6-4, E-7-3, E-10-2, E-11-1)
becomes OFF, and the remaining three 174 areas (E-6-
1,2,3, E-7-1,2,4, E-10-1,3,
4, E-11-2, 3, and 4) are in the ON state.

A photocurrent is generated in the photocell 37 in the counter electrode that is in the ON state, and charges are accumulated in each of the pixel electrodes Tr=5.
The liquid crystal 43 above area 74 is charged.

Next, the principle of repairing a pixel electrode which is in an OFF state due to a circuit defect is shown in FIGS. 5(a) to 5(C). Here, the block surrounded by a frame indicates one counter electrode 38, and as shown in FIG. It is divided into four areas, and one photocell 37 is arranged in each of these 1/4 areas. Also, l/4 of one pixel electrode 19
When the liquid crystal 43 on the area receives charge from three photocells 37, the amount of accumulated charge is +3, and two of the photocells 37
The amount of charge when receiving charge from one of the photocells 37 is +2, and the amount of charge when receiving charge from one of the photocells 37 is +1. Further, the arrows indicate the direction of charging between the 1/4 region of the counter electrode 38 and the liquid crystal 43 on the 1/4 region of the pixel electrode 19.The numbers for each of the 174 regions of the counter electrode 38 are shown in FIG. refer.

FIG. 5(a) shows a case where the pixel electrode 19 in the OFF state occurs alone (Tr-5, black (filled part). In this case, the counter electrode E-6 located at the upper left
If we pay attention to the 174 areas of this counter electrode E-6, there are three areas (E-6-1, E-6-1,
2 and 3), the three photocells (not shown) turn on, and the pixel electrode Tr is turned on as shown by the arrow.
-5-1 is charged from three photocells.

Therefore, the liquid crystal charge amount in the pixel electrode Tr-5-1 is +3. Since the pixel electrodes Tr-5-2, Tr-5-2, Tr-5-3, and Tr-5-4 are also charged from three photocells as shown by the arrows, the liquid crystal charge amount becomes +3. The charged state is shown on the cloth in the figure.

FIG. 5(b) shows the pixel electrode Tr-5°Tr- in the OFF state.
This shows the case where two 8's occur side by side (the blacked out part). Regarding the 1/4 area (Tr-5-1, 2) located in the upper row of the figure of the pixel electrode Tr-5, light is irradiated from three 174 areas of the corresponding counter electrodes E-6 and E, respectively. Therefore, as shown by the arrow, it is charged from three photocells, and the amount of charge on the liquid crystal in this area is +3
becomes.

The 1/4 region (T
Regarding r-5-3, 4), since light irradiates the two 174 areas of the corresponding counter electrodes E-10 and E-11, the liquid crystal charge amount of Tr-5-3, 4 is +2 becomes.

l/4 region (Tr
-8-1, 2), respectively, the counter electrode E-10
, E-11 correspond to Tr-5-3 and Tr-5-4, and the 1/4 area of the counter electrode 38 that is irradiated with light is two, so the liquid crystal charge amount of Tr-8-1 and Tr-8-2 is becomes +2.

1/4 region (Tr
Regarding Tr-8-3, 4), the number of 174 regions of the counter electrode 38 that is irradiated with light is three, as in the case of Tr-5-1, 2, so as shown by the arrow, Tr-8-3, 4 The liquid crystal charge amount is +3. The charged state is shown on the cloth in the figure.

FIG. 5(C) shows three pixel electrodes (Tr-5,
Tr-8, Tr-9) occur in an L-shape (
(blacked out areas). 1 of the counter electrodes 38 that are irradiated with light in the same manner as in FIGS. 5(a) and 5(b) above.
The number of /4 areas is determined by the number of overlapping areas with the 1/4 area of the pixel electrode 19 in the OFF state.
The liquid crystal 43 on the 74 area is charged from the direction shown by the arrow in the figure, and the amount of liquid crystal charge in each 1/4 area of the pixel electrode 19 has a value of +3, +2, or +1 as shown by the cloth in the figure. ing. When the pixel electrodes 19 in the OFF state are arranged in an L-shape as described above, a 1/4 region where the liquid crystal charge amount is +1 occurs, unlike in FIGS. 5(a) and 5(b). The liquid crystal charge amount on each of the 174 areas of the pixel electrode 19 takes a value of +3, +2, or +1, so if the amount of accumulated charge per photocell 37 is set appropriately for the liquid crystal capacitance, the liquid crystal charge amount on the defective pixel can be reduced. 43 can be controlled to turn on or off, and defective pixels can be repaired.

In the present invention, since the photocell 37 is turned on and off by the transmitted light from the glass substrate 20, it is not preferable that the photocell 37 be irradiated with light from other places, for example, transmitted light from above. For this reason, in the second embodiment of the present invention, a metal film 41 is formed above the photocell 37.

In the TN type liquid crystal display mode, the alignment direction of the liquid crystal is changed by applying an electric field in the vertical direction of the glass substrate.
In the present invention, in addition to the normal liquid crystal display mode, a plurality of counter electrodes formed on the lower surface of the upper substrate straddle a plurality of lower pixel electrodes in plan view. At least one photoelectric conversion element is formed on each counter electrode. Therefore, when light irradiates the counter electrode located on the normal pixel electrode around the defective pixel area, the electro-optic material is charged by the photoelectric conversion element that receives the transmitted light, changes its orientation, and allows light to pass through. Make it.

That is, in the display device according to the present invention, when a pixel becomes undisplayable due to a defect such as a TPT, light transmitted through an adjacent displayable pixel section enters the photoelectric conversion element,
An electric field is applied in the direction of the upper and lower substrates by the current generated in this photoelectric conversion element, and this electric field orients the liquid crystal, making it possible to transmit light.

1 lull Eleven embodiments according to the present invention will be described below.

(1) First, an active matrix type TPT circuit was formed on a glass substrate 11 by the following method.

1000 Cr layers for address lines 13 (gate electrodes 16) were deposited on a thoroughly cleaned 5-inch square glass substrate, and then a pattern was formed by photoetching. The channel length of the switching element (TFT 18) was 10 μm, and the channel width was 200 μm. Note that the address line 13 and the data line 12
were set to 256 each.

Thereafter, the glass substrate 11 was set in a plasma CVD apparatus, the inside of the vacuum chamber was evacuated, and the glass substrate 11 was heated to set the substrate temperature to 300°C. When the degree of vacuum inside the vacuum container becomes less than 1 O-'Torr, the exhaust system is switched to a mechanical booster pump (MBP) by a diffusion pump (DP), and 100% SiHa is pumped to 8S via a mass flow controller (MFC).
CCM, 40SCCM of NH3, 80SCC of N2
The reaction pressure was adjusted to 0 and 5 Torr by flowing M, respectively. 13.56M when the pressure becomes constant
A 50 W Hz RF power was applied to form a SiN gate insulation layer of 1 g 3.1 for 20 minutes. The gate insulating film 31 thus formed had a refractive index of 1.82, an optical band gap (Eg) of 5.1 leV, and a dielectric constant of 6.1. The film thickness was 3000 people.

Next, 1000 people formed an amorphous silicon layer 14 as a semiconductor layer on the SiN gate insulating film 31 in the same plasma CVD apparatus. Formation conditions are 1000%SIH4
was IOSCCM, the reaction pressure was 0.2 Torr, and the RF power was 100 W. The film forming time was 8 minutes. The electrical properties of the amorphous silicon layer 14 formed as described above are as follows: dark specific resistance ρd = 2XlO''Ω'cm, activation energy Ea = 7eV.

The optical properties were Eg = 1.75 eV.

Next, 1,500 SiN protective films 33 were deposited on the amorphous silicon layer 14 using the same plasma CVD apparatus. The film formation conditions are the same as for the SiN gate insulating film,
After the film formation time was 10 minutes, the sample was taken out and photoetched to remove only the amorphous silicon layer 14 and the protective film 33 constituting the TPT 18, leaving only the amorphous silicon layer 14 and the protective film 33. Next, after removing the resist, a resist is applied again, and the protective film 33 in the source/drain portions is etched away by photo-etching.

After that, the substrate temperature was increased to 120°C using the plasma CVD equipment again.
An n4 amorphous silicon layer 32 was formed at .degree. The formation conditions were 100% S I H4 in IOSCCM.

10 SCCM of 1% H2-based pH was applied, 100 W of RF power was applied at a reaction pressure of 0.2 Torr, and 4
There were 500 people involved in the 6 film thicknesses that were subjected to split film formation. This 0
The characteristics of the amorphous silicon layer 32 were determined from a separate experiment: ρd=500Ω-cm, Ea=0.2eV,
Eg=1.7eV.

After forming the thin film using the plasma CVD device, the glass substrate 11 is set in a vacuum evaporation device, and the drain electrode 1 is
5 (data line 12) and source electrode 17
500A was formed by heating tungsten. Next, the resist of the sample other than the source/drain (data line) portions was removed by a lift-off method. Thereafter, the glass substrate 11 was set in an RF sputtering device, and a 100 OA film of ITO was formed as a pixel electrode 19.

Film forming conditions are 30SCCU for 02 and 20SC for Ar.
C.U.

The reaction pressure was set to l x 10-'' Torr for 5 minutes, and then a pattern was formed by photo-etching. The dimensions of the pixel area were 300 x 300 m2, and the aperture ratio was 70%.

After that, the glass substrate 11 was set in the vacuum evaporation apparatus again, and Al1 was applied to the entire surface of the sample at a concentration of 1.0% by electron beam evaporation.
μm was formed. After that, Al1 at the top of the channel was removed by photoetching again with a phosphoric acid aqueous solution.
Data line 12. A drain electrode 15 and a source electrode 17 were formed.

Next, 1LLI 11 of SiN protective film 33 was formed at a substrate temperature of 200° C. in a plasma CVD apparatus. The formation conditions were 100% SiH<8 SCCM, NH3 20
SCCM, N2 flowing at 80SCCM, reaction pressure 0.5
RF power of 50 W was applied at Torr, and film formation was performed at 2 o'clock.

Thereafter, 1,500 people vapor-deposited A2, which will become the light shield 35, on the glass substrate 11 using a vacuum evaporation apparatus, and then photo-etched it to leave an Aε pattern only in the channel portion.

(2) Next, 37 groups of photocells, which are one of the photoelectric conversion elements, were formed on the glass substrate 20 by the following method.

IT to become a transparent electrode 36 on a 90 mm square glass substrate 20
After 1,000 O films are deposited, lines are formed on the glass substrate 20 along and on both sides of the address line 13 by a photo-etching process. These lines are 90mm
It is electrically connected at the end of the square ITO film, and is further connected to extraction electrodes provided at four corners of the glass substrate.

Thereafter, 1,200 pieces of Cr, which will become the metal film 41 constituting the photocell, was vapor-deposited on the entire surface of the glass substrate 20, and then the metal film 41 was formed into a 3 μm square by etching.

Next, a 1 μm thick SiN film, which will become the insulating film 39, was formed on the glass substrate 20 using a plasma CVD apparatus. The film forming conditions are the same as those for the protective film 33 of the active matrix type TPT circuit. This insulating film 39 was removed by photoetching only the portion where the metal film 41 was formed.

Thereafter, a lam film of amorphous silicon was formed on the entire surface of the glass substrate 20 using a plasma CVD apparatus. The film forming conditions were a substrate temperature of 200°C, 100% S I H4, and I
O3CCM, reaction pressure 0.2 Torr, RF power 1
00W was applied and open film formation was performed for 1 hour and 20 minutes. Thereafter, a photocell 37 was formed by photoetching, leaving amorphous silicon only in the area where the metal film 41 was formed.

Next, the glass substrate 20 is
1000 TTO films were formed thereon to form the counter electrode 38. The film forming conditions are the same as those for the pixel electrode 19 of the active matrix TPT circuit. Thereafter, a Bakun counter electrode 38 shown in FIG. 3 was formed by photoetching.

The characteristics of the photocell 37 fabricated in this manner are described in the sixth section.
FIG. 6 shows the voltage dependence of the photocurrent density in the photocell 37. When a 550 nm fluorescent lamp is used, there is little voltage dependence when irradiating light at 100 lux, and a fairly constant output is obtained.

FIG. 7 shows the dependence of the photocurrent density in the photocell 37 on the illuminance of the irradiated light. The photocurrent density increases linearly as the illuminance increases.

(3) A polyimide-based alignment film 4 is applied to the circuit surfaces of the glass substrate 11 and the glass substrate 20 formed as described above.
After forming 1000 pieces of 2 by screen printing,
Baking was performed at 250°C for 30 minutes. Thereafter, a rubbing process was performed to align the alignment film 42 in parallel.

After the rubbing treatment, spacers with a diameter of 6 μm are scattered, and an ultraviolet curing resin is printed around the glass substrate 11.20, and silver paste is printed on the corners. After that, both boards 1
1.20 were pasted together so that the orientation direction was the same, and after curing the resin by irradiating it with ultraviolet rays, it was heated at 200℃ for 3
Baking was performed for 0 minutes.

Next, in the cell that was pasted together, a negative liquid crystal with 1.5
A mixture of % by weight of black dichroic dye was injected and sealed. Finally, a polarizing film was attached to the lower surface of the glass substrate 11 so that the polarizing plane coincided with the alignment direction of the liquid crystal 43.

The following display tests were conducted on the display device of this example manufactured according to (1) to (3) above. The address line 13 and data line 12 were driven by interlace scanning with a frame frequency of 30 Hz. Address line 13 has +15V when ON, OV when OFF
A voltage of OV is applied to the data line 12 when it is ON,
A voltage of +10μ was applied when it was OFF.

The input pattern into the display device under such conditions is shown in FIG. 8(a), when a voltage of -10V is applied to the metal film 41 constituting the photocell 37 and the illuminance of the backlight is set to 2000I2ux. , the display result corresponding to the human cover turn is shown in FIG. 8(b). Figure 8(b)
As shown in FIG. 8(a), thin lines and independently existing pixels that were not lit (OFF state) are now lit (OFF state).
(N state), and the display has been restored to a state where the flower character rJ can be sufficiently read. From the results of this display test, it was found that the present embodiment is effective for repairing defective pixels, and that it is also effective for single-image processing since noise can be removed.

As is clear from the above description, the display device according to the present invention includes a lower substrate, an upper substrate disposed opposite to the lower substrate, and an intervening space between the lower substrate and the upper substrate. A display device including an electro-optic material mounted on the lower substrate, pixel electrodes being arranged in a matrix on the lower substrate, and switching elements for driving each of the pixel electrodes being arranged, A plurality of counter electrodes are formed on the lower surface of the upper substrate, and each of these counter electrodes is disposed astride a plurality of lower pixel electrodes in plan view, and each counter electrode has at least one electrode. Since a photoelectric conversion element is formed, even if there is a defective pixel due to a defect in a switching element, the photoelectric conversion element is activated by receiving transmitted light from normal pixels around the defective pixel, and this photoelectric conversion is performed. An electric field is applied to the electro-optic material by the current generated in the element, and this electric field can change the electro-optic effect of the electro-optic material to repair a defective pixel. Moreover, unlike the conventional display device, there is no need to separately provide a TPT or wiring line for defective pixel relief, so the LCD can be driven using a simple driving method without hindering high definition. Further, since the display device of the present invention not only relieves defective pixels but also has a noise removal function, it can be applied to image processing such as noise removal without providing multiple liquid crystal panels.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of essential parts showing an embodiment of a display device according to the present invention, FIG. 2 is an enlarged perspective view for explaining the arrangement of pixels and counter electrodes, and FIG. 3 is a diagram of the display device. Schematic plan view, 4th
The figure is a schematic plan view showing another embodiment of the display device, and FIG.
a) to (c) are schematic plan views of a display device for explaining the operating principle of defective pixel relief, FIG. 6 is a diagram showing charging current density-voltage characteristics of a photocell, and FIG. 7 is a diagram showing charging of a photocell. A diagram showing the relationship between the flow density and the intensity of irradiation light, Figure 8 (a) (
b) is a plan view showing a display pattern of the display device, FIG. 9 is a plan view showing a conventional active matrix type TPT circuit, and FIG. 10 is a sectional view of the main part of the display device. 11...Glass substrate (lower substrate), 18...TPT
(switching element), 19...pixel N pole. 20...Glass substrate (upper substrate), 43...Liquid crystal (
Electro-optical material), 37... Photocell (photoelectric conversion element), 38... Counter electrode, 40... Amorphous silicon layer (photoelectric conversion element), 41... Metal film (photoelectric conversion element) 2nd Figure 3 Figure 4 Figure 5 (a) 11-9% 1r-5-219 Figure 5 (C) lr-! l-37r-9-41'd 11,1
Figure 6 Figure 7 Figure 9 Figure 10 ↑ ↑I◇↑ ↑2Z

Claims (1)

[Claims] A display device including a lower substrate, an upper substrate disposed opposite to the lower substrate, and an electro-optic material interposed between the lower substrate and the upper substrate, wherein a pixel electrode is provided on the lower substrate. Switching elements are arranged in a matrix and for driving each of the pixel electrodes;
A plurality of counter electrodes are formed on the lower surface of the upper substrate,
A display device characterized in that each of these counter electrodes is arranged so as to span a plurality of lower pixel electrodes in a plan view, and each counter electrode is formed with at least one photoelectric conversion element.