JPH02305025A - Control circuit and method for linearizing output frequency of voltage control oscillator - Google Patents

Abstract

PURPOSE: To indirectly determine the frequency of a controllable oscillator by predicting the output frequency of a voltage controlled oscillator VCO in a given time during a sweep cycle. CONSTITUTION: When a mixer 24 gives a reception signal to a display device 48, a spectrum analyzer circuit 10 measures the time, which elapsed from the beginning of the sweep cycle, to use a microprocessor MPU 130 for indirect confirmation of the accurate frequency of a VCO 92. By detecting the frequency of the VCO for the occurrence of a difference signal in the output of a mixer 24 or a difference frequency allowed to pass through by a filter 30, the MPU 130 can discriminate the frequency of the reception signal which cannot be detected without doing so. A sweep generator circuit 55 linearizes a frequency sweep given to an output terminal 98 of the VCO 92 with respect to time and control voltage to determine the time when the frequency of the reception signal encounteres a desired signal in the sweep cycle. Thus, the frequency of the VCO 92 is indirectly determined.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention generally relates to waveform generator systems and methods. In particular, the present invention relates to such a system and method suitable for use in a sweep control circuit of a spectrum analyzer.

BACKGROUND OF THE INVENTION Modern electronic systems and in particular, for example, spectrum analyzers, often require sweep systems in which a signal with a continuously varying or "swept" frequency is applied to one input of a mixer. 1818 applied thereby allowing it to sample other receivers applied to other inputs of the mixer. The resulting frequency sum or difference of these two input signals provides a mixer output signal having a frequency that is within a particular frequency band. The mixer's input signal with a continuously varying frequency can be provided by a voltage controlled oscillator (VCO), which is a frequency-determining oscillator with a magnitude actance that changes in response to changes in the magnitude of the control signal. A VCO may include a circuit, and more particularly a varactor that changes capacitance in response to a control voltage having a varying magnitude. The magnitude of the control voltage may be in the form of a "sawtooth" waveform, for example.

In some applications, such as those involving spectrum analyzers, the VCO may be used at least at selected times so that the frequency of the other input signal of the mixer can be determined.
It is desirable to determine the frequency of the VCO, but direct measurement of the VCO's frequency is too expensive for some commercial test equipment applications. Determine the 700 frequencies of conventional technology □
Indirect methods are complicated by the nonlinearity of the voltage versus capacitance characteristics of varactor diodes. The frequency versus voltage characteristics for such diodes can be either concave or convex.

Furthermore, prior art methods of linearizing the frequency versus voltage characteristics of such varactor diodes have generally been successful only over limited frequency ranges due to the complex nature of such characteristics. Linearization becomes impractical when it is desired to utilize the VCO over a wide frequency band and/or a wide temperature range. More specifically, some prior art methods utilize diodes to provide analog junction voltages for compensation. The properties of such diodes also tend to vary with temperature. Additionally, these analog linearization techniques often require each CO to be compensated for individually by the tester. Such manual adjustment or calibration procedures are expensive and time consuming.

Additionally, even if prior art compensation is properly achieved at a particular time, the characteristics of Vco or other circuits may change over time or with other factors and therefore require periodic recalibration. . The accuracy of the spectrum analyzer may constantly deteriorate during these calibrations.

Another prior art solution to the above-mentioned problem is a read-only memory (R
This solution also cannot compensate for changes in system characteristics over time; moreover, a thermistor can be used in conjunction with a look-up table to compensate the system at various temperatures. be done. However, this solution can be software intensive and take up a large amount of microprocessor time. Furthermore, such techniques do not take into account electrical characteristics that change over time, so the accuracy of such systems also begins to deteriorate immediately after each calibration and after each recalibration.

SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide a system and/or method for indirectly determining the frequency of a controllable oscillator.

Another object of the present invention is to provide a system and/or method for controlling a variable frequency oscillator that self-calibrates against changes in characteristics due to aging, temperature changes, and the like.

Yet another object of the present invention is to provide a system and/or method for controlling the amplitude of a waveform over time.

[Means and operations for solving the problem] In one embodiment, a control circuit for linearizing the output frequency of the vCO with respect to time includes a first control circuit selectively coupled to a control terminal of the vCO. , the first control circuit provides a control voltage having a selected magnitude to operate the VCO at a predetermined frequency within a frequency band.

These frequencies can be, for example, frequencies at the low end, frequencies at the center and frequencies at the high end of the band. A measurement circuit is coupled to the VCO to determine a selected magnitude of the control voltage corresponding to the predetermined frequency.Next, an adjustable sweep generator is selectively coupled to the VCo to determine a selected magnitude of the control voltage corresponding to the predetermined frequency. Vary the magnitude of the control voltage to the VCO at the nominal frequency. A second control circuit, which may include a microprocessor with memory, is coupled to the adjustable sweep generator and to the VCO. The memory records when the magnitude of the control voltage reaches the magnitude selected for operating the vCO at a predetermined frequency. Adjust the frequency of the clock generator so that the output frequency of the VCO reaches the center frequency at a time in the middle of the sweep cycle, so that the output frequency of the VCO is predictable at any given time during the sweep cycle. Make it.

The output of the VCO is suitable for operating a spectrum analyzer controlled by a microprocessor.

BRIEF DESCRIPTION OF THE DRAWINGS The above and other objects, features, and advantages of the present invention will be better understood from the following detailed description taken in conjunction with the accompanying drawings.

FIG. 1 is a block diagram of the spectrum analyzer 10. An antenna 12 or other signal input means transmits the received signal to be examined or processed to the first mixer 1.
One manually variable local oscillator 18 provides a first input terminal 14 of mixer 16 and another input signal to a second input terminal 20 of mixer 16 . The input terminal 22 of the second mixer 24 is connected to the output terminal 26 of the first mixer 16 . An output terminal 27 of the second mixer 24 is connected to an input terminal 28 of the narrowband filter 30 . Detector 3
The input terminal 32 of the filter 30 is connected to the output terminal 36 of the filter 30. The output terminal 38 of the detector 34 is connected to the input terminal 40 of the display control circuit 42, and the display control port 1i 1842 has the output terminal 44 connected to the input terminal 46 of the display device 48.

The input terminal 50 of the second mixer 24 is configured to receive a "sweep frequency" or sweep that varies cyclically between predetermined upper and lower frequency limits.

This frequency can be varied from a predetermined lower limit to an upper limit, for example in a stepwise manner, increasing continuously. Assuming that the frequency of the mixer sweep signal and the frequency of the received human power signal provide a desired predetermined difference frequency at the output of the second mixer 24 that is within the passband of the filter 30, the detector 34 and the display controller 42 In other applications, the frequency of the received input signal and the second mixer 24 may process and pass the desired signal for display on a cathode ray tube (CRT) 52 of the display device 48.
The sum of the frequencies of the outputs of can be used.

The sweep generator circuit 55 is configured to generate a radio frequency (RF) signal sweep from 0.4 MHz to 100 kilohertz (KHz) around a desired center frequency of, for example, 0.4 MHz to 100,100 Hz. A digital-to-analog (D-A) converter 64 includes a variable frequency sweep clock generator 56 having an output terminal 58 connected to an input terminal 60 of a counter 62.
It has an input terminal 66 connected to an output terminal 68 of. An output terminal 70 of the DA converter 64 is connected to an input terminal 72 of a DA vernier gain adjustment circuit 74, which includes an output terminal 76 connected to an input terminal 78 of a step attenuator 80. A single-pole, double-throw switch 82, which can also be provided in solitary state form, is connected to an attenuator 80.
A variable N divider circuit 94 includes a first input terminal 84 connected to an output terminal 86 of C092, and an output terminal 88 connected to a control terminal 90 of VCO 92. including. The phase detector 100 is connected to the output terminal 10 of a stable reference frequency oscillator 106.
A divide-by-N circuit 94 including an input terminal 102 connected to
The output terminal 108 of the phase detector 100 is the other input terminal 1 of the phase detector 100.
10. Loop filter 112 has input terminal 11 connected to output terminal 116 of phase detector 100.
A second input terminal 118 of switch 82, including 4, is connected to an output terminal 120 of loop filter 112,
Circuits 94, 106, 100, 112, when connected to VCO 92, provide a phase locked loop (PLL) that locks VCO 92 at a stable, predetermined frequency that varies with "N" of circuit 94 in a known manner. Control terminal 90 of vCO 92 is also connected to an input terminal 122 of an analog-to-digital (A-D) converter 124.

Microprocessor (MPU) 1, which may be in a known format
30 includes a plurality of input and output terminals, each receiving and transmitting information and control signals related to the control of the spectrum analyzer 10; more particularly, the terminal 132 is the output terminal 1 of the A-D converter 1-4.
A terminal 136 of the 0 MPU is coupled to a control terminal 138 of the clock generator 56 and is coupled to a control terminal 138 of the clock generator 56 to determine the clock rate thereof. Change selectively.

Generator 56 may include a programmable divide-by-N circuit to provide frequency adjustment. A terminal 140 of the MPU is coupled to an output terminal 142 of counter 62. The control terminal 144 of the D-A converter 64 is M
It is coupled to terminal 146 of the PLJ. A control terminal 148 of gain adjustment circuit 74 is coupled to a terminal 150 of the MPU.

The vernier gain adjustment circuit 74 is controlled by the microprocessor 130.
The control voltage is used to enable fine tuning of the output of the D-A converter 64, thereby ensuring that a control voltage having a desired magnitude is applied to the terminal 90 of the C092.

A step attenuator control terminal 152 is coupled to a terminal 154 of the MPU. Control terminal 156 of electronic switch 82 is coupled to terminal 157 of MPU. The output terminal 158 of the MPU is coupled to the control terminal 160 of the divide-by-N circuit 94 of the PLL. ROM 162 includes an output terminal 164 coupled to MPU terminal 166, and MPU output terminal 168 coupled to ROM input terminal 169. The calibration (cal 1brate) initiation control function is performed by block 170 connected to terminal 172 of the MPU.
This is done by Block 170 may, for example, be a front panel switch that a user operates to initiate a calibration sequence.

The output terminal 174 of the MPU is connected to a control terminal 175 of the display control circuit 42 and to a control terminal 176 of the display device 48. A frequency range controller 178, which cooperates with attenuator 80 to control the sweep range and center frequency, is connected to the control terminal 179 of the MPU.

The spectrum analyzer circuit 10 in FIG.
0 is used to indirectly confirm the exact frequency of VC092 by measuring the time elapsed from the beginning of the sweep cycle when mixer 24 provides the received signal to display device 48. Knowing the frequency of CO and the difference frequency passed by filter 30 when the differential signal appears at the output of mixer 27 allows MPU 130 to determine otherwise unknowable frequencies of the received signal6. The circuit 55 has V for time and control voltage.
To accomplish this function, the frequency sweep applied to the output terminal 98 of the CO 92 is linearized so that the frequency of the received signal can be determined by determining when the desired signal is encountered during the sweep cycle. Therefore, circuit 55 is calibrated by operating switch 82 to a first or "phase locked" position connecting terminal 88 to terminal 118. Switch 82 is then operated to the second or "open loop" position where terminal 88 is
4 to complete the calibration procedure 11N.

A calibration sequence can be initiated, for example, by manually varying the frequency range by operation of circuits 80 and 178 or by operation of calibration block 170. The display device 48 is the sweep generator 5
5 is inactive by the MPU 130 during calibration. At the beginning of the calibration sequence, MPU 130 places VCO 92 in a phase-locked state by operating switch 82 to the first state; reference frequency oscillator 106 applies a reference signal to first input 102 of phase detector 100; do.

This signal is compared with the output signal of N-divider port F# 194 to provide a control signal to the phase detector output terminal 116. After filtering by filter 112, the control signal is applied to the VCO
92 to control terminal 90. terminal 9
The output signal of VC092 at
Applied to 0. Therefore, the output frequency of VCO 92 is precisely controlled to be "N" times the frequency of oscillator 106 in a known manner.

rN”, the MPU 130 controls the VCO 9
0 frequency is adjusted to be any one of multiple multiples of a reference frequency provided by oscillator 106. Therefore, the range determination block 1 is determined by the operator.
78, MPU 130 controls Nj and thereby VCO 92.
is made to operate at a frequency at the center of the band (FC), then at a frequency at the low end of the band (Fl), and then at a frequency at the high end of the band (Fh). These values of N for the band of interest can be obtained by MPU 130 from ROM 162, for example. The A-D converter 124 controls the control voltage V1 at the CO control terminal 90 corresponding to each of F, F and Fh.
, ■, and operates as a digital voltmeter to measure the magnitude of Vh.

More specifically, with reference to FIG. 2A, abscissa axis 18
0 indicates the frequency and the ordinate axis 182 indicates the magnitude of the control voltage required at the control terminal 90 of the VCO 92 to generate the corresponding frequency.
4 is the control voltage applied to the control terminal 90 and the VCO
92 and the frequency of the output signal produced at output terminal 98 of FIG.

The first step in the calibration method is to program N split aperture 894 by MPU 130 so that N has the proper size to cause VCO 92 to operate at the frequency FC indicated by point 186 on abscissa axis 180. It is started by While VCO 92 is operating at F 2 , MPU 130 operates at a corresponding control voltage, indicated by level 192 on ordinate axis 182 . , then the MPU 130 varies "N" so that the VCO 92 operates at the frequency (Fl) indicated by point 194 on the abscissa axis 180 of FIG. 2A.

A/D converter 24 again converts the magnitude of the control voltage obtained into a digital signal, which is stored by MPU 130 as level V+, indicated by level 188 in FIG. 2A.

Next, the MPU 130 again selects point 1 on the abscissa axis 180.
The high frequency (Fh) indicated by 95 is set to VCO92
Change "N" so that it can be provided. level 1
The corresponding control voltage (Vh) indicated by 96 is also stored in MPU 130.

To begin the second step of the calibration sequence, the MP
U130 operates switch 82 to the second position thereby connecting terminal 86 to terminal 88. MPU 130 then instructs the divide-by-N circuit of sweep clock generator 56 so that generator 56 provides an output signal having a constant, nominal or average sweep frequency. Counter 62 counts each pulse from sweep generator 56 in a known manner and outputs 68
Provides a growing digital count.

DA converter 64 converts the output of counter 62 to an increasing magnitude stair step voltage 200 as shown in FIG. 2B. Ordinate axis 20 in Figure 2B
1 indicates the magnitude of the CO control voltage and the abscissa axis 202
measures the sweep time. MPU 130 in conjunction with A-D converter 124 then determines the control ag voltage at terminal 90 of VCO 92 at time T+, indicated by point 204 on abscissa 202 corresponding to 1;
Note time T2, indicated by point 206, where the control voltage on terminal 90 of VCO 92 corresponds to vc, and time Th, indicated by reference numeral 208, where the control voltage on terminal 90 corresponds to 1. These times can be stored in the form of a number of counts corresponding to the MPU 130 1 control voltage at the nominal frequency of the generator 56 from V+ to ■, for example, as shown in FIG. 2B.

It takes 8 counts to change the voltage from VC to Vh and 12 counts to change the voltage from VC to Vh.

This is shown by curve 184 in FIG.
This is because the frequency of O92 changes more at low frequencies than at high frequencies for a given change in voltage.

Then, as a third step, the MPU 130 is programmed by software to calculate the first counter frequency OF, according to the following equation, where NF is the nominal frequency of the clock 56.

C0IJNTS(T, to T2)
8CF1=xNF=-NF
1/2 C0UNTS(T, to Th) 1
0th order, MPU 130 calculates the second counter frequency CF 2 according to the following equation.

C0tlNTS(T2toTh) 12C
F2= xN F=-N F1/
2 C0UNTS(T, to Th) 10 These formulas are the center frequency F. The control voltage V to provide T at half or midway between the full nine-foot period between T and Th. clock 5 to occur at
6 is configured to calculate the frequency for 6.

To illustrate the third step, the second C[] includes an abscissa axis 210 for measuring time and an ordinate axis 212 for measuring the magnitude of the control voltage for the VCO 92; The device 56 operates at 0.8 of the nominal frequency between time T1 indicated at point 211 and time TC indicated at point 215 and 1.2 of the nominal frequency between time T and Th indicated at point 217. command to operate. Therefore, T.

F, as indicated by dotted line 213 in FIGS. 2A, 2B, and 2C, rather than at T2 in FIG. 2B. Occurs in Therefore, characteristic 214 of FIG. 2C is given between T1 and Tc and characteristic 216 is given between T1 and Tc.
given during h.

As a result, VCO92 is VC09 rather than between T1 and TC.
2 tends to receive more tarok pulses during times T and Th, which are less sensitive, to compensate for nonlinearities in the frequency versus control voltage characteristic 184 of VCO 92 (shown in FIG. 2A). The calibration mode is now complete.

Characteristic 218 in FIG. 2C is formed by the combination of characteristics 214 and 21-6. After characterization 218 of clock generator 56 is initiated by MPU 130, 218 is repeated until a new calibration is required. - by way of example, 300 and 310 occurring at the input terminal 14 of the mixer 24;
The band of reception frequencies between megahertz (Ml-[z) is VCO9 giving frequencies between 280 and 290 MHz.
2 to provide a 20 MHz difference frequency selected by narrowband filter 30. CTR 52 of display device 48 is measured at time T on axis 210 of FIG. 2C.
1, the display triggering force and the time since the occurrence of the received signal are measurements of the unknown frequency of the received signal.

More specifically, FIG. 3 shows an enlarged view of a portion of the screen of CRT 52. The displayed waveform 224 shown at T5 on the abscissa axis 220 is 305M, with the abscissa axis 220 indicating frequency and the ordinate axis 222 indicating power amplitude.
Corresponds to the frequency of the unknown signal occurring in Hz. Other signals centered at 310 MHz, represented by waveform 226, can be tuned to the center of the display, for example, by adjusting the manual adjustment of variable local oscillator 18.

In the actual device, T and T are shown on axis 210 in FIG. 2C. 0. full sweep between 256 licks
Steps can be used. In this case, 2T is 12
8 steps or counts will occur, TI will occur at 28 counts and Th will occur at 228 counts, so the number of counts between T1 and Th is 200. Counter 62 can be programmed to continuously vary frequency to provide nearly perfect linearity;
But over a cycle to meet many specifications,
As explained earlier, only two changes of the count are required.

Operator control of variable local oscillator 18 allows waveform 226 to be moved to the center of the display shown in FIG. This is advantageous since it is known that the system is calibrated at the center frequency FC. Additionally, the sweep generator system 55 is designated by reference numeral 23 in FIG.
It is found to be calibrated at frequencies F+ and Fh, denoted 0 and 232, respectively. A slightly less rigorous calibration at points between F, F and C and Fh generally poses no problem; linearization of the entire display adds cost and complexity to the system and possibly creates reliability problems. . Since the linearization technique is software controlled, it would be possible to linearize in each of the 10 increments, which would consume central processing time on the MPU 130 and slow down the system 55, and the precision required Moreover, if it is desired to stretch the received waveform, the operator can tune the received waveform to the central region of interest, so that e.g. The waveform 224 can be expanded and its frequency components displayed.

MPU 130 can also be programmed to allow display device 48 to provide an alphanumeric reading of the frequency of the received signal on CRT 52. Once the desired signal is centered on the display, the operator can narrow or widen the spectrum analyzer's IP bandwidth and sweep. As previously mentioned, the step attenuator 80 can accommodate different sweep ranges.
10MHz, 5MHz, 2MHz per vision)
, IMHz, 0.5MHz,
200KH2, 100KHz. Accordingly, the operator could, for example, change the display of FIG. 3 from 10 MHz per division to IMHz per division. As the frequency per division is reduced, the sideband spectrum of the received signal becomes more prominent on display 52.

Such an indication may be desirable, for example, to confirm whether the transmitter is operating properly and/or to reveal the nature of the interfering signal. Vernier adjustment 74 adjusts the number of counts between low frequency F1 and high frequency Fh to adjust for changes in sensitivity of VCO 92 from unit to unit.

Vernier adjustment 74 is automatically self-aligned.

EFFECTS OF THE INVENTION What has been described above is a system 10 for indirectly predetermining the frequency of a VC092 that exhibits undesirable drift with time and is nonlinear with respect to the control voltage applied to the control terminal 90. Calibration of the system may be performed each time the scaling is changed by operation of frequency range block 178 of FIG. Additionally, the timing circuit is used to alert the operator on the CRT 52 by means of a display device to manually recalibrate through block 170 when a long time has elapsed since a previous calibration. Also, an alarm can be given if the temperature changes by more than 10 degrees, for example. Recalibration is performed at TI and T as shown by waveform 218 in Figure 2C'.

At a certain value during the first period between and T
and the clock generator 56 at other values between
is given by determining the frequency of . Because circuit 10 is frequently calibrated and recalibrated, system 10 tends to be accurate. Moreover, system 10
Because it calibrates automatically, it is not necessary to use expensive manual testing techniques as required by some prior art methods.

Circuit 10 may be provided utilizing known reliable digital circuits and techniques that are not subject to many of the vagaries associated with prior art analog compensation techniques.
The calibration system and technique for Spectrum Analyzer 1
Utilizes circuitry already needed to accomplish other functions in 0. Therefore, the linearization described above does not unduly increase the cost of the associated spectrum analyzer.

Although the invention has been particularly shown and described in terms of preferred embodiments, those skilled in the art will recognize that changes may be made in form and detail without departing from the scope of the invention.

[Brief explanation of the drawing]

1 is a block diagram showing a frequency synthesizer; FIG. 2A is a block diagram showing a nonlinear frequency versus VCO control voltage magnitude characteristic for the VCO shown in FIG.
Figure 2B is a graph illustrating the measurements that make up the step calibration method; Figure 2B shows the magnitude of the Co control voltage versus time in the counts for the counter of Figure 1 operating at the nominal frequency for the second step of the calibration method; Figure 2C shows the magnitude of the VCO control voltage versus time in counts for counters operating at two different frequencies subject to steps after fi and the resulting calibrated sweep control signal. The graph, and FIG. 3, shows the measured value of the frequency of the received signal. It is an explanatory view showing a screen of a line display device. 10 spectrum analyzer, 12: antenna, 16: first mixer, 18: variable local oscillator, 24: second mixer, 30: narrowband filter, 34: detector, 42: display control circuit, 48: display device, 52 :Il! radial tube, 55: sweep generator circuit, 56: variable frequency sweep clock generator, 62: counter, 64: D-A converter, 74: D-A vernier gain adjustment circuit, 80 step attenuator, 82: unipolar double throw switch, 90: control terminal, 92: VCOl 94: variable N division circuit, 100: phase detector, 106: reference frequency oscillator, 112: loop filter, 124: A-D converter, 130: microprocessor, 136: MPU Terminal, 138 two control terminals, 140: MPU terminal, 144: control terminal, 146: MPU terminal, 148 two control terminals, 150: MPU terminal, 162: ROM, 170: calibration block,

Claims (1)

[Scope of Claims] 1. A control circuit for linearizing the output frequency of a voltage controlled oscillator over time, comprising: a first control means selectively coupled to the voltage controlled oscillator; 1 control means for providing a control voltage having a selected magnitude for operating the voltage controlled oscillator at a predetermined frequency within a frequency band; and measurement means coupled to the voltage controlled oscillator means. wherein the measuring means determines the selected magnitude of the control voltage; and adjustable sweep means selectively coupled to the voltage controlled oscillator, the adjustable sweep means determining the selected magnitude of the control voltage. a second control means for varying the magnitude of the control voltage for the voltage controlled oscillator at some nominal frequency during a cycle, and having memory means, said memory means being connected to said adjustable sweep means; coupled to the voltage controlled oscillator, the memory means records when the magnitude of the control voltage reaches the selected magnitude for operating the voltage controlled oscillator at the predetermined frequency; The control means then selectively adjusts the frequency of the adjustable sweep means such that the output frequency range of the voltage controlled oscillator reaches the center frequency at an intermediate time of the sweep cycle, thereby increasing the output frequency of the voltage controlled oscillator. a control circuit for linearizing an output frequency of a voltage controlled oscillator over time, the frequency being predictable at a given time during said sweep cycle. 2. The voltage controlled oscillator has control and output terminals, and the first control means comprises a phase-locked loop, the phase-locked loop comprising: a reference frequency oscillator means, first and second input terminals and an output terminal. detector means having a first input terminal coupled to the reference frequency oscillator means; filter means having an input and an output terminal, the input terminal of the filter means being coupled to the reference frequency oscillator means; switch means coupled between the output terminal of the filter means and the control terminal of the voltage controlled oscillator; divide-by-N means having an input, an output and a control terminal; the input terminal of the N-dividing means is connected to the output terminal of the voltage controlled oscillator, and the output terminal of the N-dividing means is connected to the input terminal of the detector means. and said first control means for operating said voltage controlled oscillator at said predetermined frequency within a band of frequencies in response to another control signal applied to said control terminal of said divide-by-N means. 2. A control circuit as claimed in claim 1, providing said control voltage having a selected magnitude and varying the value of N of said N dividing means. 3. further comprising circuit means for connecting the control terminal of the N-dividing means to the second control means, and the second control means receives the other control signal to control the N-dividing means. The control circuit according to claim 2, which provides: 4. The control circuit of claim 1, wherein said measuring means includes an analog-to-digital converter coupled between a voltage controlled oscillator and said second control means. 5. said adjustable sweep means being variable clock generator means having a control terminal and an output terminal, said control terminal of said variable clock generator means being coupled to said second control means; counter means having an input terminal and an output terminal, said input terminal of said counter means being coupled to said output terminal of said variable clock generator means; a digital-to-analog converter having an input, an output and a control terminal; means, wherein the input terminal of the digital-to-analog converter means is coupled to the output terminal of the counter means, and the output terminal of the digital-to-analog means is coupled to the second control means; and switch means coupled between the output terminal of the digital-to-analog converter means and the voltage-controlled oscillator means, the switch means connecting the output terminal of the digital-to-analog converter means to the output terminal of the voltage-controlled oscillator means. 2. The control circuit according to claim 1, further comprising: selectively coupling to control the frequency of the control circuit. 6. Further, mixer means having a first input terminal, a second input terminal and an output terminal, signal supply means coupled to said first input terminal of said mixer means, display means having an input terminal and a control terminal. , first circuit means for coupling the output terminal of the mixer means to the input terminal of the display means;
second circuit means coupled to the control means of the mixing means; and the display means for determining the frequency of the received signal as a function of the time of occurrence of the received signal from the mixing means with respect to the beginning of the sweep cycle. The control circuit according to item 1. 7. The control circuit of claim 6, wherein said first circuit means includes narrow band filter means coupled between said mixer means and said display means. 8. A control circuit according to claim 1, wherein said second control means includes microprocessor means. 9. further comprising read-only memory means coupled to said microprocessor means, said microprocessor means also coupled to said first control means, and said microprocessor means stored in said read-only memory means. 9. The control circuit of claim 8, wherein the control circuit controls the selected frequency of operation of the voltage controlled oscillator in response to the data. 10. The control circuit of claim 9, further comprising: a calibration initiation circuit; a frequency ranging circuit; and wherein the calibration and frequency ranging circuit is selectively coupled to the microprocessor means. 11. A signal control method for linearizing the output frequency of a voltage controlled oscillator over time, the method providing a control voltage having a magnitude necessary to operate the voltage controlled oscillator at a predetermined frequency within a certain frequency band. measuring a selected magnitude of the control voltage for the predetermined frequency; varying the magnitude of the control voltage for a voltage controlled oscillator at a nominal frequency during a sweep cycle; recording when the varying magnitude of the voltage reaches the selected magnitude for operating the voltage controlled oscillator at the predetermined frequency; and selectively adjusting the frequency of the portion of the sweep thereby increasing the voltage. the frequency of the controlled oscillator reaches a center frequency within the frequency band at an intermediate time of the sweep cycle such that the frequency of the voltage controlled oscillator has predictable characteristics at any given time during the sweep cycle; A signal control method for linearizing an output frequency of a voltage controlled oscillator over time, comprising the steps of: 12. further comprising: mixing the output signal of the voltage controlled oscillator having the selected characteristics with a received signal; starting a display trace at the beginning of the sweep cycle; 12. A signal control method according to claim 11, comprising: determining according to the time at which it occurs from the beginning of the cycle. 13. A sweep linearization circuit for controlling the output frequency of a voltage controlled oscillator over time, the sweep linearization circuit comprising a first and a second
switch means having an operating position of; controllable phase locking means selectively coupled through said switch means to a voltage controlled oscillator; controllable phase locking means adapted to be selectively coupled through said switch means to a voltage controlled oscillator; variable sweep clock generator means coupled to the voltage controlled oscillator means; microprocessor means coupled to converter means; The microprocessor means is programmed to calibrate the sweep linearization circuit, the microprocessor means recording the magnitude of the control voltage measured by the analog-to-digital converter at each of the frequencies; Starting the variable sweep clock generator to sweep the controlled oscillator and recording the time when the control voltage reaches the predetermined magnitude, the microprocessor sweeps the adjustable sweep during a portion of the sweep cycle. selectively adjusting the frequency of the voltage controlled oscillator output signal such that the frequency of the output signal of the voltage controlled oscillator reaches the center frequency halfway through the sweep cycle such that the frequency of the output signal of the voltage controlled oscillator reaches the center frequency at any given time during the sweep cycle; A sweep linearization circuit for controlling the output frequency of a voltage controlled oscillator over time, characterized in that the output frequency of a voltage controlled oscillator is made predictable over time and in particular at said high frequency, at said intermediate frequency and at said low frequency. 14. A mixer coupled to receive the output of the voltage controlled oscillator, the mixer further coupled to receive an input signal, and connecting the display means to the mixer means and the microprocessor. circuit means coupled to means for triggering said display at the beginning of said sweep cycle so that the frequency of said received signal varies from said display in response to its time of occurrence after the start of said sweep; 14. The sweep linearization circuit of claim 13, comprising: determining: 15. The sweep linearization circuit of claim 14, wherein said circuit means includes a filter.