JPH0229788Y2 - - Google Patents

Description

[Detailed description of the invention] This invention relates to a short-circuit protection circuit that quickly detects when a short-circuit accident occurs in a load, stops the operation of the drive circuit that supplies current to the load, and cuts off the load current. .

2. Description of the Related Art Short-circuit protection circuits have conventionally been used that detect a short-circuit accident occurring in a load and stop supplying load current to the load. However, conventional short-circuit protection circuits have the disadvantage of not being able to accurately detect situations where the load current is transiently unstable. It is difficult to distinguish, and malfunctions may occur due to erroneous detection.

The short-circuit protection circuit of this invention solves the drawbacks of the conventional circuits mentioned above, and can quickly and accurately detect a short-circuit condition of the load under a stable load condition, and immediately respond to the load when the load is short-circuited. The structure is such that the supply of current is quickly stopped.

According to this invention, a short circuit detection circuit is provided,
When this short circuit detection circuit detects a short circuit in the load, a detection signal is emitted from this short circuit detection circuit, and a control circuit driven by this detection signal is provided,
The configuration is such that the supply of current to the load of the drive circuit is stopped by driving the control circuit. In this invention, a means for supplying a test signal to the drive circuit is provided, and a determining means detects the state of the output of the short circuit detection circuit based on the test signal and determines whether the load is normal. When it is determined that the drive circuit is in a normal state, the means for supplying the drive signal to the drive circuit is driven by the confirmation signal that is output after confirming the normal state of the load using the test signal, and outputs the drive signal, and the drive circuit is operated by the drive signal. current is supplied to the load. Therefore, operational reliability can be improved.

Hereinafter, this invention will be explained in detail based on examples and using drawings.

FIG. 1 is a circuit diagram showing the structure of an embodiment of the short-circuit protection circuit of this invention. A drive circuit A that supplies current to a load 11 is composed of transistors 12 and 13. That is, the emitter of transistor 12 is grounded, and its collector is connected to the base of transistor 13 via resistor 14. transistor 13
A resistor 15 is connected between the emitter of the transistor 12 and the collector of the transistor 12. One end of the load 11 is connected to the collector of the transistor 13, and the other end of the load 11 is grounded.

One end of a resistor 16 is connected to the collector of the transistor 13, one end of a resistor 17 is connected to the other end of the resistor 16, and the other end of the resistor 17 is grounded. A capacitor 1 is connected between the connection point of resistors 16 and 17 and ground.
8 is connected. Further, the connection point between the resistors 16 and 17 is connected to the inverting input terminal of the amplifier 19. A sliding terminal of a variable resistor 20 is connected to the non-inverting input terminal of the amplifier 19, a predetermined voltage V ₀ is applied to one end of the variable resistor 20, and the variable resistor 20
The other end of is grounded. Amplifier 19, variable resistor 2
0, a capacitor 18, and a resistor 17 constitute a short circuit detection circuit B.

The output terminal of the amplifier 19 is connected to the first input terminal t ₁₁ of the AND circuit 21 , and the output terminal of the AND circuit 21 is connected to the base of the transistor 23 via the resistor 22 . The emitter of this transistor 23 is grounded, and the collector is connected to the transistor 12.
connected to the base of A capacitor 24 is connected between the second input terminal t ₁₂ of the AND circuit 21 and ground, and this second input terminal t ₁₂ is connected via a resistor 25 to the input terminal t ₁₀ . transistor 1
A resistor 26 is connected between the base of 2 and the input terminal _t10 . A control circuit C is constituted by an AND circuit 21, a resistor 25, a capacitor 24, a resistor 22, and a transistor 23.

A set terminal S of a flip-flop 27 for level detection is connected to the output terminal of the AND circuit 21.
The output Q terminal of the level detection flip-flop 27 is connected to the inverting input terminal _tr1 of the AND circuit 33, and the output Q terminal of the flip-flop 27 is connected to the alarm 34. The output terminal of the AND circuit 33 is connected to the input terminal of the counter 28, the output terminal of the counter 28 is connected to the inverting input terminal t _r3 of the AND circuit 35, and the input terminal t _r4 of the AND circuit 35 is connected to the switch 36. A power source 37 is connected via the power source 37. The test signal generator 30 is connected to the output terminal of the AND circuit 35, and the output terminal of the test signal generator 30 is connected to one input terminal t _r5 of the OR circuit 38 and the input terminal t _r2 of the AND circuit 33. .

The output terminal of OR circuit 38 is connected to input terminal _t10 . The input terminal t _r3 of the AND circuit 35 is the AND circuit 3
9, and the input terminal t _r8 of the AND circuit 39 is connected to the counter ₂₈ through an inverting circuit 40.
and is connected to the reset terminal of flip-flop 27. Flip-flops 27, 28, AND circuits 33, 35, 39, inversion circuit 40, test signal generator 30, drive signal generator 31, OR circuit 38
It is possible to configure the circuit using a logic circuit E, for example, using a microcomputer.

For example, when used on a vehicle, the voltage V ₀ is supplied when the key switch is in the accessory ON position, and the voltage is supplied to a switch corresponding to the load 11, such as a turn signal lamp, when the ignition is ON. It is becoming.

As shown in the T ₁ region of FIG. 2, under a normal load state in which no short-circuit accident has occurred in the load 11, a normal current flows to the load 11, and correspondingly, the collector of the transistor 13 reaches a predetermined voltage level. is set to . Since this voltage is applied to the inverting input terminal of the amplifier 19 and the same voltage is applied to the non-inverting input terminal, the logic value of the signal at the output terminal of the amplifier 19 is "0" as shown in FIG. ” is maintained. Therefore, the logical value of the signal at the first input terminal _t11 of the AND circuit 21 is also "0", and the logical value of the signal at the output terminal of the AND circuit 21 is "0" as shown in FIG. , transistor 23 is set to a non-conducting state.

In this state, the level detection flip-flop 27 of the logic circuit E detects the logic value "0" of the output signal of the AND circuit 21. In this state, flip-flop 27 is not set and alarm 34 is not activated. When the switch 36 is turned on at startup, the logic value of the signal at the output terminal of the AND circuit 35 becomes "1", and the test signal generator 30 is driven.
A test signal having a pulse width T ₀ as shown in FIG. 2 is supplied from the test signal generator 30. This test signal passes through the OR circuit 38 and is input to the input terminal _t10.
given to. On the other hand, the test signal is AND circuit 33
Since the input terminal t _r2 of the counter 28
Test signals are sequentially sent to the input terminals of.

This counter 28 is configured to issue an output signal when a predetermined number of test signals are applied as input. Therefore, a predetermined number of test signals are supplied, and unless a short-circuit accident occurs during which the logical value of the output signal of the AND circuit 21 becomes "1", when a predetermined number of test signals are counted, the output of the counter 28 is The AND circuit 35 is cut off by the signal, and the operation of the test signal generator 30 is stopped. At the same time, the output signal of the counter 28 is used to AND
The logic value of the output signal of the circuit 39 becomes "1", and the drive signal generator 31 is driven. Therefore, from now on, the drive signal from the drive signal generator 31 is sent to the OR circuit 3.
8 to the input terminal _t10 .

At time ta, load 11 as shown in FIG.
When a short-circuit accident occurs, the potential at the collector of the transistor 13 drops to the same ground potential as shown in 5, and the logic value of the signal at the non-inverting input terminal of the amplifier 19 becomes "0". Therefore, the logical value of the signal at the output terminal of the amplifier 19 becomes "1" as shown in 6, and this signal is applied to the first input terminal _t11 of the AND circuit 21. In this state, the drive signal from the drive signal generator 31 is being supplied to the second input terminal _t12 of the AND circuit 21, so the AND circuit 21
Since the logic value of the signal at the second input terminal _t12 of the AND circuit 21 is "1", the logic value of the signal at the output terminal of the AND circuit 21 becomes "1" at the same time as the short-circuit accident occurs, and the transistor 23 becomes conductive. Invert state. Due to this conduction of the transistor 23, the logic value of the signal at the base of the transistor 12 becomes "0", the transistor 13 becomes non-conductive, the operation of the drive circuit A is cut off, and the supply of current to the load 11 is stopped. .

When the logical value of the signal at the output terminal of the AND circuit 21 becomes "1", the level detection flip-flop 27 detects this and is set, and the alarm 34 is activated to generate an alarm signal. When the alarm 34 is activated and a load short circuit is detected, the switch 36 is activated.
Unless turned off, the logical value of the signal at the output terminal of the AND circuit 21 remains "1" and the alarm 34 continues to operate.

Next, when current is supplied to the load 11, the operation at the time of starting described above is repeated. For this purpose, the test signal generator 30 issues a test signal having a pulse width slightly larger than the time constant CR set by the resistor 25 and capacitor 24 through the OR circuit 38.
AND circuit 21 and transistor 1 of drive circuit A
given on the basis of 2.

When this test signal is generated, if the accident has not been repaired and the load 11 is short-circuited, the logic value of the signal at the inverting input terminal of the amplifier 19 becomes "0" due to the test signal, and the AND circuit 2
The logic value of the signal of the first input terminal _t11 of 1 is “1”
becomes. Therefore, when the logic value of the signal at the second input terminal _t12 becomes "1" after time CR has elapsed, the transistor 23 becomes conductive and the logic value of the base signal of the transistor 12 becomes "0", causing the drive circuit to A stops supplying current to the load 11. The purpose of delaying this cutoff time by the time constant CR is to avoid misinterpreting the resistance value in an unstable state of the load as a short-circuit state.

When the short-circuit accident in the load 11 has been corrected and the normal state is flowing, the logic value of the signal at the output terminal of the AND circuit 21 is kept at "0", and the logic value at the base of the transistor 12 is "0". 1”.

In this invention, as mentioned above, the circuit is driven by a test pulse at the time of starting, and the level detection flip-flop 27 detects that the logical value of the output terminal of the AND circuit 21 is "0", and the detection signal is A test signal is applied to the input terminal t _r1 of the circuit 33 and the test signal from the test signal generator 30 is applied to the input terminal t _r2 , and the test signal is sequentially sent from the output terminal of the AND circuit 33 to the input terminal of the counter 28 . When the predetermined number of times of this test signal is counted, the output signal of the counter 28
AND circuit 35 is cut off and test signal generator 30
output is stopped. At the same time, the output signal of the counter 28 is given to the AND circuit 39.
The drive signal generator 31 is driven by the output signal of the drive signal generator 31, and the circuit is driven by the output signal of the drive signal generator 31. Therefore, a drive signal from the drive signal generator 31 is applied to the AND circuit 21 and the drive circuit A, the drive circuit A is driven, and current is supplied to the load 11. In other words, the drive signal is given after confirming the normal state of the load, allowing safe and reliable operation. Furthermore, when applying the drive signal, the configuration is such that the operation of the drive circuit A is stopped after a predetermined time delay from the start of drive of the drive circuit A by the time constant CR of the control circuit, so that a transient state can be detected. This will prevent malfunctions.

As explained in detail above, this invention has a configuration in which when applying the drive voltage, the normal state of the load is confirmed using the test signal, and then the normal operation of the drive circuit is performed using the drive signal. Therefore, short-circuit protection with excellent operational reliability can quickly detect load short-circuit accidents even in stable current conditions and stop supplying current to the load without causing false detection during transient conditions. It becomes possible to provide the circuit.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing the configuration of an embodiment of the short-circuit protection circuit of this invention, and FIG. 2 is a signal waveform diagram during operation of the embodiment of the short-circuit protection circuit of this invention. 11: Load, 12, 13, 23: Transistor, 14, 15, 16, 17, 20, 22, 2
5, 26: Resistor, 18, 24: Capacitor, 1
9: Amplifier, 21: AND circuit, 27: Flip-flop, 28: Counter, 29: Switch, 3
0: Test signal generator, 31: Drive signal generator,
A: Drive circuit, B: Short circuit detection circuit, C: Control circuit, E: Logic circuit.

Claims (1)

[Scope of utility model registration request] A drive circuit that supplies current to the load, a short-circuit detection circuit that detects overcurrent flowing through the load and issues a detection signal, and is driven by the detection signal of the short-circuit detection circuit to stop the operation of the drive circuit. a control circuit for supplying a test signal to the drive circuit; a determining means for determining whether the load is normal by detecting the state of the output of the short circuit detection circuit based on the test signal; and the determining means and means for supplying a drive signal to the drive circuit when the load is determined to be normal.