JPH02297623A - Microprocessor - Google Patents

Abstract

PURPOSE:To reduce the number of steps of a program required for a loop by replacing a processing in software fashion to find the maximum value and its memory address from data by hardware. CONSTITUTION:A Y-input register 26 which latches the data that flows to Y-input out of two-input ports X and Y of an arithmetic and logic unit(ALU) 2, a data register 27 which latches the data in the Y-input register 26 with the ALU2 when a computed result(X-Y) is shown as X<Y and whose output is connected to the input port X of the ALU 2, an address register 28 which latches the address value of a memory 4 with the ALU 2 when the computed result (X-Y) is shown as X<Y similarly, and a gate circuit 21 which controls those data register 27 and address register 28 when it is X<Y are provided. Thereby, it is possible to reduce the number of steps of the program required for the loop by reducing the number of instructions of a microprogram in the loop.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a microprocessor, and in particular, it is possible to determine by software the maximum or minimum value of data in memory in a microprocessor and the address where that value is stored. Rather, it is related to the data control circuit required in terms of hardware.

[Prior Art] Fig. 2 is a block diagram showing an example of the configuration of a conventional microprocessor (Japanese Patent Application No. 154328/1982).
.

Arithmetic logic unit 2 (hereinafter abbreviated as AlO2) has two input ports X and Y, and subtracts data input to the Y input port from data input to the X input port. As a result of this subtraction, the S flag 19 is output from AlO2, and the S flag 19 becomes active when the calculation result of AlO2 is negative. Of these two input ports X and Y, data on the data bus 1 is input to the input port Y via the Y input bus 11. In addition, input port
The output of an accumulator 3 (hereinafter abbreviated as ACC3) that stores the calculation result of AlO2 is inputted via the ACC output bus IO. The outputs of A and CC3 are branched and sent to data bus 1 as well.

Address pointer 5 outputs an address to be specified to memory 4 via memory address line 14.

The input/output of the memory 4 is connected to the data bus 1 via the memory bus 13, and the data stored at the designated address is read onto the data bus 1, or the data sent from the data bus 1 is written to the designated address. .

The four registers A register 6, B register 7, C register 8, and D register 9 are respectively A register 6, B register 7, C register 8, and D register 9. B
Bus 16. C bus 17. It is connected to the data bus 1 via the D bus 18, and takes in data on the data bus 1, or outputs the taken data onto the data bus 1.

In the microprocessor configured in this way, as shown in FIG. Consider finding the maximum value among n pieces of data and the memory address where the maximum value is stored.

FIG. 4 shows an algorithm for finding the maximum value and its memory address. Here, Ak is the memory address, (X) is the data stored in X, and Rmax
is a register that stores the maximum value.

ARmax is a register that stores the maximum memory address value.

First, data stored at memory address Ai (A
After storing i) in the register Rmax x that stores the maximum value and the value of the memory address Ai in the register ARmax that stores the value of the maximum memory address,
Set 1 to register k (step 4], 42)
.

Next, the value stored in register Rmax is set to register (
It is determined whether the value is smaller than the value stored in Ak) (step 43). If Rmax<(Ak), it is assumed that the register contents need to be updated, and the data (Ak)
The value of the memory address Ak is stored in the register Rmax, and the value of the memory address Ak is stored in the ARmax (step 44). On the contrary, Rm
If a x≧(A k ), there is no need to update, and the process jumps to step 44 above. At this point, +l is stored in register k (step 45).

Thereafter, it is determined whether the contents of the register = i -n, and if not, it is determined that the search for all memory addresses has not yet been completed, and the process returns to step 43, where the memory addresses Ai to Ai- are searched. The loop (steps 43 to 46) for finding the maximum value and its memory address from among the data stored up to (n-1) is performed by k = i
Repeat until -n (total n times) (step 46)
.

FIG. 5 shows a procedure for implementing the algorithm shown in FIG. 4 described above using the conventional microprocessor shown in FIG. 2. Here, AR is A register (3) that stores the maximum value of data, BR is B register 7 that stores the memory address of the maximum value, and CR is C that stores the first address Ak to be searched. Register 3.DR is a D register 9 that stores the i-nth address, which is the final address.

First, data (A
i) in the register AR that stores the maximum value, the value of the memory address Ai in the register BR that stores the value of the maximum memory address, the i+llth address At+1 in the register CR, and the i-1th address Ai- n to register D
Each is stored in R. On top of that, address pointer 5
Set the address of Ai+l. Here, i+l is set in register k (steps 51 and 52).

Next, from the data (AR) stored in the register AR, the data (Ak) in the memory 4 stored at the address Ak specified by the address pointer 5 is read out.
It is subtracted by lO2, and the calculation result is stored in ACC3 (step 53). Based on this calculation result, it is determined whether the S flag 19 output from AlO2 is active or not (
Step 54). If it is active, it is assumed that it is necessary to update the register contents, and the value of the data (Ak) read from memory 4 is transferred to data register AR and register C.
The values of the memory addresses (CR) stored in R are stored in the address register BR (step 55).
. On the other hand, if it is not active, there is no need to update, so skip step 55 above.

Then, in order to store the address advanced by one in advance, 1 is added to the address data (CR) stored in the address pointer CR by AlO2,
The result is accumulated in ACC3, and the result (ACC) is further stored in address register CR (step 56.
57).

Thereafter, in order to actually advance the address by one, the memory address of the address pointer 5 is increased by one. That is, k
The value of is set to +l (step 58). and,
From the address data (CR) stored in register CR,
The address data (DR) stored in the final address register DR is subtracted by ALU2. That is, Ak
Ai-n is subtracted from and the result of the calculation is stored in ACC3 (step 59). Based on the result of this operation, it is determined whether the contents of registers CR and DR are (CR) - (DR), and if not, the search for the memory address in the required range has not been completed yet. The process returns to step 53, and the memory address Ai to Ai-(n-1) is
The loop for finding the maximum value and its memory address from among the data stored up to now (steps 53 to 60) is repeated (n times in total) until (CR)=(DR) (step 60).

In this way, the three processes of calculating the size of memory data, storing the search address, and checking whether the search address has reached the final address are performed in the above loop, and finally, The maximum value is A register 6 (
AR), and the memory address of the maximum value is found in the B register 7 (BR).

[Problems to be Solved by the Invention] However, in the conventional device having the above configuration, the maximum value of n pieces of data stored from memory address Ai to Ai+(n-1) and the memory address thereof are determined. Therefore, several instructions are required for the microprogram instructions in the part that loops 0 times as shown in FIG. If p is large, there is a drawback that n increases just by increasing p by one.

The purpose of this invention is to avoid the fact that when the number n of data to be handled is large, the number of steps in the entire loop increases by n just by increasing the number of microprogram instructions in the loop by one, resulting in a very large number of steps. The above-mentioned problems of the conventional technology are solved by automatically updating and determining the current maximum data value and the memory address of the maximum value through hardware processing, instead of using software processing such that the current maximum data value and the memory address of that maximum value are automatically updated. Therefore, it is an object of the present invention to provide a microprocessor that can significantly reduce the number of program steps required for a loop by reducing the number of microprogram instructions in a loop.

[Means for Solving the Problems] A microprocessor of the present invention determines the maximum value or minimum value from among data stored in a storage device, and calculates the maximum value or minimum value from among the data stored in the storage device. It asks for the street address.

Such a microprocessor has two input ports
, Y, which subtracts the data input to the input port Y from the data input to the input port The data input to the input port Y of the two input ports X and Y of the arithmetic logic unit is branched, and the data input to the input port Y is branched. Y input storage means that receives branch data as input.

Further, the output of the Y input storage means is input,
and data storage means for inputting an output to input port X of the two input ports X and Y of the arithmetic and logic operation unit, address storage means for inputting a specified address of the storage device, and the arithmetic and logic operation unit. and a gate circuit that inputs the output of the Y input storage means to the data storage means and inputs a specified address of the storage device to the address storage means when the calculation result becomes negative or positive. It is what was done.

[Operation] A case will be described in which the microprocessor of the present invention determines the maximum value from among data stored in a storage device and the address of the storage device where the maximum value is stored.

The ALU subtracts the output of the data storage means input to the input port x from the stored data retrieved from the designated address of the storage device and input to the input port Y. Note that the storage data input to the Y input port is branched and stored in the Y input storage means.

When the calculation result by the ALU becomes negative, the gate circuit determines that the stored data is the maximum value at the current stage,
The stored data is transferred from the Y input storage means in which the stored data is stored to the data storage means and stored therein.

At the same time, the designated address where the storage data determined to be the maximum value at the current stage is stored is stored in the address storage means.

When the next address is specified by the input means, the next storage data (current storage data) stored at the address is taken out from the storage device and input to the input port Y. At this time, stored data determined to be the maximum value (previous stored data) is input to input port X from the data storage means. At this time, the current storage data is stored in the Y input storage means.

The calculation result by the ALU that subtracts these two data is
For example, if it becomes positive, it is determined that the previous stored data is still the maximum value at this stage, so the stored data is transferred from the Y input storage means that stores the current stored data to the data storage means. The data is not transferred, and the previously stored data remains stored in the data storage means. Similarly, the previously designated address remains held in the address storage means.

Conversely, if the calculation result is negative, the contents stored in the data storage means and the address storage means are updated, and the current stored data, which is determined to be the maximum value at the current stage, becomes the data. The stored data is stored in the storage means, and the specified address where the stored data is stored is stored in the address storage means.

In this way, by automatically advancing the address, the data in the storage device is retrieved sequentially, and the ALU repeatedly calculates the retrieved data and the data that was determined to be the maximum value up to the previous time, and the result of the calculation is negative. If so, the maximum value and its address are updated, and if it is positive, the maximum value and its address up to the previous time are retained.

Therefore, the data and address that ultimately remain in the data storage means and address storage means have the maximum value and become the address of the maximum value.

Note that when determining the minimum value, the data and address may be updated when the calculation result is positive, and the rest is the same as in the case of the maximum value.

[Example] An embodiment of the present invention will be described below with reference to FIG.

Figure m1 is a block diagram showing an example of the microprocessor of the present invention.

ALU2 has two input ports X and Y, and subtracts the data input to input port Y from the data input to input port X. By this subtraction, the AL
S flag 1 becomes active when the calculation result of U2 is negative.
9 will be northward. Of these two input ports X and Y, data on the data bus 1 is input to the input port Y via the Y input bus 11.

Furthermore, one of the two pieces of data selected by the selector 25 is input to the input port X via the input bus 24. One of the two data selected by the selector 25 is the output of the ACC 3 that stores the calculation result of AlO 2 , and this is supplied via the ACC output bus 10 . AC input to this input port
The output of C3 is branched and also sent to data bus l.

The other data selected by selector 25 is the output of data register 27 supplied via data register output bus 23. Here, a selector 25 is provided to
The reason why the system in which the output of CC3 is fed back to AlO2 was left in place is to prevent the general function of AlO2 from being impaired.

The input means sequentially specifies the addresses of the memory 4 from the address pointer 5 via the memory address line 14, thereby sequentially reading out the data stored in the memory 4 and transmitting the data onto the data bus l through the memory bus 13. and the two input ports X of said ALU 2 via the Y input bus 11.

Input to input port Y of Y.

The Y input register 26 receives branched input data input to the input port Y of the AlO2 via the Y input bus 11 and latches it.

The data register 27 receives the output of the Y input register 26 as an input, and supplies the output to the input port X of the two input ports X and Y of the AlO2 via the selector 25.

The address register 28 branches the designated address supplied to the memory 4 via the memory address line 14 as an input, latches it, and sends it out via the address bus 18 onto the data bus l.

The gate circuit 21 is composed of, for example, an AND circuit, and is made of AlO
2 becomes negative, and the output S
A clock 20 that always generates a pulse in synchronization with the microprogram instruction when the flag 19 becomes active.
is outputted to the data register 27 and the address register 28, the output of the Y input register 26 is inputted to the data register 27, and the specified address outputted to the memory 4 from the address pointer 5 is inputted to the address register 28.
input.

Next, the operation of the above-described configuration will be explained.

Data n currently stored in memory 4 from address Ai to Ai+(n-1) (where i≧0, n≧2)
Consider finding the maximum value and the address of that maximum value.

First, the data (Ai) stored at the address Ai of the memory 4 is stored in the data register 27, and the address value Ai indicated by the address pointer 5 is stored in the address register 28, and then the memory address is set to Ai+l. I'll keep it.

Next, when a certain special microprogram instruction, that is, one microprogram instruction to find the maximum value and its address, is executed, the selector 25 selects the output from the data register 27, and the data stored in the data register 27 is (T2R) and the data (Am) in the memory 4 stored at the address Am that the address pointer 5 is currently pointing to, the subtraction (T2R) - (Am) is performed using AlO2. Incrementing the address by 1 is performed.

Also, at the same time as this operation, data (Am) flowing into the input port Y of the AlO2 is latched into the Y input register 26. Then, when the calculation result of AlO2 is negative, S
The flag 19 becomes active, and the gate circuit 21 allows the pulse of the clock 2o to pass only when the S flag 19 becomes active. This becomes the count clock 22 and is input to the clock input of the data register 27.
The data of the Y input register 26 that has just been latched (A
m) is latched into the data register 27.

On the other hand, the count clock 22 is input to the clock input of the address register 28 and the address pointer 5
The address output value Am is latched into the address register 28.

The maximum value can be obtained in the data register 27 and the address of the maximum value can be obtained in the address register 28 by simply executing the specific microprogram instruction that performs the above operation n times.

Note that the maximum value address stored in the address register 28 is output to the data bus 1 via the address register bus 18, and the maximum value stored in the data register 27 is output to the data bus 1 via AlO2 etc. I can do it.

As mentioned above, the microprocessor of this embodiment is made of Al
Of the two input ports X and Y of O2, the Y input register 26 latches the data flowing to the Y input, and the
When the calculation result of X<Y, the data of the Y input register 26 is latched, and the data register 27 whose output is connected to the input port x of AlO2 and the calculation result of X-Y of AlO2 are the same <x< An address register 28 that latches the address value of the memory 4 when y, and these data registers 27 when X<Y. A gate circuit 21 for controlling an address register 28 is provided.

As a result, from address Ai in memory 4 to Ai+(n-
1) When finding the maximum value and its memory address from among the n pieces of data stored up to now, take out the data in memory 4 in order and update the maximum value at that point and its memory address by 1. It can be realized with one microprogram instruction.

Therefore, up until now, in order to obtain the maximum value and its address for one piece of memory data, for example, if it was necessary to use the conventional p instruction or the p instruction, which was obtained using software processing, it would be necessary to obtain it using hardware processing. In this embodiment, it can be expected that the number of steps in the entire microprogram will be reduced to 1/p.

In the above embodiment, the S flag 19 which becomes active when the calculation result of AlO2 is negative is set and the maximum value is determined. If you set a flag like
It is also possible to find the minimum value.

[Effects of the Invention] According to the present invention, the software processing for finding the maximum value and its memory address from data is replaced with hardware, so the number of microprogram instructions in the repeat loop can be reduced. The number of program steps required for loops can be significantly reduced.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of a microprocessor according to the present invention, FIG. 2 is a block diagram showing an example of a conventional microprocessor, and FIG. 3 is a block diagram showing an example of a conventional microprocessor.
Figure 4 is a data configuration diagram of the memory stored in A1+(n-1), which calculates the maximum value and its memory address from among the data stored in memory addresses Ai to Ai+(n-1). Figure 5 is a flowchart explaining the algorithm shown in Figure 4.
2 is a flowchart showing a conventional procedure for implementation with the microprocessor shown in the figure. 2 is an arithmetic logic unit (A L U ), 4 is a memory as a storage device, 1.5, 11, 13.14 is an input means, l is a memory bus, 5 is an address pointer, and 11 is a Y input address. , 13 is a memory/sl space. 14 is a memory address line, 21 is a gate circuit, 26 is Y
A Y input register is an input storage means, 27 is a data register as a data storage means, 28 is an address register as an address storage means, and X and Y are input ports. 1U Conventional Microphone A7F Figure 2 Memory Configuration Figure 3

Claims (1)

[Scope of Claim] A microprocessor that determines the maximum value or minimum value from among data stored in a storage device and also determines the address of the storage device where the maximum value or minimum value is stored, comprising: an arithmetic and logic unit that has input ports X and Y and subtracts data input to input port Y from data input to input port X; An input means for sequentially taking out the data stored in this and inputting it to input port Y of the two input ports X and Y of the arithmetic and logic unit, and branching the data input to the input port Y. and a Y input storage means which receives this branch data as input, and which receives the output of the Y input storage means and outputs the output to input port X of the two input ports X and Y of the arithmetic and logic unit. an input data storage means; an address storage means whose input is a specified address of the storage device; and when the result of the operation by the arithmetic and logic unit is negative or positive, the output of the Y input storage means is stored as the data. A microprocessor comprising a gate circuit for inputting a designated address of the storage device to the address storing means.