JPH02296355A - Lead frame and chip - Google Patents
Lead frame and chipInfo
- Publication number
- JPH02296355A JPH02296355A JP11696489A JP11696489A JPH02296355A JP H02296355 A JPH02296355 A JP H02296355A JP 11696489 A JP11696489 A JP 11696489A JP 11696489 A JP11696489 A JP 11696489A JP H02296355 A JPH02296355 A JP H02296355A
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- resin
- plating
- lead
- semiconductor chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000011347 resin Substances 0.000 claims abstract description 22
- 229920005989 resin Polymers 0.000 claims abstract description 22
- 229910000679 solder Inorganic materials 0.000 claims abstract description 15
- 239000004065 semiconductor Substances 0.000 claims abstract description 14
- 238000007747 plating Methods 0.000 abstract description 27
- 238000007789 sealing Methods 0.000 abstract description 6
- 238000004299 exfoliation Methods 0.000 abstract 2
- 239000007788 liquid Substances 0.000 abstract 1
- 230000003746 surface roughness Effects 0.000 abstract 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 3
- 229910052709 silver Inorganic materials 0.000 description 3
- 239000004332 silver Substances 0.000 description 3
- 229910001020 Au alloy Inorganic materials 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 239000003353 gold alloy Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、半導体チップをボンディング接続して、樹脂
封止されるリードフレーム及びこれを用いたチップに関
するものである。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a lead frame to which a semiconductor chip is bonded and sealed with resin, and a chip using the lead frame.
従来の技術
従来のこの種のり−トフレームの平面図を第４図に示す
。第４図（ａ）はその表面（半導体チップを載せる面）
を示し、第４図（ｂ）は裏面を示す。2. Description of the Related Art A plan view of a conventional seat frame of this type is shown in FIG. Figure 4(a) shows its surface (the surface on which the semiconductor chip is placed)
4(b) shows the back side.
ここで１１はリードフレーム全体を示し、１２は樹脂封
止して完成したチップをプリント基板に実装する際の半
田の付きを良くする為にリードフレーム１１の端子部に
施された半田めっきである。Here, 11 indicates the entire lead frame, and 12 indicates solder plating applied to the terminals of the lead frame 11 to improve solder adhesion when mounting the resin-sealed and completed chip on a printed circuit board. .
１３はリードフレーム１１の表面に施された銀めっきで
、リードフレーム１１の中央に置かれた半導体チップの
端子とリードフレーム１１の各リード先端とを接続する
ワイヤボンディングの材料の付きを良くするものである
。Reference numeral 13 denotes silver plating applied to the surface of the lead frame 11, which improves the adhesion of the wire bonding material that connects the terminal of the semiconductor chip placed in the center of the lead frame 11 and each lead tip of the lead frame 11. It is.
このリードフレーム１１の中央に半導体チップを載せて
リート先端とワイヤボンディングを行った後、半導体チ
ップを樹脂で封止し、リードフレーム１１の各端子を切
断して、チップが完成する。After placing a semiconductor chip in the center of this lead frame 11 and performing wire bonding with the tip of the lead, the semiconductor chip is sealed with resin and each terminal of the lead frame 11 is cut to complete the chip.
発明が解決しようとする課題
しかしながら、ワイヤボンディングされたリードフレー
ムを樹脂で封止する際に、樹脂とリードフレームとの線
膨張係数が異なることから内部応■
力が生じ、封止樹脂にひびが発生したり、リードフレー
ムの裏面部分てリードフレームと樹脂との密着性が悪く
なり、樹脂がはがれ落ちたりすることがあった。Problems to be Solved by the Invention However, when a wire-bonded lead frame is sealed with a resin, internal stress is generated due to the difference in linear expansion coefficient between the resin and the lead frame, causing cracks in the sealing resin. In some cases, the adhesion between the lead frame and the resin deteriorates on the back side of the lead frame, causing the resin to peel off.
課題を解決するための手段
この課題を解決するために本発明は、リーＩ・フレーム
の、半導体チップを載置するパッド部の裏面に半田めっ
きを施した。Means for Solving the Problem In order to solve this problem, the present invention applies solder plating to the back surface of the pad portion of the Lee I frame on which the semiconductor chip is placed.
作用
半田の軟らかさ及び表面の荒さによって、リードフレー
ムとこれを封止する樹脂の密着性が向」ニする。The softness of the working solder and the roughness of the surface improve the adhesion between the lead frame and the resin that seals it.
実施例
以下、本発明の一実施例におけるリードフレームを図面
を参照して説明する。EXAMPLE Hereinafter, a lead frame according to an example of the present invention will be explained with reference to the drawings.
第１図は、本実施例におけるリードフレームの平面図で
、第１図（ａ）はその表面を示し、第１図（ｂ）はその
裏面を示す。ここで１はり−トフレーム全体を示し、２
、及び３は従来のリードフレームに施されたものと同じ
半田めっき、及び銀めつきである。４は、リードフレー
ム１のデツプ載置部（パット）の裏面に施された半田め
っきである。FIG. 1 is a plan view of the lead frame in this embodiment, with FIG. 1(a) showing its front surface and FIG. 1(b) showing its back surface. Here, 1 shows the entire beam frame, 2
, and 3 are the same solder plating and silver plating as those applied to conventional lead frames. Reference numeral 4 denotes solder plating applied to the back surface of the depth mounting portion (pad) of the lead frame 1.
第２図は、本実施例のリードフレーム１を作る為のめっ
き装置の概略図である。ここで６はり一トフレーム１を
載せるダイであり、めっき液が不要部に付着するのを防
ぐ下マスク８がその上面に貼付されている。９はリード
フレーム１をダイとで挟む方向に往復移動するパンチで
、リードフレーム１への対向面にはダイ６と同様に上マ
スク７が貼付されている。このパンチ９及び−Ｊニマス
ク７はリードフレーム１のバット部の裏面５にめっき液
が当たるように開孔が設けられている。FIG. 2 is a schematic diagram of a plating apparatus for producing the lead frame 1 of this embodiment. 6 is a die on which a beam frame 1 is mounted, and a lower mask 8 is attached to the upper surface of the die to prevent the plating solution from adhering to unnecessary parts. Reference numeral 9 denotes a punch that moves reciprocally in a direction in which the lead frame 1 is sandwiched between the die and the die, and an upper mask 7 is attached to the surface facing the lead frame 1 in the same manner as the die 6. The punch 9 and the -J mask 7 are provided with holes so that the plating solution hits the back surface 5 of the butt portion of the lead frame 1.
以」二のように構成されためっき装置の動作について説
明する。The operation of the plating apparatus configured as follows will be explained.
ダイ６上にリードフレーム１を位置決めした後にパンチ
９を下ろして上マスク７と下マスク８とでリードフレー
ム１を挟む。その状態でめっき液を矢印ａから矢印すの
方向に流しながら、電流を」−ドフレーム１に流すこと
でめっき液にさらされたリード部分等にめっきが施され
る。尚、リードフレーム１に電流を流す為の電極は、ダ
イ６及びパンチ９に内蔵されている。パンチ９及び上マ
スク７に開孔が設けられているので裏面５の部分にも、
めっき液が当たって、めっきが施されることになる。以
上のようにして、半田めっきが施されたリードフレーム
１が完成することになる。ここで用いられるめっきｔ夜
は５ｎ−ｐｂ金合金用いるが、密着性の向上か、ひびの
防止かのとちらを重視するかで、他の金属めっきも使用
できる。After positioning the lead frame 1 on the die 6, the punch 9 is lowered and the lead frame 1 is sandwiched between the upper mask 7 and the lower mask 8. In this state, while flowing a plating solution in the direction of arrow A to arrow S, a current is passed through the lead frame 1, thereby plating the lead portions exposed to the plating solution. Note that electrodes for passing current through the lead frame 1 are built into the die 6 and the punch 9. Since holes are provided in the punch 9 and the upper mask 7, the back surface 5 also has holes.
The plating solution hits it and plating is applied. In the manner described above, the solder-plated lead frame 1 is completed. The plating used here is a 5n-pb gold alloy, but other metal platings can be used depending on whether improving adhesion or preventing cracks is important.
このようにして完成されたり一トフレーム１のパッド部
に半導体チップを載せて、リーＩ・フレーム１のリード
先端とワイヤボンディングを行い、樹脂て封止してチッ
プが完成する。この完成したチップの断面を第３図に示
す。ここで１０は半導体チップであり、１４はボンディ
ングワイヤであり、１５は封止用の樹脂である。この図
において、リードフレーム１のパッド部裏面に施された
半田めっき４によって、リードフレーム１と樹脂１５と
の線膨張係数の違いによるひび割れや、リードフレーム
］と樹脂１５との密着性がよくなる。The semiconductor chip thus completed is placed on the pad portion of the frame 1, wire bonded to the lead tips of the lead I frame 1, and sealed with resin to complete the chip. A cross section of this completed chip is shown in FIG. Here, 10 is a semiconductor chip, 14 is a bonding wire, and 15 is a sealing resin. In this figure, the solder plating 4 applied to the back surface of the pad portion of the lead frame 1 prevents cracks caused by the difference in coefficient of linear expansion between the lead frame 1 and the resin 15, and improves the adhesion between the lead frame and the resin 15.
発明の効果
以上のように、本発明はり−トフレームのバット部の裏
面に半田めっきを施したので、リードフレームとこれを
封止する樹脂との線膨張係数が違っても、半田の軟らか
さで寸法の変化の違いを吸収でき、ひびの発生を防ぐこ
とが可能になる。Effects of the Invention As described above, since solder plating is applied to the back side of the butt part of the lead frame of the present invention, even if the linear expansion coefficients of the lead frame and the resin that seals it are different, the softness of the solder can be improved. This makes it possible to absorb differences in dimensional changes and prevent the occurrence of cracks.
又、半田の表面は荒いので、樹脂の密着性が向上し、樹
脂がはがれ落ちることがなくなる。Furthermore, since the surface of the solder is rough, the adhesion of the resin is improved and the resin does not peel off.
第１図は本発明の一実施例におけるリードフレームの平
面図、第２図は本実例のようにリードフレームにめっき
を施すためのめっき装置の断面図、第３図は本実施のリ
ードフレームを用いたチップの断面図、第４９図は従来
のり一トフレームの平面図である。
１１８．リードフレーム
２１１．半田めっき
３１０．銀めっき
４１１．半田めっきFig. 1 is a plan view of a lead frame according to an embodiment of the present invention, Fig. 2 is a sectional view of a plating apparatus for plating a lead frame as in this embodiment, and Fig. 3 is a plan view of a lead frame according to this embodiment. A cross-sectional view of the chip used, and FIG. 49 is a plan view of a conventional glue frame. 118. Lead frame 211. Solder plating 310. Silver plating 411. Solder plating
Claims (1)
リード部を形成したリードフレームであって、 半導体チップを載置するパッド部の裏面に半田めっきを
施したことを特徴とするリードフレーム。 ２）特許請求の範囲第１）項に記載のリードフレームに
半導体チップを載置し、樹脂封止したことを特徴とする
チップ。[Claims] 1) A lead frame on which a semiconductor chip is placed and a lead portion connected to a terminal of the semiconductor is formed, the back side of the pad portion on which the semiconductor chip is placed being solder plated. A lead frame featuring 2) A chip characterized in that a semiconductor chip is mounted on the lead frame according to claim 1) and sealed with a resin.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11696489A JPH02296355A (en) | 1989-05-10 | 1989-05-10 | Lead frame and chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11696489A JPH02296355A (en) | 1989-05-10 | 1989-05-10 | Lead frame and chip |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02296355A true JPH02296355A (en) | 1990-12-06 |
Family
ID=14700105
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11696489A Pending JPH02296355A (en) | 1989-05-10 | 1989-05-10 | Lead frame and chip |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02296355A (en) |
-
1989
- 1989-05-10 JP JP11696489A patent/JPH02296355A/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7439097B2 (en) | Taped lead frames and methods of making and using the same in semiconductor packaging | |
| CN105185752B (en) | Semiconductor devices and its manufacturing method | |
| KR100720607B1 (en) | Semiconductor device | |
| JPH11340409A (en) | Lead frame and its manufacture and resin encapsulated semiconductor device and its manufacture | |
| US20030178708A1 (en) | Leadframe and method for manufacturing resin-molded semiconductor device | |
| JP2014007363A (en) | Method of manufacturing semiconductor device and semiconductor device | |
| JPH11260985A (en) | Lead frame, resin-sealed semiconductor device and its manufacture | |
| JPWO2017002268A1 (en) | Semiconductor device manufacturing method and semiconductor device | |
| JP2000003988A (en) | Lead frame and semiconductor device | |
| JP2003100980A (en) | Semiconductor device and manufacturing method therefor | |
| JP2569400B2 (en) | Method for manufacturing resin-encapsulated semiconductor device | |
| JPH07153896A (en) | Resin-sealed semiconductor device and manufacture thereof | |
| JP2004228166A (en) | Semiconductor device and its producing process | |
| JP2002184927A (en) | Method of manufacturing semiconductor device | |
| JPH02296355A (en) | Lead frame and chip | |
| JP3716101B2 (en) | Lead frame, semiconductor device manufacturing method using the same, and semiconductor device | |
| JPH03274755A (en) | Resin-sealed semiconductor device and manufacture thereof | |
| JP2851791B2 (en) | Lead frame and method of manufacturing semiconductor device using the same | |
| JP2017108191A (en) | Semiconductor device | |
| JP4570797B2 (en) | Manufacturing method of semiconductor device | |
| JPH11145369A (en) | Lead frame and semiconductor device using the same, and its manufacture | |
| JP2002134654A (en) | Resin sealing type semiconductor device and its manufacturing method | |
| JP2002124596A (en) | Semiconductor device and production method therefor | |
| JP2002164496A (en) | Semiconductor device and method for manufacturing the same | |
| JPH05275603A (en) | Metal plate for lead frame |