JPH02294188A - Picture-in-picture device - Google Patents

Abstract

PURPOSE:To unnecessitate a 1H delay line required for continuation and to simplify constitution by taking a timing when performing the line sequencing of a chrominance signal after the sysnthesis of a master picture and a slave picture synchronizing with the signal of the master picture. CONSTITUTION:The output of the chrominance signal is directly supplied to the permutator 9 of a master picture decoder part, and the (R-Y) signal of the master picture selected at the permutator 9 is supplied to an envelope detector 29. Also, a reset pulse generation circuit 30 controls a 1/2-frequency divider 21 which controls a line sequence switch 19 and a switching circuit 22 with a reset pulse corresponding to the rise of the output of the envelope detection circuit 29. Thereby, it follows that the timing of selection by the permutator 9 is synchronized with the selecting timing of the line sequence switch 19 and the switching circuit 22, and it is possible to dispense with coincidence by using the 1H delay line, which simplifies the constitution.

Description

[Detailed description of the invention] (b) Industrial application fields The present invention relates to a picture-in-picture device.

(Example) Conventional technology, for example, in Japanese Patent Application Laid-Open No. 59-23681} {04N5/4
4) shows an example of a picture-in-picture device that displays two images in one television receiver. Since the device shown here is installed in a television receiver, the final output signal can be obtained in the form of a luminance signal and a color difference signal.

However, if a picture-in-picture device is provided within a video tape recorder (VTR), it must be output in the form of a standard color television signal. Regarding such devices (compatible with SECAM signals), please refer to the 4th section.
As shown in the figure.

The composite video signal for the sub-screen is input to the input terminal (1), and the luminance and chromaticity separation circuit (2) separates it into the sub-screen luminance signal 1'c and the carrier color signal Cc for the sub-screen. After being separated, the Cc signal is color-demodulated into two color difference signals (RY) c and (B-Y) c by a small screen decoder (3). The Yc, (RY)c, and (B-Y)c signals are processed by a time compression circuit (4) into a compressed luminance signal Yc', a compressed color difference signal (R-Y)'c, and (B-'1'). )'C respectively. The time compression circuit (4) usually consists of an A/D converter, random access memory, memory control circuit, D/A converter, etc., and is a circuit that digitally compresses image data in time. be.

On the other hand, the composite video signal for the main screen (S E C A M signal) is input from the input terminal (5), and the luminance and chromaticity separation circuit (6) separates the main screen luminance signal yp and the main screen transport. The Cp signal is separated into two color difference signals (R-Y)p and (B
-Y)p.

The main screen decoder section (7) includes an IH delay element (8), a permutator (9) (10), a line identification circuit (13),
%R unit (14), R-Y discriminator (11)
, B-Y discriminator (12), and the carrier color signal Cp for the main screen inputted to the main screen decoder section is processed by the IH permutator (9) and (10).
The signal C delayed by l horizontal period at the delay element (8)
By switching at the timing of POL and the horizontal period of %, the line sequential signal is converted into continuous RY carrying color signal C2 and BY carrying color signal C0. The switching control of the vermutators (9) and (10) is achieved by horizontal synchronization obtained by synchronizing and separating the main screen composite video signal in the synchronization separation circuit (15). The signal %fH is obtained by dividing the frequency of the signal f■ by % by a % frequency divider (14). % division again!
(14) is reset by a reset pulse obtained from the line identification circuit (13), and is controlled so that the permutator is switched in the correct direction. The waveforms of each part above are shown in the fifth section.
As shown in the figure.

The R-Yla color feeding signal C■ and the B-Y feeding color signal CPll are then sent to the R-Y discriminator (11) and the B-Y discriminator (12) to form the main screen color difference signal (R-
The signal is FM demodulated into Y)p and (B-Y)p.

Time-compressed small screen signal Yc'(RY)'C
, (B-Y)'c, and main screen signals Yp, (R-Y)p
, (B-Y)p are switch circuits (16) (17) (18
), the color difference signals are converted into line sequential signals by a line sequence switch (19), and converted into FMFIQ fading signals by an FM modulator (20). Terminal (
23) R-Y line modulation carrier ROM input to
and the BY line modulation carrier f input to the terminal (24). 3 is switched to a modulation carrier suitable for each line by a switch circuit (22).

Switching control of the line sequence (19) and modulation carrier changeover switch (22) is based on the main screen horizontal synchronization signal fH.
This is performed using a signal 3A f H whose frequency is divided by % in a frequency dividing circuit (21).

The carrier color signal output from the FM modulator (20) passes through a bell filter (25) and is combined with the luminance signal at (26) to create a composite video signal in which a child screen is inserted into a part of the main screen. It is formed and output from the terminal (27) (see FIG. 5).

(c) Problems to be Solved by the Invention In the prior art described above, it was necessary to serialize the carrier color signal for the main screen. This is because line sequentialization is performed by the switch (l9), but the timing of this control (R
This is because there is a possibility that the timing of selection of -Y and B-Y) and the timing of the main screen signal do not match. If it is continuous, there is no need to adjust the timing. However, an IH delay line is required for continuity, making the configuration complicated.

(2) Means for resolving the division problem Therefore, in the present invention, the timing when converting the color signal after combining the main screen and the sub-screen into line sequential is synchronized with the signal of the main screen. .

(e) By synchronizing the timing of action line sequentialization with the signal of the main screen, an IH delay line for serialization becomes unnecessary, and clearing becomes easy.

(f) Example Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing a first embodiment of the present invention, FIG. 2 is a waveform diagram according to FIG. 1, and FIG. 3 is a block diagram showing a second embodiment. In FIGS. 1 and 3, the same parts as in FIG. 4 are given the same reference numerals, and explanations thereof will be omitted.

The main screen decoder section (7) is basically an integrated circuit (IC) (
M51404AFP), and external components include an IH delay line and a phase-shifting circuit for FM demodulation (each discriminator (11) and (12) is a chip-dracher detection circuit, so a phase-shifting circuit is required. ) is assumed to be connected. However, in the present invention, as described above, the IHi line extension for continuity is omitted, and the color signal output is directly supplied to the permutator.

Instead of omitting the IH delay line, use envelope detection! (2
9) and a reset pulse generation circuit (30). The envelope detection circuit (29) is a vermutator (
The (RY) signal of the parent screen selected in step 9) is supplied. This is because a phase shift circuit (not shown) is provided in order for the discriminator to perform high-speed detection as described above, and in order to supply this external phase shift circuit (RY
) This is possible because the IC is provided with a terminal that outputs the signal.

(R-
Y) Since the signals are not synchronized, an output can only be obtained every IH (see Fig. 2 (portion)). Therefore,
The output of the envelope detector (29) is at the beginning of FIG. 2 (2). The reset pulse creation circuit (30) uses envelope detection! (29) An output corresponding to the rising edge of the output is obtained (the rising edge is differentiated). Therefore(
A reset pulse like (e) can be obtained.

This reset pulse (E) controls (resets) the % frequency divider (21) that controls the line sequence switch (19) and the switch circuit (22).

This synchronizes the timing of the selection by the permutator and the selection of the line sequence switch (19) and switch circuit (22).

That is, the vermutator (9) selects the output of the Y/C separation circuit (6) only during the H'IA period where the (RY) signal is transmitted, but the line sequence switch ( 19) selects the output of the switch circuit (17). Then, during the same period, the carrier of FM modulation is (R-
Y) The frequency (f.,) corresponding to the signal is switched to the switch circuit (
22). The same applies to the period of the (BY) signal. Therefore, there is no need to use an IH delay line for synchronization.

Note that the video signal of the child screen is synchronized by the child screen decoder (3) for time axis compression (size compression). This is because the compression circuit (4) also supports the NTSC color television signal, and both color difference signals are input every period. So, what about controlling the line sequence switch (19) and switch circuit (22)? l! Just consider the relationship with the screen.

In addition, the compression operation of the compression circuit (4) and the switch circuit (16
)(17) and (18) are performed in synchronization with the synchronization signal of the main screen.

In the first embodiment, since the output of the % frequency divider (l4) in the integrated circuit cannot be taken out to the outside, it is necessary to construct a mechanical envelope detector or the like. However, as shown in Figure 3,
When the output of the 3A frequency divider (14) is obtained externally,
These configurations are unnecessary.

That is, the line sequence switch (19) and the switch circuit (22) may be controlled by the output of the % branch S (14).

(G) Effects of the Invention As described above, according to the present invention, an IH delay line for synchronizing color difference signals is not required, and the configuration is simplified.
It is advantageous in terms of cost and space.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a first embodiment of the present invention, and FIG. 2 is a waveform diagram related to FIG. 1. Figure 3 is a block diagram showing the second embodiment, Figure 4 is a block diagram showing the conventional example, and Figure 5 is a block diagram showing the conventional example.
The figure is a waveform diagram according to FIG. 4. (3) (7)...decoder, (2B)...encoder.

Claims (1)

[Claims] (1) In a picture-in-picture device that inputs a color television signal in which the color difference signal is line-sequentially transmitted, decodes it, synthesizes it, then encodes it and outputs it, the encoding operation is performed on the main screen signal. A picture-in-picture device characterized by performing decoding operations in synchronization with decoding operations.