JPH02292884A - Semiconductor laser device - Google Patents

Semiconductor laser device

Info

Publication number
JPH02292884A
JPH02292884A JP11219289A JP11219289A JPH02292884A JP H02292884 A JPH02292884 A JP H02292884A JP 11219289 A JP11219289 A JP 11219289A JP 11219289 A JP11219289 A JP 11219289A JP H02292884 A JPH02292884 A JP H02292884A
Authority
JP
Japan
Prior art keywords
layer
inp
active layer
high resistance
semiconductor laser
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11219289A
Other languages
Japanese (ja)
Inventor
Hiroyuki Nishimoto
浩之 西本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP11219289A priority Critical patent/JPH02292884A/en
Publication of JPH02292884A publication Critical patent/JPH02292884A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To effectively concentrate a high frequency current on an active layer to enable a semiconductor laser device of this design to execute a super- high speed modulation by a method wherein a part other than the vicinity of a light emitting region is covered with a high resistance semiconductor layer or the like. CONSTITUTION:An InP high resistance layer 9 is laminated on an N-InP substrate 1, the InP high resistance layer 9 is removed leaving a part of it unremoved so as to expose the N-InP substrate 1 for the formation of an inverted mesa-shaped step. An N-InP buffer layer 2, an InGaAsP active layer 3, a P-InP clad layer 4, and a P-InAsGaP contact layer 5 are successively laminated on the P-InP substrate 1 bringing the ends of them into contact with the inverted mesa-shaped step. The other ends of the InGaAsP active layer 3, the P-InP clad layer 4, and the P-InGaAsP contact layer 5 are etched to form a continuous reverse mesa-shaped step. As the InGaAsP active layer 3 is surrounded with a high resistance semiconductor layer or air, nearly all the signal current injected from a P-side electrode 7 is made to flow through the InGaAsP active layer, and consequently a semiconductor laser device of this design has a structure excellent in response characteristic to high frequency.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体レーザ装置に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to a semiconductor laser device.

〔従来の技術〕[Conventional technology]

m−v族化合物を用いた発光ダイオード,フォトダイオ
ード等の光半導体素子が光ファイバ通信,光情報処理の
キーデバイスとして用いられている。特に,半導体レー
ザは長距離・大容量光ファイバ通信システムの開発,実
用化全実現する上で最も重要な素子であり,近年高速化
の検討が進められている。
Optical semiconductor devices such as light emitting diodes and photodiodes using m-v group compounds are used as key devices for optical fiber communications and optical information processing. In particular, semiconductor lasers are the most important element in the development and practical implementation of long-distance, high-capacity optical fiber communication systems, and efforts have been made in recent years to improve their speed.

半導体レーザの高速化を図るには,発光領域である活性
層領域以外に存在する余分な容量(寄生容量)を小さく
することが高周波信号の漏れの低減に重要である。この
点については,「昭58年春季電子通信学会総合全国大
会講演論文集」の論文番号918において,小林等によ
って指摘されている。つまシ,寄生容量を低減させるに
は,活性層の直上の半導体表面層以外の領域に誘電率の
大きなSi02等の絶縁膜を?成すれば良《,このよう
な絶縁膜全形成することによって半導体レーザは2Gb
/s程度の高速での変調が可能になっている。
In order to increase the speed of semiconductor lasers, it is important to reduce the extra capacitance (parasitic capacitance) that exists outside the active layer region, which is the light emitting region, in order to reduce leakage of high-frequency signals. This point is pointed out by Kobayashi et al. in paper number 918 of the ``Collection of Lectures at the 1980 Spring National Conference of the Institute of Electronics and Communication Engineers.'' In order to reduce the parasitic capacitance, is it possible to place an insulating film such as Si02 with a high dielectric constant on the area other than the semiconductor surface layer directly above the active layer? By completely forming such an insulating film, the semiconductor laser can achieve 2Gb
It is possible to perform modulation at high speeds of about /s.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

ところで,光通信用の光源として使用されている高性能
な埋め込み型半導体レーザでは電流狭窄機構としてp−
n逆バイアス接合を用いている。このため,p−n接合
容量が太き《高周波の信号電流はこのp−n接合と半導
体層の抵抗金介して活性層以外の領域に漏れてしまう。
By the way, in high-performance buried semiconductor lasers used as light sources for optical communications, p-
n reverse bias junction is used. For this reason, the pn junction capacitance is large (high-frequency signal current leaks to regions other than the active layer through this pn junction and the resistor metal of the semiconductor layer).

その結果,半導体層表面に8102等の絶縁膜全形成す
るだけでは超高速半導体レーザを得ることができない。
As a result, it is not possible to obtain an ultrahigh-speed semiconductor laser simply by completely forming an insulating film such as 8102 on the surface of the semiconductor layer.

また,S10■自体も容量金持っており,例えば通常の
半導体レーザ素子の寸法程度の面積(300X250μ
m1 )に,厚さ3000人程度のSin2膜全形成し
た場合,810■自身の持つ容量は10pF程度となり
,  5GHz以上の高周波変調に対しては小さな容量
とは言えない。さらに,Si02 と半導体との熱膨脹
率は一桁程度?うのでSiO■形成後に半導体内部に歪
が残り,半導体レーザの信頼性に悪影響を与えてしまう
In addition, S10■ itself has a large capacitance, and for example, the area is about the size of a normal semiconductor laser element (300 x 250 μm).
When a Sin2 film with a thickness of about 3000 mm is completely formed on the 810cm1), the capacitance of 810■ itself is about 10 pF, which cannot be said to be a small capacitance for high frequency modulation of 5 GHz or higher. Furthermore, is the coefficient of thermal expansion of Si02 and semiconductor about one digit? Therefore, distortion remains inside the semiconductor after the SiO2 is formed, which adversely affects the reliability of the semiconductor laser.

本発明の目的は高周波電流全効果的に活性層に集中し,
超高速変調可能でかつ高信頼な半導体レーザ装置を提供
することにある。
The purpose of the present invention is to effectively concentrate high frequency current in the active layer,
An object of the present invention is to provide a highly reliable semiconductor laser device that is capable of ultra-high-speed modulation.

〔問題点を解決するための手段〕[Means for solving problems]

本発明の半導体レーザ装置は高抵抗半導体層が積層され
た第1導電型半導体基板が前記第1導電型半導体基板の
一部が露出するように除去されて段差部が設けられ,活
性層が段差部の高抵抗半導体層と接するようにして第1
導電型半導体層,活性層,第2導電型半導体層,コンタ
クト層全含む半導体層が積層され,前記コンタクト層,
第2導電型半導体層,活性層全ストライプ状にエッチン
グすることにより構成される。
In the semiconductor laser device of the present invention, a first conductive type semiconductor substrate on which a high resistance semiconductor layer is laminated is removed so that a part of the first conductive type semiconductor substrate is exposed to provide a stepped portion, and the active layer is formed with a stepped portion. The first layer is in contact with the high resistance semiconductor layer of the
Semiconductor layers including a conductive type semiconductor layer, an active layer, a second conductive type semiconductor layer, and a contact layer are stacked, and the contact layer,
The second conductivity type semiconductor layer and the active layer are formed by etching the entire active layer in stripes.

〔作 用〕[For production]

本発明は上記のように構成することにより,発光領域で
ある活性層の周囲は高抵抗半導体層と空気であるため,
いわゆる寄生容量の存在が極めて少ない。従って,半導
体内部kRれる信号電流は高周波域まで殆ど全て活性層
に供給され,高周波特性の優れた半導体レーザ装置が得
られる。
By configuring the present invention as described above, the active layer, which is the light emitting region, is surrounded by a high resistance semiconductor layer and air.
There is very little so-called parasitic capacitance. Therefore, almost all of the signal current flowing within the semiconductor is supplied to the active layer up to the high frequency range, resulting in a semiconductor laser device with excellent high frequency characteristics.

〔実施例〕〔Example〕

次に,本発明を実施例によって説明する。 Next, the present invention will be explained by examples.

第1図全参照して,n−InP基板1にInP高抵抗層
9が積層されて,InP高抵抗層9の一部を残してn一
■nP基板1が露出するまで(i−InP基板1の一部
も除去して)除去され,これによって逆メサ面状の段差
部が形成されている。n−InP基板1上にはn−In
Pバッファ層端部(左端部)′f.上記の段差部に接触
して順次形成され,■nGaA sP活性層3,p−工
nPクラッド層4.及びp一工nGaAsPコンタクト
層5の他端部(右端部)はエッチングされて連続した逆
メサ面状の段差となっている。この段差を形成するのは
電極形成の際に,段差の右側にある平坦面(以下段差の
底面という)と段差の左側にある平坦面(以下段差の上
面という)(p側電極)全電気的に分離する必要がある
ためで,後述するように,この逆メサ面の影全利用する
と蒸着工程のみで電極全分離形成できる。
Referring to FIG. 1, an InP high resistance layer 9 is laminated on an n-InP substrate 1 until the n-nP substrate 1 is exposed, leaving a part of the InP high resistance layer 9 (i-InP substrate 1). 1), thereby forming an inverted mesa-like stepped portion. On the n-InP substrate 1, there is n-In
P buffer layer end (left end)'f. A nGaA sP active layer 3, a p-type nP cladding layer 4. The other end (right end) of the p-nGaAsP contact layer 5 is etched to form a continuous inverted mesa-like step. This step is formed when the electrode is formed, and the flat surface on the right side of the step (hereinafter referred to as the bottom surface of the step) and the flat surface on the left side of the step (hereinafter referred to as the top surface of the step) (p-side electrode) are completely electrically connected. This is because it is necessary to separate the electrodes into two, and as will be described later, if the entire shadow of this inverted mesa surface is utilized, the electrodes can be completely separated using only the vapor deposition process.

この構造では,InGaAsP活性層6の周囲は高抵抗
半導体層もし《は空気であるのでp側電極7から注入さ
れた信号電流は殆ど全て工nGaAsP活性層5に流れ
るため,高周波応答特性に優れる構造となる。
In this structure, since the InGaAsP active layer 6 is surrounded by a high-resistance semiconductor layer (or air), almost all the signal current injected from the p-side electrode 7 flows into the InGaAsP active layer 5, resulting in a structure with excellent high frequency response characteristics. becomes.

ここで,第2図(a)〜(d)に本実施例の製作工程を
示す。
Here, FIGS. 2(a) to 2(d) show the manufacturing process of this embodiment.

まず第2図(a)に示すように,窒化シリコン膜11を
マスクとしてInP高抵抗層9が約5μm積層されたn
一工nP基板1のほぼ半分を約6μmの深さまでエッチ
ングする。この時エッチングは(100>方向であり,
エッチング液としてプロムメチル溶液(プロム0.2C
Cとメチルアルコール100ccの混合浴液)盆用いる
。このようにプロムメチル浴液を用いるので,第2図(
a)に示すように逆メサ面状のエッチング面(段差部)
が形成できる。
First, as shown in FIG. 2(a), an InP high resistance layer 9 of approximately 5 μm thickness is laminated using a silicon nitride film 11 as a mask.
Approximately half of the first-process nP substrate 1 is etched to a depth of about 6 μm. At this time, the etching is in the (100> direction,
Prom methyl solution (prom 0.2C
A mixed bath solution of C and 100 cc of methyl alcohol is used in a tray. Since the prommethyl bath solution is used in this way, the
As shown in a), the etched surface (step part) has an inverted mesa shape.
can be formed.

次に第2図(b)に示すように,窒化シリコン膜11を
マスクとして,逆メサ面状の段差部の底面,つまり,n
一■nP基板1上にn一■nPバッファ層2を2μm,
■nGaAsP活性層5を111μm,p−■nPクラ
ッド層4を2μm,及びp−InGaAsPコンタクト
層5’t1μm,MOOVD装置を用いて順次積層形成
する。ここでマスクとして窒化シリコン膜全用いている
のでマスク上にはポリ結晶が成長されに<<,更に逆メ
サ面状の段差部が形成されているので各層の成長面は比
較的平坦に成長できる。
Next, as shown in FIG. 2(b), using the silicon nitride film 11 as a mask,
n-nP buffer layer 2 with a thickness of 2 μm on one-nP substrate 1;
(1) An nGaAsP active layer 5 of 111 μm, a p--2 nP cladding layer 4 of 2 μm, and a p-InGaAsP contact layer 5't of 1 μm are sequentially laminated using a MOOVD apparatus. Here, since the entire silicon nitride film is used as a mask, polycrystals are not grown on the mask.Furthermore, an inverted mesa-like step is formed, so the growth surface of each layer can be grown relatively flat. .

第2図(C)に示すように,バッファード7ッ酸を用い
て窒化シリコン膜11を除去した後に,新たに窒化シリ
コン膜12全形成し,窒化シリコン膜12をマスクとし
てMO−CVD装置で形成したn−InPバッフy N
 2 ,  I n G a A s P活性層5,p
一■nPクラッド層4,及びP−工nGaAsPコンタ
クト層5をプロムメチル溶液を用いて,すくなくともn
一工nPパッフ1層2が露出するまでエッチングを行う
。ここでマスクである窒化シリコン膜12は,エッチン
グ後に工nGaAsP活性層6の幅が約1μm程度にな
るように形成されている。
As shown in FIG. 2(C), after removing the silicon nitride film 11 using buffered 7-hydrochloric acid, a new silicon nitride film 12 is completely formed, and an MO-CVD apparatus is used to form the silicon nitride film 12 using the silicon nitride film 12 as a mask. The formed n-InP buffer yN
2, InGaAsP active layer 5,p
- The nP cladding layer 4 and the P-nGaAsP contact layer 5 are coated with at least an
Etching is performed until the first nP puff layer 2 is exposed. The silicon nitride film 12 serving as a mask is formed so that the width of the nGaAsP active layer 6 is approximately 1 μm after etching.

第2図(d)に示すように2バッファードフッ酸?用い
て窒化シリコン膜12全除去したあと,p側電極Zを蒸
着する。ここでは蒸着金属としてCrとAu′f!:抵
抗加熱真空蒸着法により順次蒸着した。真空蒸着法では
高真空中で蒸着を行うために,蒸着する金属は蒸着源か
らほぼ直線的に進む。従って蒸着源を第2図(d)の左
斜め上に置いて蒸着を行えば第2図(d)に示す工うに
段差の上面(P側電極)と段差の底面に蒸着される部分
(電極部分)は分離できる。更に580℃の水素雰囲気
中で5分間熱処理を行った後,n−InP基板1側の鏡
面研摩を行い,厚さ約150μmにした後n側電極8全
Ti,Auをn一工nP基板側に順次形成し,熱処理全
行いプロセスを終了する。
2-buffered hydrofluoric acid as shown in Figure 2(d)? After the silicon nitride film 12 is completely removed using a p-side electrode Z, a p-side electrode Z is deposited. Here, Cr and Au'f! are used as vapor deposited metals. : Sequentially deposited by resistance heating vacuum evaporation method. In the vacuum evaporation method, the metal to be evaporated advances almost linearly from the evaporation source because the evaporation is performed in a high vacuum. Therefore, if the evaporation source is placed diagonally to the upper left of FIG. 2(d) and the evaporation is performed, the structure shown in FIG. parts) can be separated. After further heat treatment for 5 minutes in a hydrogen atmosphere at 580°C, the n-InP substrate 1 side was mirror-polished to a thickness of approximately 150 μm. The process is then completed with all heat treatments.

上述した半導体レーザは,  工nGaAsP活性層5
の両脇は高抵抗層或いは空気で覆われている。従ってp
−n接合等による余分な接合容量が殆ど存在せず,電極
金属から供給された電気信号は,直流から高周波領域に
渡ってその殆どがInGaAsP活性層6に供給される
。このため高周波応答特性に優れる半導体レーザ装置が
供給される。
The semiconductor laser described above has a nGaAsP active layer 5.
Both sides are covered with a high resistance layer or air. Therefore p
There is almost no extra junction capacitance due to -n junctions, etc., and most of the electrical signals supplied from the electrode metal are supplied to the InGaAsP active layer 6 in the range from direct current to high frequency. Therefore, a semiconductor laser device with excellent high frequency response characteristics is provided.

この半導体レーザウェハー金,共振器長が500μmと
なるようにへき開t行い,ストリップライン上に直接融
着を行い半導体レーザを組立て,小信号周波数特性全測
定した。その結果,発振閾値の2倍のバイアス電流値に
おいて5dB帯域として10GHz以上の値が得られた
。この3dB帯域は短共振器化による光子密度の増加,
フォトンライフタイムの減少,冷却等を施すことにより
更に高い値になる。
This semiconductor laser wafer gold was cleaved to a cavity length of 500 μm, fused directly onto the strip line, a semiconductor laser was assembled, and all small signal frequency characteristics were measured. As a result, a value of 10 GHz or more was obtained as a 5 dB band at a bias current value twice the oscillation threshold. This 3dB band is due to the increase in photon density due to the shortened cavity.
By reducing the photon lifetime and applying cooling, etc., the value becomes even higher.

以上本発明について実施例によって説明したが,本実施
例ではInGaAsP系半導体レーザについて説明した
が,その他の材料,例えばGaAIAs系等の半導体レ
ーザにも適用可能である。
The present invention has been described above with reference to embodiments, and although the InGaAsP-based semiconductor laser has been described in this embodiment, it is also applicable to semiconductor lasers made of other materials, such as GaAIAs-based semiconductor lasers.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明では,発光領域近傍以外の部
分を高抵抗半導体層等で覆うことにより,半導体レーザ
内部の寄生容量を極力除去することが可能になる。さら
にSin2等の誘電体膜を使用していないため,信頼性
についてか大幅に向上する。
As described above, in the present invention, by covering the portion other than the vicinity of the light emitting region with a high-resistance semiconductor layer or the like, it is possible to eliminate the parasitic capacitance inside the semiconductor laser as much as possible. Furthermore, since a dielectric film such as Sin2 is not used, reliability is greatly improved.

このように本発明によって1QGHz以上の変調帯域を
有し,かつ信頼性にも優れる超高速半導体レーザ装置を
容易に得ることができる。
As described above, according to the present invention, an ultrahigh-speed semiconductor laser device having a modulation band of 1QGHz or more and excellent reliability can be easily obtained.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の第1の実施例の構造を示す断面図,第
2図(a)〜(d)は第1図に示す実施例の製作工程を
説明するための断面図である。 図において1はn−工nP基板,9はInP高抵抗層,
2はn一■nPバッフ1層,6は工nGaAsP活性層
,4はp−InPクラッド層, 5は脅へ p−工nGaAsPコンタクト層である。 第2図
FIG. 1 is a sectional view showing the structure of a first embodiment of the present invention, and FIGS. 2(a) to 2(d) are sectional views for explaining the manufacturing process of the embodiment shown in FIG. In the figure, 1 is an n-type nP substrate, 9 is an InP high resistance layer,
2 is an n-nP buffer layer, 6 is an active nGaAsP layer, 4 is a p-InP cladding layer, and 5 is a p-nGaAsP contact layer. Figure 2

Claims (1)

【特許請求の範囲】[Claims] 1、第1導電型半導体基板と、該第1導電型半導体基板
の一部が露出するように前記第1導電型半導体基板上に
形成された高抵抗半導体層と、前記第1導電型半導体基
板と前記高抵抗半導体層とによって規定される段差と、
一端が前記段差に接触して前記第1の導電型半導体基板
上に形成された第1導電型半導体層と、一端が前記段差
に接触して前記第1導電型半導体層上に順次積層形成さ
れ該段差面に沿ってストライプ状に形成された活性層、
第2導電型半導体層、及びコンタクト層とを有し、前記
活性層の前記一端は前記高抵抗半導体層に接触している
ことを特徴とする半導体レーザ装置。
1. A first conductive type semiconductor substrate, a high resistance semiconductor layer formed on the first conductive type semiconductor substrate so that a part of the first conductive type semiconductor substrate is exposed, and the first conductive type semiconductor substrate and a step defined by the high resistance semiconductor layer;
a first conductivity type semiconductor layer formed on the first conductivity type semiconductor substrate with one end in contact with the step; and a first conductivity type semiconductor layer with one end in contact with the step and formed on the first conductivity type semiconductor layer. an active layer formed in a stripe shape along the step surface;
A semiconductor laser device comprising a second conductivity type semiconductor layer and a contact layer, wherein the one end of the active layer is in contact with the high-resistance semiconductor layer.
JP11219289A 1989-05-02 1989-05-02 Semiconductor laser device Pending JPH02292884A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11219289A JPH02292884A (en) 1989-05-02 1989-05-02 Semiconductor laser device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11219289A JPH02292884A (en) 1989-05-02 1989-05-02 Semiconductor laser device

Publications (1)

Publication Number Publication Date
JPH02292884A true JPH02292884A (en) 1990-12-04

Family

ID=14580566

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11219289A Pending JPH02292884A (en) 1989-05-02 1989-05-02 Semiconductor laser device

Country Status (1)

Country Link
JP (1) JPH02292884A (en)

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