JPH02292820A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To prevent oxidation and exfoliation of high melting point metal in the process followed, or to prevent the growth of a silicon oxide film and the like on the interface between the high melting point metal and a polycrystalline silicon film by a method wherein, in the process in which an electrode consisting of two layers of polycrystalline silicon and high melting point metal is formed, a high melting point metal forming process is conducted after the diffusing process of a semiconductor device has been finished. CONSTITUTION:A process in which a polycrystalline silicon film 104 is formed on one main surface of a semiconductor substrate 101, a process in which the electrode consisting of polycrystalline silicon film 104 is formed by patterning the above-mentioned polycrystalline silicon film 104 using a photolithographic technique, a process in which an insulating film 112 is coated on the whole surface after the necessary diffusion process has been finished, a process in which the insulating film 112 on the electrode consisting of the above-mentioned polycrystalline silicon film 104 is removed using a photolithographic technique, and a process in which a high melting point metal film 114 is selectively grown on the electrode consisting of the above-mentioned polycrystalline silicon film 104, are conducted. For example, after a diffusion process has been finished, an oxide film 112 is formed on the whole surface, been and after the oxide films 105 and 112 on the gate electrode have removed, a tungsten film 114 is selectively grown on the gate electrode.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a semiconductor device, and particularly to a method for manufacturing a semiconductor device having an electrode made of two layers of polycrystalline silicon and a high melting point metal.

[Prior Art] As the density of semiconductor devices progresses, the negative effects of high resistance of polycrystalline silicon electrodes become apparent, and the necessity of lowering the resistance of these electrodes is increasing. As a means of lowering resistance, polycrystalline silicon has been lined with silicide or high melting point metal. Among these, the sheet resistance of the polycrystalline silicon layer can be lowered by an order of magnitude in the two-layer structure using silicide, whereas
If a high melting point metal is used, it can be lowered by another order of magnitude, so electrically, two layers of high melting point metals are used!
It is clear that R construction is more advantageous. Conventionally, to form an electrode consisting of two layers of polycrystalline silicon and high-melting point metal, polycrystalline silicon and high-melting point metal were deposited on the entire surface, and then bar turning was performed using lithography technology, using a resist as a mask. It was formed by etching two layers simultaneously. In conventional manufacturing methods, semiconductor devices have been manufactured by performing further treatments such as diffusion, oxidation, or etching after forming the second electrode. [Problems to be Solved by the Invention] In the conventional semiconductor device described above, after forming an electrode made of two layers of polycrystalline silicon and a high melting point metal, the semiconductor device is subjected to reactive ion etching, heat treatment in an oxidizing atmosphere, etc. Since various steps are required to form the device, there are disadvantages in that the high melting point metal may be oxidized or peeled off in the steps after electrode formation, or a silicon oxide film may be introduced at the interface with polycrystalline silicon. Furthermore, the influence of contamination from high-melting point metals is also significant. [Means for Solving the Problems] The method for manufacturing a semiconductor device of the present invention includes a step of depositing a polycrystalline silicon film, and a step of patterning the polycrystalline silicon film using photolithography technology to form a polycrystalline silicon film. a step of forming an electrode made of the polycrystalline silicon film, a step of depositing an insulating film that will become an interlayer insulating film after the required diffusion process is completed, and a step of depositing the insulating film on the electrode made of the polycrystalline silicon film using photolithography technology. and selectively growing a high melting point metal film on the electrode made of the polycrystalline silicon film.

[Embodiments] Next, embodiments of the present invention will be described with reference to the drawings. FIGS. 1(a) to 1(f) are cross-sectional views of a semiconductor device showing a first embodiment of the present invention. First, p-type silicon substrate 1
After forming an element isolation region using a thermal oxide film 102 on 01, a gate oxide film 103 is formed by a thermal oxidation method. Next, a polycrystalline silicon film 104 for forming a gate electrode is grown on the entire surface by vapor phase growth to a thickness of approximately 1000 to 5000 nm, and after phosphorus is diffused, an oxide film 105
is grown to a film thickness of about 1,000 to 3,000 layers using the same vapor phase growth method. Next, a photoresist 106 is applied, exposed and developed [FIG. 1(a)]. Using the photoresist 106 as a mask, a gate electrode is formed using reactive ion etching. Next, the injection amount l Q 12
P ions 107 of ~l Q 14ci-2 are implanted to form an n-type low concentration diffusion region 108 [see Fig. 1 (
b)], Next, an oxide film 109 is grown on the entire surface by a vapor phase growth method to a thickness of about 1000 to 50 μm [Fig.
)], form side holes on the gate sidewalls by etching the entire surface. Subsequently, injection amount 1015~1
As ions 110 of about 0.16 cm'-2 are implanted to form an n-type high concentration diffusion region 111 [FIG. 1(d)]
]. Next, an oxide film 112 is formed on the entire surface by vapor phase epitaxy to a thickness of about 1000 to 30 000 nm, and a photoresist 1
After coating No. 13, exposure and development are performed [Figure 1 (e)]
．． Oxide films 112 and 105 on the gate electrodes are etched using reactive ion etching using the photoresist 113 as a mask.
Remove. Next, a high melting point metal film 114, for example a tungsten film, is selectively grown on the gate electrode [FIG. 1(f)]. Thereafter, by depositing an insulating film between the eyebrows and providing aluminum wiring, an n-channel MOS transistor can be formed. Similarly, a p-channel MOS transistor can also be formed.

FIGS. 2A to 2D are cross-sectional views of a semiconductor device showing the process order of a second embodiment of the present invention. n+ buried on p-type silicon substrate 201/! ! After forming 202, an n-type epitaxial layer is formed, and a p''-type isolation region 203 is formed surrounding the transistor forming region of the epitaxial layer.A thick thermal oxide film 204 is selectively formed on the semiconductor substrate. After forming a collector electrode and an n + type plug region 205 with an n-type polycrystalline silicon film 206 in a region separated by a thermal oxide film 204, a photoresist 207 is formed.
using as a mask, injection amount 1012-1014c
B ions 208 of about m-2 are implanted to form a base region 209 [FIG. 2(a)]. Next, an oxide film 210 is grown on the entire surface by a vapor phase growth method to a thickness of about 1000 to 3000 layers. Next, the oxide film 210 on the emitter region is removed by photolithography to expose the silicon surface. Subsequently, a polycrystalline silicon film 21 is formed on the entire surface.
1 is grown to a film thickness of about 1,000 to 3,000 layers using the vapor phase growth method. Next, the injection amount was 1015 to 10”cra-
After implanting about 2 As ions 212, heat treatment is performed to push As into the substrate to form an emitter region 213 [FIG. 2(b). Next, an emitter electrode is formed using photolithography technology, and an oxide film 214 is deposited to a thickness of 1 on the entire surface by vapor phase growth.
Grow from 0oO to around 3,000 people. Next, a photoresist 215 is applied, exposed and developed [Second
Figure (c)]. Next, using the photoresist 215 as a mask, reactive ion etching is performed to remove the oxide films 214 and 210 on the emitter and collector electrodes. Next, a high melting point metal film 216 is selectively grown on the emitter electrode and the collector electrode [Fig.
)]. Thereafter, by depositing an insulating film between the eyebrows and providing aluminum wiring, an npn bibolar transistor can be formed. "Effects of the Invention" As explained above, the present invention provides a process for forming an electrode consisting of two layers of polycrystalline silicon and a high melting point metal, in which the process of forming the high melting point metal is performed after the diffusion process of the semiconductor device is completed. Since this is carried out later, according to the present invention, oxidation and peeling of the high melting point metal in the subsequent process or the formation of a silicon oxide film at the interface with the polycrystalline silicon film can be prevented.

Furthermore, contamination by high melting point metals can be minimized. Therefore, according to the present invention, it is possible to reduce the resistance of the electrode while taking advantage of the features of the miniaturization process using polycrystalline silicon without causing a decrease in yield.

[Brief explanation of the drawing]

FIGS. 1(a) to (f) and FIGS. 2(a) to (d) are cross-sectional views of a semiconductor device showing the process order of the first and second embodiments of the present invention, respectively. 101...p-type silicon substrate, 102...thermal oxide film, 103...gate oxide film, 104...polycrystalline silicon film, 105...
・Oxide film, 106... Photoresist, 107
... P ion, 108 ... n-type low concentration diffusion region, 109 ... oxide film, 110 ... As ion,
111... N-type high concentration diffusion region, 112... Oxide film, 113... Photoresist, 114... High melting point metal film, 201... P-type silicon substrate, 20
2...n+ type buried layer, 203...p" type isolation region, 204...thermal oxide film, 205...n" type brag region, 206...n type polycrystalline silicon film,
207... Photoresist, 208... B ion, 209... Base region, 210... Oxide film, 211... Polycrystalline silicon film, 212...
As ion, 213... emitter region, 214.
...Oxide film, 215...Photoresist, 21
6...High melting point metal film. Figure 1

Claims (1)

[Claims] A step of forming a polycrystalline silicon film on one main surface of a semiconductor substrate, a step of patterning the polycrystalline silicon film using photolithography technology to form an electrode made of the polycrystalline silicon film, and a necessary diffusion step. After that, a step of depositing an insulating film on the entire surface, a step of removing the insulating film on the electrode made of the polycrystalline silicon film using photolithography, and a step of replacing the high melting point metal film with the polycrystalline silicon film. A method for manufacturing a semiconductor device, comprising the step of selectively growing on an electrode made of.