JPH0228383A - Semiconductor device - Google Patents

Abstract

PURPOSE:To obtain OEIC structure for light receiving that the responsiveness of light carriers for long wave length (1.3-1.5mum) is high-speed by doing growth in double-hetero structure on a semi-insulating substrate so as to provide a hetero MSM(Metal-semiconductor-Metal) photodiode and a hetero MESFET (Shottky gate FET). CONSTITUTION:Inside multilayer heteroepitaxial layers 41, 34, 35, 41', 34' and 35' which are formed in the crystal growth of one time on a semi-insulating compound semiconductor substrate 33 and are isolated in island shapes, a hetero Shottky photodiode 31 as a light receiving element and a hetero Shottkly gate field-effect transistor 32 as an active element are formed, respectively. And elements are integrated monolithically and an OEIC(Opt-Electronic IC) for light receiving is constituted. Hereby. OEIC structure for light receiving can be obtained which can be used for long wave length (1.3-1.5#Xm), and which can be made in the crystal growth of one time, and that the MSM photodiode and the MESFET are both in planer structure, and that dark currents are small, and that the responsiveness of light carriers is high-speed.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a semiconductor device, and in particular, a photodetector (light receiving element) using a compound semiconductor and an electrically active element such as a transistor are connected to the same semi-insulated semiconductor device. The present invention relates to an optical integrated device monolithically integrated on a chemical compound semiconductor substrate.

[Conventional technology]

With the spread of optical fiber communications, efforts are being made domestically and internationally to reduce costs and increase the speed of operation using photodetector integrated circuits that integrate photodetectors and amplifier circuits.

Conventionally, so-called pinFETs, which are monolithically integrated pin-type photodiodes and FET (field effect transistor) circuits, have mainly been prototyped. However, whereas a pin-type photodiode has a growth layer several μm thick and current flows perpendicularly to the substrate, a field-effect transistor has a growth layer with a thickness of at most 0.3 μm. Since this is a growth layer and is an element in which current flows horizontally with respect to the substrate, crystal growth is usually required two or more times. Further, due to limitations in photolithography, it was necessary to keep the level difference on the substrate surface small, which caused great difficulties in manufacturing.

A clever structure that improves this point is a Schottky-type photodiode (hereinafter referred to as Metal-Semiconductor-M).
etal) is abbreviated as MSM photodiode),
Schottky gate FET (so-called MESFET)
A light-receiving OEIC (Opto-Electronic IC), which is monolithically integrated on a semi-insulating GaAs substrate, has been proposed. (Applied by M. Ito et al.
Physics Letters 47 (1985) No. 112
9 pages (M, Ito atal, Appl, Ph
ys, Lett.

47 (1985) p, 1129) Figure 2 (a) shows the conventional light receiving 0
A schematic cross-sectional view of the EIC, FIG. 2(b), is a diagram showing the energy band state when the MSM photodiode of FIG. 2(a) is operated.

21 is an MSM photodiode, 22 is a MESFET, 2
3 is a semi-insulating GaAs substrate, 24 is a high resistance GaAs light absorption layer of the MSM photodiode 21, 24'
2 is a high resistance GaAs active layer of the MESFET 22 formed by one epitaxial crystal growth at the same time as the high resistance GaAs optical absorption calendar 24; 25 is an n-type GaAs active layer;
6 is a Schottky electrode made of AQ, for example, and 26' is a Schottky gate electrode.

27 is a negative (-) side electrode of the Schottky electrode 26, 28 is a positive (+) side electrode of the Schottky electrode 26, 29 is a source ohmic electrode, and 30 is a drain ohmic electrode. These ohmic electrodes are, for example, A u G
It consists of e/Ni/Au.

To realize this structure, only one crystal growth is required, and the MSM photodiode 21 and MESFET 2
Both of them have a planar structure and have great advantages such as being suitable for miniaturization.

As the Schottky electrode 26 of the MSM photodiode 21, an interdigital electrode structure having a so-called interdigitated finger shape is generally used.
A (+) bias voltage is applied to the Schottky electrode 8 and a (-) bias voltage is applied to the other Schottky electrode 27 to operate in an energy band state as shown in FIG. 2(b).

In the Schottky electrode of the GaAs layer, there is an n-type Schottky barrier φ. is about 0.8V, p-type Schottky barrier φ,
Since the voltage is as high as approximately 0.6V, the injection of electrons and holes from the Schottky electrode can be ignored even under high bias voltage.
It becomes a low noise detector with small dark current.

[Problem to be solved by the invention]

The only drawback of the conventional structure shown in Figure 2 is that, due to the large energy bandgap of GaAs, it is not sensitive to the 1.3-1.5 μl wavelength band normally used in current optical fiber communications. .

In order to have sensitivity in the wavelength band of 1.3 to 1.5 μm,
The ideal structure would be to use an InP substrate instead of a GaAs substrate and use an InGaAs layer grown as a photodetector (light absorption layer) on the InP substrate.
The s layer is an n-type Schottky barrier φ. is about 0.3V,
The p-type Schottky barrier φ is about 0.45VL,
If this continues, the leakage current will be too large, making it impossible to fabricate either an MSM photodiode or a MESFET.

The purpose of the present invention is to solve the above problems and
, 3 to 1.5 μm), ■ Can be fabricated with one crystal growth, ■ Both the MSM photodiode and MESFET have a planar structure, and ■ Has a small dark current (i.e., an effective n-type Schottky barrier φ
(1) The object of the present invention is to provide a light-receiving 0EIC structure in which the response of optical carriers is high.

[Means to solve the problem]

An undoped InAl2As buffer layer and an n-type InGaAs layer (impurity concentration 0.5x1) are formed on a semi-insulating InP substrate.
017-3 Xl017an-3), I n A
A double heterostructure in which QAs cap layers were grown one after another was grown to produce the structure shown in FIG. 3(a). This figure is a sectional view for explaining the basic structure of the present invention. Figure 3(b) shows the hetero MS of Figure 3(a).
FIG. 3 is an energy band diagram during operation of an M photodiode.

31 is a hetero MSM photodiode, 32 is a hetero ME
SFET, 33 is a semi-insulating InP substrate, 41.41' is an undoped I nAQAs buffer fm, 34
is the n-type I nGaA of the hetero MSM photodiode 31.
s light absorption layer, 34' is n-type I of hetero MESFET 32
nGaAs active layer, 35 and 35' are respectively undoped InAQAs cap layers, 36 is a Schottky electrode, 36' is a Schottky gate electrode, 37 is the (-) side electrode of the Schottky 36, and 38 is a Schottky The (+) side electrode of the electrode 36, 39 is a source ohmic electrode, and 40 is a drain ohmic electrode.

Surface undoped I nAQAs cap i35.35
', the n-type Schottky barrier φ is about 0.6V, the p-type Schottky barrier φP is about 0.8V, and InGa
Peter MES is relatively good because it is sufficiently higher than As.
FETs and Peter MSM photodiodes can be made. The energy band diagram of the hetero M, SM photodiode in this case in its operating state is shown in FIG. 3(b).

By preventing the injection of electrons and holes from the Schottky electrodes 37 and 38 at both ends of the figure, dark current can be prevented. However, when a high-speed optical pulse of several gigabits/second or more is incident, the electrons and holes generated in the central InGaAsj 134 are transferred to the InAlAs layer and the InGaAs layer.
It was found that because the conduction band barrier ΔEc created by the layer is about 0.5V and the valence band barrier ΔEυ is about 0.2V, it accumulates at these hetero-interfaces and impedes high-speed operation.

In order to solve this problem, an asymmetric hetero-Schottky structure as shown in FIG. 4 is ideal. As shown in the figure, an n-type Schottky barrier φ. , p-type Schottky barrier φ, is an electron.

high enough to prevent hole injection, and
The conduction band barrier ΔEc and the valence band barrier ΔEυ are sufficiently low to prevent carrier accumulation.

However, such an ideal combination does not exist in a compound semiconductor grown on an InP substrate with lattice matching. Therefore, in the present invention, as shown in FIG. 5, for example, a (p+/i) type (upper layer/lower layer) InAI2As cap layer is used as a (-) side heterobarrier, and a Schottky electrode is attached to the cap layer. On the (+) side, this (p
The above problem was solved by using a structure in which an ohmic electrode was attached to the n-type InGaAs layer itself, in which the t/i)-type InAQAs layer was removed by selective etching.

[Effect]

For example, in such a structure, it becomes a p-in type hetero energy band structure, and the effective n-type Schottky barrier height φne11 is 1.4 V, which is almost equal to the energy band gap of InAlAs. It is extremely large and can completely prevent dark current caused by electron injection.

On the other hand, the p-type Schottky barrier φ to InGaAs1
, is approximately 0.45V, which is sufficient to prevent dark current due to hole injection. In this way, the reverse breakdown voltage increases significantly,
Since it becomes possible to apply a high voltage, holes generated by light absorption are accelerated by sufficiently hot carriers and become I
It is now possible to flow extremely quickly to the (-) side ffi pole without being trapped at the nAQAs/InGaAs interface, making it possible to realize a light-receiving OEIC that operates at high speed and has high sensitivity.

In other words, the 0EIC with such a structure is
, 3 to 1.5 μm), ■ It can be manufactured by one crystal growth, and ■ Both the hetero MSM photodiode and the hetero MESFET have a planar structure.
All of the objects that the present invention aims to achieve can be achieved: (1) the dark current is small (that is, the effective n-type Schottky barrier φnext is high), and (2) the responsiveness of photocarriers is fast.

〔Example〕

Example 1 First, a first example of the present invention will be described using FIG. 3(a). This embodiment is based on FIG. 3 (a) explained previously.
), and shows an example of a light-receiving OEIC in which a hetero MSM photodiode and a hetero MESFET are monolithically integrated on a semi-insulating InP substrate.

Since each part with reference numerals has already been explained, the manufacturing method will be described.

First, an undoped InA12As layer (41
.
) was grown to a thickness of 0.5 to 0.1 μm, and (pf
/i) Type I nAQAs layer (35, 35') (P+ layer impurity concentration 5 x 10"Ca1-3, pt layer thickness 1
00 people, the i layer is undoped and has a thickness of 400λ) and a thickness of 50
"100n was grown.The growth temperature was 500~
It is 550"C.

That is, layers (41, 41'), (34, 34'),
(35,35') was formed by one epitaxial crystal growth.

Next, after separating the hetero MSM photodiode 31 and the hetero MESFET 32 by mesa etching, Schottky gold am (36° 36') (AQ or T i /A u ) was deposited on them to a thickness of 0.3 μm. The gate length of the hetero MESFET 32 was 0.5 to 1 .mu.I, and the Schottky electrode 36 of the hetero MSM photodiode 31 was 30 .mu.m square with a line and space of 1 .mu.I.

Next, ohmic electrodes (39, 40) (AuGe/N i /
After depositing A u ) to a thickness of 0.3 μrs, the temperature was
It was heat-treated for 3 minutes to form an alloy. Next, for the padding of the entire hetero MSM photodiode 31 and hetero MESFET 32, S i N
After depositing a film (not shown) to a thickness of 400 nm, interconnection was performed. Although not shown in the drawings, resistors and level shift diodes necessary for the light-receiving 0EIC circuit were also fabricated using the epitaxial growth layer.

Regarding the circuits, a transimpedance type using a feedback resistor similar to the conventional example shown in the above-mentioned literature and an integral high impedance type were fabricated.

Next, after forming a contact hole in the passivation film, a wiring metal layer was deposited to complete a light-receiving 0EIC.

Example 2 A light-receiving 0EIC having the asymmetric hetero-Schottky electrode structure shown in FIG. 5 was also produced using the same process as above.

FIG. 1 is a schematic cross-sectional view of the light-receiving 0EIC of this example. FIG. 6 is a schematic cross-sectional view of the 0EIC hetero MESFET.

1 is a hetero MSM photodiode, 2 is a hetero MESF
ET, 3 is a semi-insulating 1nP substrate, 4.4' is an undoped I n A Q A s buffer, 5 is an n-type InGaAs optical absorption layer of hetero MSM photodiode 1, and 5' is an n of hetero MESFET 2. type InGaAs active layer, 6 is the Schottky pole of the hetero MSM photodiode 1, 6' is the Schottky gate electrode of the hetero MESFET 2, 7 is the (-) side electrode of the Schottky electrode 6, 8
is the (+) side electrode of the Schottky electrode 6, 9 is the source ohmic electrode, 1o is the drain ohmic electrode, 12
．． 12' is a p-type I n A fl A s cap layer;
11.11' is an undoped InA nAs cap layer, and in FIG. 6, 13 is a depletion layer.

In this embodiment as well, shoulders (4, 4'), (5, 5'), (11
, 11') and (12, 12') were formed by one epitaxial crystal growth.

That is, in this embodiment, the Schottky electrode 7 on the (-) side of the hetero MSM photodiode 1 is
) type I nAQAs cap layer (12, 11), the (+) side Schottky electrode 8 is provided on the (p+/i
) type InAlAs layer 12.11 is selectively removed.
An nGaAsGaAs light absorption film 5 is formed. In addition, the Schottky gate electrode 6' of the hetero MESFET 2 is also (
p+/i) type InAlAs chip layer (12'
11').

To form this structure, before forming the Schottky electrode 8 on the (+) side of the hetero MSM photodiode 1, a photoresist film is used as a mask and HF:hydrogen peroxide:water=1
: (pt/i) type I nAl using a 1:10 solution.
2As cap layer 12.11 is n-type I n Ga A
After removing the 0th order from the s-light absorption layer 5 by selective etching, a 0.3% Au layer is formed as the (+) side Schottky electrode 8.
μ■ vapor deposition was performed and lift-off was performed. In addition, we also compared the case where an AuGe/Ni/Au-based ohmic electrode was attached as the (+) side electrode, but the high-speed response of the hetero MSM photodiode was similar to that when a Schottky electrode was attached. Ta.

Furthermore, in addition to this, the cap layer is (i/p+/i) type I
Before forming the nAl2As layer and forming the (+) side Schottky electrode, a photoresist film is masked and HF:
H,02:H,O=1:1:10 etching solution to form (i/p“/i) type I n A Q of the cap layer.
A similar structure can be obtained in which the (i/pf) part of the surface of the As layer is removed by selective etching, and then the (+) side Schottky electrode is formed on the remaining j-type I nAQAsl by the lift-off method. High speed was achieved.

After mounting the light-receiving 0EIC of this example on a mount 1 designed for microwave ICs up to 30 Gl (z), alignment was performed so that the 30 μm square photodiode section was irradiated with light from the optical fiber. We conducted an optical transmission experiment.At an N, RZ signal bit rate of 2.4 Gb/sec, which is often used in digital pulse communication, a minimum receiving sensitivity level of -35 dBm, which gives a pit error rate of 10-9, was obtained. .Bit rate IOG b /se
With e, a minimum receiving sensitivity level of -28 dBm was obtained.

As described above, the light receiving 0EIC of the above embodiment
It has been confirmed that this device has excellent performance equivalent to or better than that obtained with a conventional light-receiving OEIC having a hybrid structure of an InGaAs/InP pin photodiode and a GaAs IC. In terms of ease of manufacturing, conventional monolithic pin FET devices have been prototyped using two crystal growths, but only one crystal growth is required, making them excellent in mass production.

In addition, in the above embodiment, I n A Q A s /
I nGa As / I n A n As
/ I n P system growth structure was explained as an example, but
As a buffer layer, InP is used instead of InARAs layer.
Layers may also be used.

Further, in general compound semiconductors, as explained in FIG. 5, the effect of using a (pf/i/n) hetero-Schottky structure in the cap layer is remarkable. Furthermore, I n
The doping of the AQAs layer is also (i/pf/i), (n-
/p+/i), etc., but the energy band structure substantially has the energy band structure shown in FIG. 5, and is included in the present invention.

〔Effect of the invention〕

As explained above in detail, according to the present invention, it is a pinFET for long wavelengths (1.3 to 1.5 μm);
It can be produced by one-time crystal growth, has excellent mass production, and ■Hetero M
Both the SM photodiode and the hetero MESFET have a planar structure, and the dark current is small (that is, the effective n-type Schottky wall φnel f is high).
,■0EIC for light reception with fast response of optical carrier
structure can be provided.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of a light-receiving 0EIC according to an embodiment of the present invention, FIG. 2(a) is a sectional view of a conventional light-receiving 0EIC, and FIG. 2(b) is a sectional view of a conventional light-receiving 0EIC. FIG. 3(a) is a cross-sectional view of a light-receiving 0EIC according to another embodiment of the present invention, and FIG. 3(b) is an energy band diagram of the MSM photodiode operating. The energy band diagram when the MSM photodiode is operating. Figure 4 is the energy band diagram when the ideal asymmetric hetero M8M photodiode is operating.
Figure 5 is an energy band diagram during operation of the hetero MSM photodiode in Figure 1, and Figure 6 is the energy band diagram for the light receiving O in Figure 1.
FIG. 2 is a cross-sectional view of an EIC hetero MESFET. 1... Hetero MSM photodiode 2... Hetero MESFET 3... Semi-insulating InP substrate 4.4'... Undoped I n A Q A s Barrier layer 5... N-type I n Ga A s Light-absorbing film layer 5 / , n-type InGaAs active layer 6
...Schottky electrode 6'...Schottky gate electrode 7...(-) side electrode 8...(+) side electrode 9...Source ohmic electrode 10...Drain ohmic electrode 12 .12' - P-type I nA12As cap layer 11.11' - Undoped I n A Q, A
s cap layer 21...MSM photodiode 22...MESFET 23...semi-insulating GaAs substrate 24...high resistance GaAs light absorption layer 24'...
High resistance GaAs active layer 25...n-type GaAs active layer 26...Schottky f4 crosspiece 26'...Schottky gate ff electrode 27...(
-) side electrode 28... (+) side electrode 29... Source ohmic electrode 30... Drain ohmic electrode 31... Hetero MSM photodiode 32... Hetero MESFET 33... Semi-insulating InP substrate 41 .41'...Undoped InAl2As buffer layer 34-n-type InGaAs light absorption layer 34'-
N-type I n Ga As active layer 35.35'-...
Undoped InAl2As cap 36... Schottky electrode 36'... Schottky gate electrode 37... (-
) side electrode 38... (+) side electrode 39... Source ohmic electrode 4o... Drain ohmic? [

Claims (1)

[Claims] 1. A hetero-Schottky photodiode as a light-receiving element and an active element are formed in a multilayer heteroepitaxial layer separated into island shapes formed by one-time crystal growth on a semi-insulating compound semiconductor substrate. A semiconductor device characterized in that a hetero-Schottky gate field effect transistor is formed, and these elements are monolithically integrated to constitute a light-receiving OEIC. 2. The semiconductor substrate is an InP substrate, the light absorption layer of the photodiode and the active layer of the field effect transistor are made of an InGaAs layer, and the heterocap layer of the photodiode is made of an InAlAs layer. The semiconductor device according to item 1. 3. The light absorption layer of the photodiode and the active layer of the field effect transistor are made of an n-type InGaAs layer,
The heterocap layer of the photodiode is (p^+/i
2. The semiconductor device according to claim 1, wherein the semiconductor device comprises an InAlGaAs layer of ) type or (i/p^+/i) type. 4. The negative side electrode of the photodiode is a Schottky electrode formed on a (p^+/i) type or (i/P^+/i) type InAlAs cap layer, and the positive side electrode is an n
2. The semiconductor device according to claim 1, comprising an ohmic electrode formed on a type InGaAs layer or a Schottky electrode formed on an i-type InAlAs layer.