JPH02278452A - Method for controlling buffer memory for transmission - Google Patents

Abstract

PURPOSE:To simplify the control of a buffer by providing plural buffer memories in a buffer memory for transmission, setting addresses which show the order of the transmission/reception of transmitting data, respectively to these buffer memories, storing the transmitting data to each buffer memory according to these addresses and processing the data. CONSTITUTION:Plural buffer memories 6-1 - 6-n are provided in a buffer memory 6 for transmission and the addresses to show the order for the transmission/ reception of the transmitting data are respectively set to these buffer memories 6-1 - 6-n. According to these addresses, the transmitting data are stored and processed. Accordingly, a CPU 1 can judge which buffer memory presently obtains a use right. Then, the use capacity of the buffer memory can be easily judged. Thus, the buffer memories 6-1 - 6-n can be easily controlled.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a method for managing a transmission buffer memory used during data transmission.

(Prior art) When performing data transmission, for example, when receiving transmission data, the received transmission data is temporarily stored in a buffer memory, and then predetermined processing is performed on the transmission data stored in this buffer memory. . By the way, the buffer memory is managed by a CPU (central processing unit), and the following two methods are used for this management.

In the first method, at the time of starting transmission and reception of transmission data, a memory area with the capacity necessary for this transmission and reception is secured as a buffer memory, and this secured buffer memory is used to transmit and receive transmission data.

Then, when the transmission and reception of the transmission data is completed, the buffer memory is released. In the second method, a buffer memory used for transmitting and receiving transmission data is secured in advance, and when transmission and reception of transmission data is started, the CPU notifies the transmission device of the address of the buffer memory and issues an operation start command. Thereby, the transmission device transmits and receives transmission data through the buffer memory. When the transmission and reception are completed, the transmission device sends an operation completion signal to the CPU,
Upon receiving this operation completion signal, the CPU reads the transmitted data from the buffer memory and processes it according to the address of the buffer memory.

However, the above management method has the following problems. In the first method, the buffer memory must be secured and released each time transmission/reception starts/ends, and it takes time to secure and release the buffer memory. Furthermore, since the capacity of the buffer memory differs depending on the content of transmission and reception, the process of securing buffer memory for each transmission and reception becomes extremely complicated. In addition, in the second method, each signal must be exchanged between the CPU and the transmission device, so the CPU performs processing according to the performance of the transmission device and its environment, so it is difficult to manage the buffer memory. becomes complicated.

(Problems to be Solved by the Invention) As described above, buffer memory management is complicated in any of the methods described above.

Therefore, the present invention makes it possible to easily manage buffer memory.
Furthermore, it is an object of the present invention to provide a method for managing a transmission buffer memory in which the usage status of the buffer memory can be determined.

[Structure of the Invention] (Means and Effects for Solving the Problems) By providing such a means, it is possible to provide a plurality of buffer memories of a desired capacity and to assign codes to each of these buffer memories to indicate the order of transmission and reception of transmission data. This is a transmission buffer memory management method for storing and processing transmission data in each buffer memory according to these codes.

(Example) Hereinafter, an example of the present invention will be described with reference to the drawings.

FIG. 1 is a partial configuration diagram of a transmission system to which the method of the present invention is applied. The CPU is connected to the RAM (
A random access memory) 3, a ROM (read only memory) 4, an input/output (input/output) port 5, and a transmission buffer memory 6 are connected. A transmission device 7 is connected to the I10 port 5, and this transmission device 7 is connected via a transmission line 9 to a transmission device 8 provided at another location. On the other hand, the transmission buffer memory 6 includes a plurality of buffer memories 6-1 to 6-n. These buffer memos J6-1 to J6-n each have a control area S as shown in FIG. 2, and this control area S contains an address 1 operation start request issuing signal indicating the next buffer memory, and an operation completion signal. Areas are formed in which signals and program numbers are set.

Here, the address indicating the next buffer memory is, for example, when transmission data is received, the received transmission data is first stored in the buffer memory 6-1, and then the buffer memory 6-1 is stored.
-2 and further stored in the buffer memory 6-31, the buffer memory 6-2 is stored in the buffer memory 6-1.
The address of buffer memory 6-3 is stored in buffer memory 6-2. However, each buffer memory 6-1 to 6-n is formed in a queue structure. Further, the ROM 4 stores application programs for executing transmission, programs for processing transmission data, and the like.

Next, we will discuss the operation of the system configured as described above in the third section.
The explanation will be given according to the flowchart of the application program shown in the figure. CPU at the time of starting transmission/reception of transmission data.
In step s1, I sets the program number (task number) of the application program in the program number area of the buffer memory 6-1. As a result, the CPUI acquires the right to use the buffer memory 6-1. Next, the CPUI issues an operation start command to the transmission device 7 in step s2, and then in step s3
In this step, the operation start request issuing signal area of the buffer 7 memory 6-1 is set. Data is thus transmitted between the transmission device 7 and the transmission device 8. Here, when the transmission device 7 receives the transmission data, the received transmission data is sequentially stored in the buffer memory 6-1 through the I10 port 5. Then, when the transmission data is stored in the buffer memory 6-1 and there is no remaining capacity, 1, the CPU
1 sets the operation completion signal area of the buffer memory 6-1 in step s6, and clears the operation start request issuing signal area and the operation completion signal area of the memory 6-1. As a result, the CPUI uses the buffer memory 6-1.
waive the right to use. Then the CPUI again steps sl
Returning to , the program number (task number) of the application program is set in the program number area of the buffer memory 6-2. As a result, the CPU acquires the right to use the buffer memory 6-1, then issues an operation start command to the transmission device 7, and further sets the operation start request issuing signal area of the buffer memory 6-2. Thereby, the received transmission data is sequentially stored in the buffer memory 6-2 through the I10 port 5. Below, similarly received transmission data is transmitted to the buffer memory 6-
3. Stored in 6-4... Then, when the data transmission is completed, the transmission device 7 sends out an operation end signal.

This operation end signal is read by the CPUI, and this
The PUI clears the operation start request issuing signal area and the operation completion signal area of the buffer memory 6-n which has acquired usage rights. Note that when relinquishing the right to use the buffer memory, the CPU does not clear the program number as a trace of the buffer memory usage. After that, the CPU 1 reads each transmission data stored in each buffer memory 6-1 to 6-n in the order of the addresses of each buffer memory 6-1 to 6-n, and executes a predetermined process on each transmission data. do.

In this way, in the above embodiment, a plurality of buffer memories 6-1 to 6-2 are provided, and these buffer memories 6-1 to 6-2 are provided.
Addresses indicating the transmission/reception order of transmission data are set in 1 to 6-n, and the transmission data is stored and processed according to these addresses.
The CPUI currently has the right to use the buffer memory 6.
-1 to 6-n can be determined, and the used capacity of the buffer memory can be easily determined. Therefore, the buffer memory can be easily managed. Furthermore, even when a large amount of transmission data is received, since a plurality of buffer memories 6-1 to 6-n are provided, each buffer memory 6-1 to 6-n is
After the transmission is completed, each transmission data can be processed by an appropriate program.

Note that the present invention is not limited to the above-mentioned embodiment, and may be modified without departing from the spirit thereof.

[Effects of the Invention] As described in detail above, according to the present invention, it is possible to provide a method for managing a transmission buffer memory that allows easy management of the buffer memory and also allows the use status of the buffer memory to be known.

[Brief explanation of drawings]

Figure 1 is a schematic diagram of a transmission system to which the transmission buffer memory management method according to the present invention is applied, Figure 2 is a schematic diagram of the buffer memory in the system, and Figure 3 is a flowchart of transmission in the system. 1...CPU, 2...Bus, 3...RAM, 4...
...ROM, 5...I10 port, 6...transmission buffer memory, 6-1 to 6-n...buffer memory,
7゜8...Transmission device, 9...Transmission line. Applicant's representative Patent attorney Takehiko Suzue Figure 3

Claims (1)

[Claims] A transmission characterized in that a plurality of buffer memories with a desired capacity are provided, codes indicating the order of transmission and reception of transmission data are set in each of these buffer memories, and the transmission data is stored and processed in each of the buffer memories according to these codes. How to manage buffer memory for