JPH02277681A - Printing apparatus - Google Patents

Abstract

PURPOSE:To increase a printing speed by removing the memory clearing operation of an unnecessary region by clearing an image memory only at the part pertinent to the effective block of the imaginary page corresponding to printing data. CONSTITUTION:A virtual page 61 is arranged at every page to be printed to be divided into a large number of blocks and a blank block is removed to write only effective blocks in a virtual memory 30. In a printing control part 40, a memory block allotting control part 42 discriminate between the effective blocks and blank block of each virtual page and stores data displaying which block address of the image memory the effective blocks of which virtual page are stored in and a mapping flag showing which virtual page effective blocks belong to in an address converting part 44. At the time of mapping, the block related to the image memory is cleared each time. At the time of the reading of data, the printing control part 40 forms blank data with respect to a blank block part and reads only effective blocks from the image memory 30 in predetermined timing.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a printing device that stores print data in an image memory and prints on paper while reading the data.

(Prior Art) Various devices are known for printing print data created by a host control device such as a computer or a word processor onto paper, such as electrophotographic printers, thermal printers, and wire dot printers. It is being

FIG. 2 shows a block diagram of a printing apparatus that employs a conventional electrophotographic method.

In this device, a processor 4, a program memory 5, a working memory 6, a font memory 7, an image memory 8, and a print engine interface 9 are connected to a system bus 3 connected to a host control device 1 via an interface 2. It is of composition. A print engine 10 is connected to the print engine interface 9.

The host device 1 is a device such as a computer, word processor, or image reading device that creates print data. The interface 2 is a known circuit composed of a so-called R3232C interface, a parallel interface, or the like. The processor 4 is a circuit that controls the entire printing apparatus, and its execution program is stored in the program memory 5. The working memory 6 is a memory for storing and managing data transmitted and received by the interface 2. The font memory 7 is connected to the upper control device 1.
This is a memory that converts characters and other codes sent from the computer into font data for printing.

The image memory 8 is composed of a random access memory that stores, for example, one page of print data that has been edited and turned into an image.

The print engine 10 is a device that prints on printing paper based on printing data stored in the image memory 8, and includes a paper transport system, an electrophotographic process, and the like. The print engine interface 9 reads print data 9a from the image memory 8 and transfers it to the print engine 10 according to instructions from the processor 4, or receives a print control signal 9b output from the print engine 10 and sends it to the processor 4. This is an interface circuit that sends data to other devices.

The printing device as described above temporarily stores control commands, text character codes, graphic commands, bit image data, etc. received from the host control device 1 via the interface 2 in the working memory 6 as necessary. Imaged print data is created on the image memory 8 under the control of the processor 4.

The print data in the image memory 8 created in this way is
It is processed as follows.

FIG. 3 is a conceptual diagram illustrating the operation of reading print output from a conventional image memory.

As shown in the figure, when the read address 8a is input to the image memory 8, each raster ■,
The data corresponding to ■, ■, ■... are read out in order,
This will be printed in that order (■, ■, ■, ■...)
A printout 20 is obtained. That is, the data read from the image memory 8 is converted into a pit stream for each raster and sent to the print engine 1o in FIG. is obtained. Note that data is normally read from the image memory 8 not in bits but in words.

FIG. 4 is an explanatory diagram showing more specifically a conventional method of reading print output from an image memory.

As shown in the figure, the image memory is for each rasku ■.

. . . are separated in units of one word (for example, 8 bits). The data is sequentially read out in word units as (1), (2), <3), etc., and a printout as shown on the right side is obtained.

As can be seen from this figure, there is a complete one-to-one correspondence between the data stored in the image memory 8 and its print output 20. Normally, the image memory 8 is set to a memory capacity that can print out about one page 20, and even if the amount of information being printed is very small, the image memory 8 is always set to have one page's worth of print data in the image. The process was to store the data in the memory 8 and then print it. Further, when writing new print data to the image memory, due to the algorithm, the image memory is first cleared before writing.

(Problem to be Solved by the Invention) Incidentally, in an electrophotographic printing apparatus, a photosensitive drum having a photoreceptor layer formed on its outer periphery is rotated at a constant speed, and a static image corresponding to printing data is placed on the photoreceptor. It forms an electric latent image. The electrostatic latent image is developed using toner, transferred and fixed onto the paper, and this printing process is performed in a continuous operation and cannot be interrupted. Therefore, normally, after the printing data has been completely edited in the image memory 8, the conveyance of the paper is started and the printing process is started.

FIG. 5 is an explanatory diagram of the operation of the print engine that executes such a printing process.

In the figure, paper 12 to be printed is stored in trays 11a and llb. This paper 12 is pulled out by a hopping roller 13a or 13b,
It is transported on the transport path 14.

In front of the conveyance path 14, a photosensitive drum 15 and a writing device 16 for writing an electrostatic latent image on the outer periphery of the photosensitive drum 15 are arranged. This writing device 16 is composed of, for example, a light emitting diode array or a laser head.

In this device, the paper 12 is transported through the transport path 14, and when it reaches the transfer position W0, the toner on the photosensitive drum 15 is transferred, fixed by a fixing device (not shown), and then discharged. At one point Wp on the road, the conveyance is temporarily stopped by a registration roller or the like (not shown), and the sheet waits, and the conveyance is resumed at the same time as the writing device 16 starts writing the electrostatic latent image. That is, while the photosensitive drum 15 rotates by 40 degrees (angle α), the paper 12
is β. ' and just reaches the transfer position Wo.

In order to control such timing, the timing at which printing data is transferred from the image memory 8 to the writing device 16 in FIG. This is after conveying β8+β2.

FIG. 6 is a time chart showing the timing of writing data to the image memory and the timing of reading data.

As shown in the figure, first, time t. The image memory for one screen is cleared between time t and time t. Subsequently, writing starts from time 1+, and when writing of the first page print data to the image memory ends at time t2, the hopping roller 13a or 13b shown in FIG. 5 starts conveying the paper 12 at time t3. . Thereafter, after waiting until time t4, reading of the print data for the first page from the image memory is started. Between times t3 and t4, the paper 12 pulled out from the trays 11a and llb shown in FIG. 5 is conveyed to one point WP on the conveyance path 14. Then, it is transported toward the transfer position w0 (FIG. 5) at the same timing by registration rollers or the like. In this way, the printing process for the first page is advanced. .

On the other hand, if printing data is written into and read out from the image memory alternately, the waiting time on the print engine side increases.

Therefore, in order to speed up processing, reading of the first page data is started, and before the reading is finished,
Time 0 t4 when writing of data for the second page starts
The time from t8 to time t8 is the time from which reading of the first page is started to securing a certain memory area for writing data of the second page. Also, time t
, to time t6 is the time for clearing the read memory area.

Therefore, the time 1 from the end of writing of the first page to the start of writing of the next second page is from t2 to t.
It will be between 6 and 6.

After time t@, the data of the second page is written while clearing the memory in order each time. Further, when the reading of the l-th page data from the image memory is completed at time t, the final memory clear is performed until time t8, and writing of the second page data continues from time t8 to time t. Printing of the first page is executed while writing of the second page is completed, and the paper is ejected at time too.

Here, the time for memory clearing performed when writing the second page is the time required to substantially clear the entire page, and the time required for clearing the memory performed between time t0 and time t is the time required to clear the entire page. It will be the same time. Since this memory clearing time is a relatively long time that cannot be ignored compared to the data writing time, some measure is required to shorten the data writing time.

Therefore, it has been proposed to use a method called a re-domodify write method to clear the memory at the same time as reading the image memory. However, the time required to access the image memory becomes longer due to the data write time required to clear the memory, which hinders high-speed reading. In particular, as the resolution of the printed image increases, a larger capacity image memory is required, which increases the memory clearing time and significantly reduces the printing speed.

The present invention has been made with attention to the above points, and aims to speed up printing by eliminating memory clearing operations for unnecessary areas.
Furthermore, it is an object of the present invention to provide a printing device that can also inspect image memory for defects.

(Means for Solving the Problems) A printing apparatus of the present invention includes an image memory that stores print data, a print control unit that writes the print data to the image memory, and a print control unit that reads the print data from the image memory. It has a printing unit that performs printing and a test flag register that displays a test mode for image memory inspection, and the print control unit prints an image for one page that is virtually set in correspondence with print output. a block determining unit that divides a virtual page consisting of a memory block allocation control unit that selects only the valid blocks and writes data to the image memory in block units based on the determination result; and a block address of the valid block in the virtual page. , storing a mapping flag that associates the valid block with a block address of the image memory into which it has been written and identifies whether each block in the virtual page is the valid block or the blank block, and
an address conversion unit storing a page identification flag for identifying a virtual page to which a valid block written in the image memory belongs; and the memory block allocation control unit, in a normal print operation mode, , sets a mapping flag indicating the valid block, clears the corresponding block in the image memory, writes the data of the valid block to the block, and writes the data of the valid block from the image memory. After reading the data, it operates to reset the mapping flag and page identification flag, and in the test mode, writes all valid blocks and blank blocks of the virtual page to the image memory, and calculates the relative position of the block on the image memory. A page identification flag and a mapping flag are set so that the relative positions of the blocks on the virtual page match, and after clearing the corresponding block of the image memory, the data of the valid block is written to the block, and , after reading data of the effective block from the image memory, the mapping flag and the page identification flag are reset.

(Function) Even if the device described above has an image memory with a capacity for one page, for example, it is possible to store data for several pages depending on the content of the print data.

In the normal printing operation mode, the test flag register is cleared in advance, and a virtual page is first set on the processor side for each page to be printed.

This virtual page is then divided into multiple blocks.

Among these blocks, blank blocks consisting only of blank data are excluded, and only valid blocks containing valid data are written into the image memory. For virtual pages with many blank spaces, this effective number of blocks will be very small.

Therefore, it is possible to store several virtual pages in one page of image memory.

In order to store valid data in a predetermined block of the image memory in this manner, or to read and print data stored in the image memory, an address conversion section is provided.

In the print control unit, the memory block allocation control unit identifies valid blocks and blank blocks of each virtual page, and sends information indicating which virtual page's valid block is stored at which block address in the image memory to an address. Store in the converter. The address conversion unit also stores a mapping flag indicating which virtual page block is a valid block.

During this mapping, the corresponding block in the image memory is cleared each time. Further, when reading data, the print control section generates blank data for blank block portions, and only valid data is read from the image memory at a predetermined timing. After this reading, the mapping flag etc. are reset.

Thereby, a printout corresponding to the virtual page is obtained. Furthermore, since there is no memory clearing operation for blank blocks, the clearing time is shortened.

On the other hand, since the device of the present invention stores several pages worth of virtual pages for one page worth of image memory, the relative positions of blocks on the image memory and the relative positions of blocks on the virtual page are different. do not necessarily match. Therefore, when a part of the image memory fails, it is difficult to determine which memory element is at fault even by looking at the printed image.

Therefore, the apparatus of the present invention provides a test mode for inspecting the image memory for defects, and in the test mode, the processor sets a test flag register to display the test mode.

Then, a virtual page is set up on the processor side for the page to be printed for testing. Then, the virtual page is divided into multiple blocks. In this test mode, all valid blocks and blank blocks are written into the image memory. In this way, when the relative positions of the blocks in the image memory and the blocks on the virtual page match, the printed image is , defective memory elements can be easily tested.

(Example) Hereinafter, the present invention will be specifically explained with reference to Examples.

<Configuration of Apparatus> FIG. 1 is a block diagram showing an embodiment of a printing apparatus of the present invention. The overall configuration of this device is similar to that shown in FIG. 2, but in this device, writing and reading of data in the image memory 30 is controlled by a print control section 4o as shown in the figure.

This device includes a block determination section 41 that receives print data 60, a memory block allocation control section 42 that assigns a write address for the data to the image memory 30, and an address generation section 4 that generates a block address.
3, and an address conversion unit 4 that performs predetermined address conversion, etc.
4, a connection switching circuit 45 for switching the input of write data to the image memory 30 or the output path of read data from this, and a printing section 50.

In addition, a test flag register 6 is provided which is set in a test mode for inspecting image memory defects and reset in a normal print operation mode.

Furthermore, a selector 71 is provided to switch the operation of the memory block allocation control section 42 during the test mode.

Principle of normal printing operation mode> Before explaining the detailed operation of the apparatus of the present invention, first, the seventh
The principle operation of the device of the present invention will be explained using the drawings.

In FIG. 7, this example shows a case in which printing of two virtual pages (■) is requested.

First, the virtual pages ■ and ■ are each divided into a plurality of blocks 62 and 62'. For example, each block has a 128×12B bit configuration. When a virtual page is divided into a plurality of blocks in this manner, each block is classified into a blank block 62' consisting only of blank data and a valid block 62 containing valid data. Then, the print control unit 40 shown in FIG.
Only the valid block 62 containing the valid data of (2) is written. In this way, each virtual page
, ■ are disassembled into pieces, but two pages worth of effective blocks 62 can be stored with sufficient margin in the image memory 3o, which has a capacity for one page.

After writing the print data to the image memory 30 in this way, print outputs as shown on the right side of FIG.
In order to obtain , the first block of the virtual page ■ (
It is determined whether the block at coordinates (x, y)/(0, 0)) is a blank block 62', and if it is a blank block, the memory block allocation control unit 42 of FIG. 1 generates blank data. If it is a valid block 62, data corresponding to the valid block is read from the image memory 30 and output to the printing unit 50.

This makes it possible to reproduce print outputs ■ and print outputs ■ corresponding to virtual pages ■ and ■.

Also, while printing the virtual page ■ print output ■,
It is possible to write the printing data of the virtual page (2) into the image memory 30 in parallel, and it is possible to speed up the processing.

Now, consider the image memory clearing operation.

In the conventional case, the virtual page {circle around (2)} and each block of the image memory 30 correspond to each other in an 1-to-1 relationship, and even for blank blocks, writing is performed after all memory has been cleared. However, in the present invention, since blank blocks are not written, the corresponding memory clear operation is omitted.

That is, the apparatus of the present invention clears the memory of a valid block immediately before writing the data of a valid block into the image memory, thereby achieving a reduction in the number of memory clear operations.

<Configuration of Each Block> Returning to FIG. 1 again, the specific configuration and operation of the apparatus of the present invention will be described.

In FIG. 1, printing data 60 is divided into a large number of blocks 62 when viewed from a virtual page 61. As shown in FIG.

When performing a write operation, the data is input to the block determining section 41 and the connection switching circuit 45 in units of one word (for example, 8 bits). The block determining unit 41 is a circuit that determines whether each block 62 constituting the virtual page 61 is a blank block or a valid block. That is, the write data and the reference value 41a (data set to the level of blank data) are input to the comparator 41b provided in the block determination section 41. After performing this comparison for l blocks of data, the determination result is output to the memory block allocation control section 42.

The memory block allocation control unit 42 controls the image memory 30
This is a circuit composed of a microprocessor, an LSI logic circuit, etc. that controls writing of data to the memory card.

The memory block allocation control unit 42 refers to the test flag register 70 immediately before starting operation. In normal print mode, the test flag register 70 is in a reset state. After this confirmation, based on the determination result output by the comparator 41b, if all the blocks of the virtual page 61 are blank blocks consisting of only blank data, writing of that data to the image memory 30 is prevented. Also, on the other hand,
In the case of a valid block containing valid data, the write data input to the image memory 30 is controlled to be written to a predetermined address via the connection switching circuit 45.

The address generation unit 43 is a circuit that generates an address and outputs it to the memory block allocation control unit 42 in order to read data of the virtual page 61 word by word.

The address conversion unit 44 associates a mapping flag T for identifying whether each block is a valid block or a blank block with respect to all block addresses of the virtual page 61,
In addition, in the case of a valid block, it has an address conversion memory 44a that is associated with a block address RM of the image memory 30 in which the block is written. This address translation memory 44a has a capacity capable of storing flags and the like for a plurality of virtual pages. In addition to this, for every block address of the image memory 30, a page identification flag P l"P is set which identifies which virtual page's effective block is written to that block address.
Equipped with a memory 44b for indicating an empty block in which x is stored.
ing.

The memory block allocation control unit 42 writes the data of each virtual page to the image memory 30 in the manner described in FIG. This is a device that reads out the data toward the printing section 50.

The test flag register 70 is a register that is set when the processor 4 shown in FIG. 2 instructs a test mode, and displays its state.

For example, in the normal printing operation mode, the flag is not set and the "O" state is stored, but in the test mode, the processor 4 sets the flag and stores the "1P state". Incidentally, this flag setting may be performed by the host control device 1 shown in FIG.

The selector 71 is a selection circuit that switches the image memory block address that the memory block allocation control unit 42 outputs to be stored in the address conversion memory 44a, depending on the contents of the test flag register 70. When the flag in the test flag register 71 is not set, that is, in the normal printing operation mode, the memory block allocation control unit 42 selects the free block address of the image memory 30 obtained by the free block instruction memory 44b. The address is output to the address conversion section 44.

On the other hand, when the flag is set, that is, in the test mode, the image memory 3 corresponds to the virtual page block address output from the memory block allocation control unit 42.
The block address of o is selected.

When the test flag register 70 is checked and the flag is set, that is, when the memory block allocation control unit 42 is in the test mode, the memory block allocation control unit 42 ignores the judgment result output from the comparator 41b and indicates that the block of the virtual page 61 contains only blank data. In this case, the data is also written.

The printing section 50 is. This is a print engine with a mechanism as explained in FIG.

Normal printing operation mode> The printing apparatus of the present invention having the above configuration operates as follows.

First, when the address generation unit 43 generates the address of the virtual page, the memory block allocation control unit 42 reads the data of the first block of the virtual page 61 in word units in the order of this address, and the block determination unit 41 reads out the data of the first block of the virtual page 61 in word units. Based on the determination result, if the data constitutes a blank block, it is not written to the image memory 3o, and if it constitutes a valid block, it is written to the image memory 30. When the determination result that the read data constitutes a valid block is input to the memory block allocation control section 42, the memory block allocation control section 42 refers to the address conversion memory 44a of the address conversion section 44.

FIG. 8 shows a detailed operational explanatory diagram of the address translation section.

In the figure, \ is now in the address conversion memory 44a.
The block containing the data read corresponding to the block address V of the virtual page stores a mapping flag T indicating whether a blank block is a valid block and a block address RM of the image memory 3 to which the block is written. ing. When storing the first data constituting a valid block in the image memory 30, the mapping flag has an initial value of zero, and the block address RM of the image memory 30 is also undetermined. Therefore, in this case, the mapping flag is set to 1, and the block address R of the image memory 30 is set to 1.
The first block address of the image memory 30 is written into M through the selector 71, and then the memory is cleared for the block of the image memory 30 at the block address RM. Thereafter, the data for one word is written to the block address of the image memory 30.

Following the one word of data, one block of data that is successively read from the virtual page 61 is all included in the same valid block.

Then, when the mapping flag ゛T is referred to each time it is read, it is 1, indicating that mapping has been completed, so the data is written to the block address RM that has already been written to the address conversion memory 44a. Note that the image memory 30 is provided with an address pointer (not shown), and when clearing the memory,
It is assumed that the write address is controlled by being incremented every time one word of data is written.

On the other hand, when a predetermined valid block of the virtual page 61 is written to a predetermined block address of the image memory 30, the free block instruction memory 44b of the address conversion unit 44 stores information about which block address for each block address of the image memory 30. A page identification flag is set to identify whether data for a virtual page has been stored. Similar to the mapping flag, this page identification flag is 1 if the page is mapped, and 0 if the page is not mapped. Therefore, for each block in the image memory 30, if all the page identification flags are zero, it is known that the block has not been mapped to anything, and if any page identification flag is 1, the block has already been mapped. It turns out to be a block. In order to write a new valid block, the empty block designation memory 44b is referred to when determining an empty block address in the image memory.

In this way, when the address generation unit 43 in FIG. 1 supplies the address for one page to the memory block allocation control unit 42, the image memory 30 of the virtual page for one page
Data writing to is completed. Then, data for the next virtual page is written.

In parallel with this, printing of already written pages can be carried out. In this case, first, the address generation unit 43 in FIG.
direction). The memory block allocation control unit 42 uses the address conversion unit 4 based on this address.
The address conversion memory 44a of No. 4 is referred to.

Here, if the mapping flag T corresponding to the block address is 1, the valid data is read out from the image memory 30 by referring to the corresponding block address RM of the image memory 30, and the valid data is read out from the image memory 30 via the connection switching circuit 45. Print data is output to the printing unit 50. Further, referring to the address conversion memory 44a, if the mapping flag T is zero, the memory block allocation control unit 42 generates blank data by itself, and transfers this to the printing unit 50 via the connection switching circuit 45. Output to.

If you perform this operation one block at a time,
As shown in FIG. 7, the image on the virtual page 61 can be reproduced as a printout. When the reading is completed, the mapping flag T and page identification flag of that virtual page are all reset (cleared to zero), making it possible to write the next virtual page.

<Normal Printing Operation Mode Flowchart> FIG. 9 is a flowchart showing the data writing operation in the normal printing operation mode of the apparatus of the present invention.

In the figure, when a write operation is started, the mapping flag T of the address conversion memory 44a and the page identification flags P1 to P8 of the empty block instruction memory 44b are cleared to "0" before printing the first page. (Step SL).

Next, the virtual page is read (step S
2) Here, it is determined whether the first block read out is a blank block (step S3).

On the other hand, if the read block is not a blank block, it is determined whether the T flag is "1" (step S4). At the stage when the first data of the corresponding block is written, this T flag is "O", so the T flag of the block of the corresponding virtual page of the address translation memory is set to "O".
1'' (step S5). Then, referring to the empty block designation memory, a block address to be written in the image memory is determined, and the P flag is set to 1 (step S6).

Next, the corresponding block address RM is written into the address conversion memory through the selector 71 (step S7
). Here, before writing data, one block of the corresponding block in the image memory is cleared (step S8).
. Then, the data of the virtual page is written into the corresponding block of the image memory (step S9). Thereafter, it is determined whether the write operation for one virtual page has been completed (step 5IO). If one page has not been completed, the process returns to step S1. Also, after the first data of the valid block is written, the T flag is 1°, so the process directly proceeds from step S4 to step S9.
The next data is overwritten in the corresponding block of the image memory. When writing the first data of a new effective block again, the process moves from step S4 to step S85.

The write operation is executed as described above.

FIG. 10 is a flowchart showing the data read operation.

When a read operation is started, the mapping flag T of the address conversion memory is first referenced (step SL).
). Here, it is determined whether the T flag is "o°" (
Step S2). If the T flag is "O", the block is a blank block, so blank data for one block is output (step S3). On the other hand, the T flag is “
If not, it is a valid block, so the corresponding block address RM is referred to (step S4), and the valid block at that address is stored as 1 from the image memory.
The blocks are read out (step S5). Thereafter, it is determined whether reading of one page has been completed (step s6), and if it has not been completed, the process returns to step S1, and if it has been completed, the process proceeds to step S7. When reading of one page is completed, all T flags of the address translation memory corresponding to the read virtual page are reset. Also, all T flags corresponding to the virtual page in the memory for indicating free blocks are reset (
Step S8).

In other words, the image memory is not cleared during the readout stage.

FIG. 11 shows two examples of actual virtual page configurations.

FIG. 2A shows a virtual page consisting of 80 blocks, of which 34 hatched blocks are valid blocks 62 and the other blocks are blank blocks 62'. On the other hand, the virtual page shown in FIG. 6B is composed of 80 blocks, of which 11 blocks are valid blocks 62 and the remaining blocks are blank blocks 62'.

When printing two types of virtual pages like this,
The memory clear time is as follows.

FIG. 12 is a graph comparing memory clear times.

In the figure, what is shown at the top of the graph is the total time for memory clearing using the conventional method, and that time is t3. However, when the present invention is implemented, the memory of the virtual page shown in FIG. 11(a) is cleared in a shorter time t2 as shown in FIG. 12. Further, the virtual page shown in FIG. 11(b) is cleared in memory in an even shorter time t1 as shown in FIG. 12.

In this manner, in the apparatus of the present invention, memory clearing of the image memory is performed only for the valid blocks when writing into the valid blocks, so that the memory clearing time decreases in accordance with the proportion occupied by the valid blocks.

Therefore, for virtual pages with few valid blocks,
Memory clearing time is significantly reduced.

<Data write operation in test mode> Next, in the test mode, the test flag register 70 is set to “
The state in which it is set to 1" will be explained.

In the test mode, unlike the case of normal printing, the page identification flag of the empty block instruction memory 44b is
The required capacity for one page of the image memory 30 is set in advance.

First, when the address generation unit 43 generates a virtual page address, the memory block allocation control unit 42
The data of the first block of the virtual page 61 is read in word units in this address order, and regardless of the judgment result obtained by the block judgment unit 41, all data is written to the image memory 30 even if the data constitutes a blank block. .

When the read data is input to the memory block allocation control unit 42, the memory block allocation control unit 4
2 is an address conversion memory 44 of the address conversion unit 44;
See a. However, when storing the first data constituting a block in the image memory 30, the mapping flag has an initial value of zero, and the block address RM of the image memory 30 is also undetermined. Therefore, in this case, the mapping flag is set to "1" and the virtual page block is set as the block address RM of the image memory 30 so that the virtual page block address and the image memory 30 have a one-to-one correspondence. An address obtained by adding a certain offset value to the address is written through the selector 71, and then the memory is cleared for the block at the block address RM in the image memory 30. Thereafter, the data for one word is written to the block address of the image memory 30.

When writing addresses included in the same block, if you refer to the mapping flag T, it will be "1", indicating that it has been mapped, so the block that has already been written in the address conversion memory 44a will be ignored. The data is written to address RM.

This operation can be expressed as a flowchart as follows.

FIG. 13 is a flowchart of data write operation in test mode.

In the figure, when a write operation is started, the mapping flag T of the address conversion memory 44a and the page identification flags P, ~P8 of the free block instruction memory 44b are cleared to "0" before printing the first page. (Step S1).

Next, the P flag of the free block designation memory corresponding to the capacity of the virtual page to be printed is set to 1 (step S2).

Thereafter, the virtual page is read (step S3).

Furthermore, it is determined whether the T flag is "1" (step S4). At the stage when the first data of the corresponding block is written, this T flag is "0", so the T flag of the block of the corresponding virtual page of the address translation memory is set to "0".
1" (step S5), and adds an offset such that the image memory corresponds one-to-one to the virtual block address to determine the write block (step S6).
).

Next, the corresponding block address RM is written into the address conversion memory through the selector 71 (step S7
). Here, before writing data, one block of the corresponding block in the image memory is cleared (step S8).
. Then, the data of the virtual page is written into the corresponding block of the image memory (step S9). Thereafter, it is determined whether the write operation for one virtual page has been completed (step 5IO). If one page has not been completed, the process returns to step S1.

Regarding the data read operation, when the test flag register is "L", the operation is the same as when it is "0". However, in step S2 shown in FIG.
Since T=1 in all cases, there is no need to perform the process in step S3.

As described above, in the apparatus of the present invention, in the test mode, it is possible to print virtual pages and image memory in one-to-one correspondence, so it is possible to easily test the image memory. .

The present invention is not limited to the above embodiments.

The configuration of the printing section is not limited to electrophotography, but may be of any type such as a thermal printer type or a wire dot type. Further, the printing control section may be replaced with various circuits having similar performance.

(Effects of the Invention) According to the printing apparatus of the present invention described above, the image memory is cleared only for the portion corresponding to the valid block of the virtual page corresponding to the print data, so it is more unnecessary than before. The rear operation can be largely omitted and the printing speed can be increased.

Furthermore, in the test mode, the relative positions of blocks on the virtual page and the blocks on the image memory are matched, so that the image memory can be easily tested.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the printing apparatus of the present invention;
FIG. 2 is a block diagram of a conventional printing device, FIG. 3 is a conceptual diagram illustrating control of reading print output from a conventional image memory, and FIG. 4 is a specific example of the operation of reading print output from a conventional image memory. An explanatory diagram explaining an example, FIG. 5 is an explanatory diagram of the operation of the print engine, FIG. 6 is a time chart explaining the writing/reading timing of a conventional image memory, and FIG. 7 is an explanation diagram of the operating principle of the printing apparatus of the present invention. 8 is a detailed operational explanatory diagram of the address conversion section of the apparatus of the present invention; FIG. 9 is a flowchart illustrating the writing operation in the normal print operation mode of the apparatus of the present invention;
FIG. 10 is a flowchart explaining the data read operation of the apparatus of the present invention, FIG. 11 is an explanatory diagram showing an example of the configuration of a virtual page, and FIG. 12 is a graph comparing the memory clearing time when printing the virtual page. , FIG. 13 is a flowchart illustrating the write operation in the test mode. 30... Image memory, 40... Print control unit, 41.
...Block determination unit, 42...Memory block allocation control unit, 43...
Address generation section, 44... Address conversion section, 44a... Memory for address conversion, 44b... Memory for empty block instruction, 45... Connection switching circuit, 50... Printing section, 60... Print data, 61...virtual page, 62...block, 70
...Test flag register, 71...Selector, T
...Mapping flag, RM...Image memory block address, Pl, P2...Px...Page identification flag. Mouth 18 Memory print M output Normal printing, non-printing motor data writing operation Fig. 9 Data a ÷ output operation flow chart Fig. 10 Procedure correction writing type)

Claims (1)

[Scope of Claims] An image memory that stores print data; a print control section that writes print data into the image memory; a print section that performs printing while reading print data from the image memory; and an image memory inspection. and a test flag register for displaying a test mode for printing, and the print control unit divides a virtual page consisting of one page of images virtually set in correspondence with print output into a plurality of blocks. a block determining unit that divides each block and determines whether it is a blank block consisting only of blank data or a valid block containing valid data; a memory block allocation control unit that selects only the valid block and writes data to the image memory in block units; a block address of the valid block in the virtual page; a mapping flag that identifies whether each block in the virtual page is the valid block or the blank block, and identifies the virtual page to which the valid block written in the image memory belongs. and an address conversion unit storing a page identification flag for the image, and the memory block allocation control unit, in a normal printing operation mode, sets the mapping flag indicating the valid block when writing data for printing, and sets the mapping flag indicating the valid block, and After clearing the corresponding block in the memory, the data of the valid block is written to the block, and after reading the data of the valid block from the image memory, the mapping flag and the page identification flag are reset. In the test mode, all valid blocks and blank blocks of the virtual page are written to the image memory, and page identification flags and mapping are performed to match the relative positions of the blocks on the image memory and the blocks on the virtual page. After setting the flag and clearing the corresponding block of the image memory,
Printing characterized in that it operates to write the data of the valid block to the block, and reset the mapping flag and page identification flag after reading the data of the valid block from the image memory. Device.