JP2575208B2 - Printing equipment - Google Patents

Description

Description: BACKGROUND OF THE INVENTION The present invention relates to a printing apparatus that stores printing data in an image memory and prints the data while reading the data.

(Prior Art) Various devices such as an electrophotographic printer, a thermal printer, a wire dot printer, and the like are used as devices for printing print data created by a host controller such as a computer or a word processor on paper. Are known.

FIG. 2 shows a block diagram of a printing apparatus employing a conventional electrophotographic system.

This device is provided with a processor 4 and a system bus 3 connected to the host controller 1 via an interface 2.
In this configuration, a program memory 5, a working memory 6, a font memory 7, an image memory 8, and a print engine interface 9 are connected. The print engine 10 is connected to the print engine interface 9.

The host device 1 is a device that creates print data, such as a computer, a word processor, and an image reading device. The interface 2 is a known circuit including a so-called RS232C interface, a parallel interface, and the like. The processor 4 is a circuit for controlling the entire printing apparatus, and its execution program is stored in the program memory 5. The working memory 6 is a memory for storing and managing data transmitted and received by the interface 2. The font memory 7 is a memory that converts character character codes and other codes sent from the host control device 1 into font data for printing.

The image memory 8 stores, for example, one page of print data that has been edited and converted into an image.
It consists of an access memory. Print engine 10
Is a device for printing on printing paper based on the printing data stored in the image memory 8, and includes a paper transport system, an electrophotographic process, and the like. The print engine interface 9 reads the print data 9a from the image memory 8 and transfers it to the print engine 10 according to the instruction of the processor 4, or receives the print control signal 9b output from the print engine 10, and sends it to the processor 4 or the like. An interface circuit for transmitting.

The printing apparatus as described above temporarily stores the control commands, character character codes, graphic commands, bit image data, and the like received from the host controller 1 via the interface 2 in the working memory 6 as necessary. According to the control of the step 4, the image-forming print data is created in the image memory 8.

The print data in the image memory 8 thus created is processed as follows.

FIG. 3 is a conceptual diagram illustrating a conventional read operation of a print output from an image memory.

As shown in the figure, when a read address 8a is input to the image memory 8, each raster in the image memory 8 is read.
,, ... are read out in order and printed in that order (,, ...) and printed out
Get 20. That is, the data read from the image memory 8 is converted into a bit stream for each raster and sent to the print engine 10 shown in FIG.
Is performed, and a print output 20 is obtained. Normally, data is read from the image memory 8 in word units, not in bit units.

FIG. 4 is an explanatory diagram more specifically showing a conventional method of reading a print output from an image memory.

As shown in the figure, the image memory is divided in units of one word (for example, 8 bits) for each raster. The data is (1),
Are read out as (2), (3)..., And a print output as shown on the right side is obtained.

As can be seen from this figure, the data stored in the image memory 8 and its print output 20 completely correspond one-to-one. Normally, the image memory 8 is set to a memory capacity capable of printing output 20 of about one page, and even if the amount of information during print output is very small, the print data for one page is always stored in the image memory. A process of storing the data in the memory 8 and then performing printing is performed. Further, when writing new print data to the image memory, the image memory is once cleared and then written due to the algorithm.

(Problems to be Solved by the Invention) In an electrophotographic printing apparatus, while rotating a photosensitive drum having a photosensitive layer formed on its outer periphery at a constant speed, a static image corresponding to printing data is formed on the photosensitive body. An electrostatic latent image is formed. The electrostatic latent image is developed using toner, transferred onto a sheet and fixed, but such a printing process is performed in a continuous operation and cannot be interrupted. Therefore, normally, after the print data has been safely edited in the image memory 8, the conveyance of the sheet is started and the printing process is started.

FIG. 5 is an explanatory diagram of the operation of the print engine that executes such a printing process.

In the figure, papers 12 to be printed are stored in trays 11a and 11b. The sheet 12 is pulled out by the hopping roller 13a or 13b, and is conveyed on the conveyance path 14.

A photosensitive drum 15 and a writing device 16 for writing an electrostatic latent image around the photosensitive drum 15 are arranged in front of the transport path 14. The writing device 16 includes, for example, a light emitting diode array or a laser head.

In this apparatus, the sheet 12 is conveyed on the conveying path 14, and reaches the transfer position W _0, the toner on the photosensitive drum 15 is transferred,
The sheet is fixed by a fixing device (not shown) and discharged. Usually, the paper 12, in a point W _P on the conveying path, waiting is stopped once conveyed by a registration roller (not shown) or the like, at the same time conveying the start of writing an electrostatic latent image by the writing device 16 is resumed. That is, the photosensitive drum 15 by l ₀ (angle α only) during the rotation, the sheet 12 reaches just transfer position W ₀ is conveyed by l ₀ '.

In order to control such timing, timing of transfer of print data from the image memory 8 of FIG. 2 to the write device 16, the hopping roller 13a conveys the sheet 12 by l _1, or hopping roller 13b is paper 12 to l ₁
After + l _{2 has been} conveyed.

FIG. 6 is a time chart showing the timing of writing data to the image memory and reading the data.

As shown, first, during the period from the time t ₀ to time t _1, to clear the image memory for one screen. Then start writing from time t _1, the conveying writing to the first page of the image memory for printing data when ending time t _2, the hopping roller 13a or 13b of FIG. 5 at time t ₃ is the sheet 12 To start. Then, after waiting until the time t _4, read from the image memory for printing data of the first page is started. Until time t ₃ ~t _4, tray 11a shown in FIG. 5,
Paper 12 drawn from 11b is conveyed to a point W _P on the transport path 14. Then, the sheet is conveyed toward a transfer position W ₀ (FIG. 5) by a registration roller or the like at a suitable timing. Thus, the printing process of the first page proceeds.

On the other hand, if writing and reading of print data to and from the image memory are alternately performed, the waiting time on the print engine side increases.

Therefore, to speed up the processing, the reading of the data of the first page is started, and before the reading is completed, the writing of the data of the second page is started. Times of Day
time from t ₄ to time t _5, the 1 page of reading is started, a time to ensure a constant memory area for writing the second page of data. At time t ₅
Between until time t ₆ is the time to clear the memory area read.

Therefore, the time t _X until finished writing the first page write the next second page is started, is between t ₂ ~t _6.

Time t ₆ or later, each time while performing a memory clear second page of data is going to be written in order. Also, time
When reading from the first page of the image memory of the data ends at t _7, the last of the memory clear it is performed until the time t _8, from time t ₈ to time t ₉ the writing of the data of the second page is continued. The first page of printed during the writing of the second page is executed, this paper is discharged to the time t ₁₀ to the end.

Here, the second page time for memory clear performed when writing, the time required for substantially entire page clearing, memory clear was conducted during the period from the time t ₀ to t ₁ And the same time. Since the memory clear time is a relatively long time that cannot be ignored compared to the data write time, some measure is required to reduce the data write time.

Therefore, it has been proposed to adopt a method called, for example, a read-modify-write method, and to clear the memory simultaneously with reading of the image memory. However, the access time to the image memory is increased by the data write time for clearing the memory, which hinders high-speed reading. In particular, as the resolution of the print image increases, a larger capacity of the image memory is required, and the memory clearing time is increased, resulting in a problem that the printing speed is significantly reduced.

SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and provides a printing apparatus capable of eliminating a memory clear operation of an unnecessary area, speeding up printing, and further inspecting a defect of an image memory. It is intended to do so.

(Means for Solving the Problems) A printing apparatus according to the present invention includes an image memory for storing print data, a print control unit for writing print data in the image memory, and print data stored in the image memory. And a print unit that prints a virtual page composed of an image of one page virtually set in correspondence with print output into a plurality of blocks. For each, it is a blank block consisting only of blank data, or a block determination unit that determines whether it is a valid block containing valid data, and based on the determination result of the block determination unit, only the valid block is selected. A memory block allocation control unit that writes data to the image memory in block units, a block address of the valid block in the virtual page, When the effective block and the block address of the image memory in which the effective block is written are associated, and a mapping flag for identifying an effective block and a blank block is stored in the virtual page, and the block is an effective block, An address conversion unit that stores a block address of the image memory in which the effective block is written in association with the mapping flag; and, when printing, sequentially refers to the mapping flag of the address conversion unit. In the memory, the image data is read from the address stored in the address conversion unit corresponding to the mapping flag and output to the printing unit. If the image data is a blank block, the blank data for the block is sent to the printing unit. A data reading control unit for outputting data; .

(Operation) The above apparatus can store several pages of data depending on the contents of the print data, for example, even if the apparatus has an image memory of one page capacity.

In the normal printing operation mode, the test flag register is cleared in advance, and first, a virtual page is set on the processor side for each page to be printed.

Then, the virtual page is divided into a plurality of blocks. Of these blocks, blank blocks consisting only of blank data are excluded, and only valid blocks containing valid data are written to the image memory. For a virtual page with many blank portions, the number of effective blocks is very small. Therefore, several pages of virtual pages can be stored in one page of image memory.

In order to store the valid data in a predetermined block of the image memory in this way, or to read out the data stored in the image memory and perform printing, an address conversion unit is prepared.

In the printing control unit, the memory block allocation control unit identifies an effective block and a blank block of each virtual page, and sends information indicating which effective block of the virtual page is stored at which block address of the image memory. Store in the conversion unit. The address conversion unit also stores a mapping flag indicating which virtual page block is a valid block.

Then, at the time of this mapping, the corresponding block in the image memory is cleared each time. When reading data, the print control unit generates blank data for a blank block portion, and reads only valid data from the image memory at a predetermined timing. After this read,
Reset the mapping flag etc.

As a result, a print output corresponding to the virtual page is obtained. Further, since the memory clear operation of the blank block is eliminated, the clear time is shortened.

On the other hand, since the apparatus of the present invention stores several pages of virtual pages in one page of image memory, the relative positions of the blocks on the image memory and the relative positions of the blocks on the virtual pages are different. Do not always match. Therefore, when a part of the image memory is out of order, it is difficult to determine which memory element is out of order by looking at the printed image.

Therefore, the apparatus of the present invention provides a test mode for inspecting a defect in the image memory. In the test mode, the processor sets a test flag register to display the test mode.

Thereafter, a virtual page is set on the processor side for the page to be printed for the test. Then, the virtual page is divided into a plurality of blocks. In this test mode, both the effective block and the blank block are written in the image memory. When the relative positions of the blocks on the image memory and the relative positions of the blocks on the virtual page are matched in this way, it is possible to easily inspect the defective memory element by looking at the printed image.

(Examples) Hereinafter, the present invention will be described specifically with reference to examples.

<Configuration of Apparatus> FIG. 1 is a block diagram showing an embodiment of a printing apparatus according to the present invention. The overall configuration of this apparatus is the same as that of FIG. 2, but in this apparatus, writing and reading of data in the image memory 30 are controlled by the print control unit 40 as shown in the figure.

The apparatus includes a block determination unit 41 that receives print data 60, and a memory block allocation control unit 42 that allocates a write address of the data to the image memory 30.
An address generator 43 for generating a block address;
An address conversion unit 44 for performing predetermined address conversion and the like, and a connection switching circuit for switching the input path of write data to the image memory 30 or the output path of read data from the image memory 30
45 and a printing unit 50 are provided.

In addition, there is provided a test flag register 70 which is set in a test mode for inspecting a defect in the image memory and reset in a normal print operation mode.

Further, a selector 71 for switching the operation of the memory block allocation control unit 42 in the test mode is provided.

<Principle of Normal Printing Operation Mode> Before describing the detailed operation of the apparatus of the present invention, first, the principle of the operation of the apparatus of the present invention will be described with reference to FIG.

In FIG. 7, this example shows two virtual pages,
This shows a case where printing of a print request is requested.

First, the virtual page is divided into a plurality of blocks 62, 62 '. This block is, for example, 1
One is a block of 128 × 128 bit configuration. When the virtual page is divided into a plurality of blocks in this way, each block is classified into a blank block 62 'consisting of blank data only and a valid block 62 containing valid data. Then, the print control unit 40 shown in FIG. 1 writes only the effective block 62 including the effective data of each virtual page into the image memory 30. In this case, the image of each virtual page is decomposed separately, but the effective block 62 for two pages is stored with a sufficient margin in the image memory 30 of one page capacity. .

After the print data is written in the image memory 30 in this manner, the print output as shown on the right side of FIG.
In order to obtain the blank block 6, the first block of the virtual page (the block of coordinates (x, y) = (0, 0))
It is determined whether it is 2 'or not.
The memory block allocation control unit 42 shown in the figure generates blank data and outputs it to the printing unit 50. If the data is an effective block 62, the data corresponding to the effective block is read from the image memory 30 and output to the printing unit 50. To do.

Thereby, a print output corresponding to the virtual page and the print output can be reproduced. Further, this allows the printing data of the virtual page to be written to the image memory 30 in parallel while the print output of the virtual page is being printed, so that the processing can be sped up.

 Here, the clear operation of the image memory will be considered.

In the conventional case, the virtual page and each block of the image memory 30 have a one-to-one correspondence, and writing has been executed for all blank blocks after the memory has been cleared. However, in the present invention, since a blank block is not written, the memory clear operation for that is omitted.

That is, the apparatus of the present invention performs the memory clear of the corresponding block immediately before writing the data of the valid block to the image memory, thereby achieving a reduction in the memory clear operation.

<Structure of Each Block> Returning to FIG. 1 again, a specific structure and operation of such an apparatus of the present invention will be described.

In FIG. 1, the print data 60 is the virtual page
In the case of looking at 61, it is configured by being divided into a number of blocks 62.

When performing a write operation, the data is input to the block determination unit 41 and the connection switching circuit 45 in units of one word (for example, 8 bits). The block determination unit 41 is a circuit that determines whether each block 62 forming the virtual page 61 is a blank block or a valid block. That is, the block determination unit 41
The comparator 41b provided with the write data and the reference value 4
1a (data set to the level of blank data) is input. After this comparison is performed for one block of data, the determination result is output to the memory block allocation control unit 42.

The memory block allocation control unit 42 is a microprocessor that controls writing of data to the image memory 30 and the like,
Alternatively, it is a circuit configured from an LSI logic circuit or the like. The memory block allocation control unit 42 refers to the test flag register 70 immediately before the operation starts. In the normal print mode, the test flag register 70 is in a reset state. After the confirmation, based on the determination result output from the comparator 41b, if the blocks of the virtual page 61 are all blank blocks consisting of only blank data, the writing of the data to the image memory 30 is prevented. On the other hand, in the case of a valid block including valid data, control is performed via the connection switching circuit 45 so that write data input to the image memory 30 is written to a predetermined address.

The address generator 43 is a circuit that generates the address and outputs it to the memory block allocation controller 42 in order to read out the data of the virtual page 61 word by word.

The address conversion unit 44 associates a mapping flag T for identifying whether each block is a valid block or a blank block with all block addresses of the virtual page 61, and writes the mapping flag T if the block is a valid block. It has an address conversion memory 44a associated with the block address RM of the image memory 30. This address conversion memory 4
4a has a capacity capable of storing flags and the like for a plurality of virtual pages. Also, In addition to all of the block address of the image memory 30, and stores the page identification flag P ₁ to P _X identifies a valid block of any virtual page in the block address is written, the empty A block instruction memory 44b is provided.

The memory block allocation control unit 42 writes the data of each virtual page to the image memory 30 in the manner described with reference to FIG. 7 while referring to the address conversion unit 44, and transfers the data via the connection switching circuit 45. Printing section 50
It is a device that reads out to.

The test flag register 70 is a register which is set when the processor 4 shown in FIG. 2 indicates a test mode and indicates the state. For example, in the normal printing operation mode, the flag is not set and the state “0” is stored, but in the test mode, the processor 4 sets the flag and stores the state “1”. The setting of this flag may be performed by the host controller 1 shown in FIG.

The selector 71 stores the image memory block address output by the memory block allocation control unit 42 for storage in the address translation memory 44a in the test flag register 70.
Is a selection circuit that switches in accordance with the contents of. When the flag of the test flag register 70 is not set, that is, in the normal printing operation mode, the memory block allocation control unit 42 selects the free block address of the image memory 30 obtained by the free block instruction memory 44b. Output to the address conversion unit 44.

On the other hand, when the flag is set, that is, in the test mode, the image memory 30 corresponding to the virtual page block address output from the memory block
Is selected.

The memory block allocation control unit 42 checks the test flag register 70, and when the flag is set, that is, in the test mode, ignores the determination result output from the comparator 41b, and the block of the virtual page 61 includes only blank data. In such a case, the data is written.

The printing unit 50 is a print engine having a mechanism as described with reference to FIG.

<Normal Printing Operation Mode> The printing apparatus of the present invention having the above configuration operates as follows.

First, when the address of the virtual page is generated from the address generation unit 43, the memory block allocation control unit 42 reads out the data of the first block of the virtual page 61 in word order in this address order, and the data is obtained in the block determination unit 41. Based on the determination result, writing to the image memory 30 is not performed for data constituting a blank block, and writing to the image memory 30 is performed for forming a valid block. The determination result that the read data forms an effective block is transmitted to the memory block allocation control unit 42.
, The memory block allocation control unit 42 refers to the address conversion memory 44a of the address conversion unit 44.

FIG. 8 shows a detailed operation explanatory diagram of the address conversion unit.

In the figure, a mapping flag T indicating whether a block including data read corresponding to the block address V of the virtual page is a blank block or a valid block, and the block are written in the address conversion memory 44a. The block address RM of the image memory 30 is stored. The first data that constitutes an effective block is stored in the image memory.
In the case of storing in the mapping memory 30, the initial value of the mapping flag is zero, and the block address RM of the image memory 30 is not yet determined.
Therefore, in this case, the mapping flag is set to 1 and the block address RM of the image memory 30 is set to the selector 71.
Then, the first block address of the image memory 30 is written, and then the memory of the block having the block address RM of the image memory 30 is cleared. Then, the above 1
Word data is written to the block address of the image memory 30.

Subsequent to the data for one word, the data for one block continuously read from the virtual page 61 are all included in the same effective block. When the mapping flag T is referred to each time the data is read, it is 1 and indicates that the mapping has been completed. Therefore, the block address R already written in the address conversion memory 44a is read.
Write the data to M. The image memory 30 is provided with an address pointer (not shown). When clearing the memory, the address is incremented each time data of one word is written, and the write address is controlled.

On the other hand, when the predetermined valid block of the virtual page 61 is written to the predetermined block address of the image memory 30, the empty block instruction memory 44b of the address conversion unit 44 stores, for each block address of the image memory 30, A page identification flag is set to identify whether the data of the virtual page has been stored. This page identification flag is
As in the case of the mapping flag, the content is 1 if mapped, and 0 if not mapped. Therefore, if the page identification flags are all zero for each block in the image memory 30, it is known that the block is not mapped, and if any of the page identification flags is 1, the block is already mapped. It turns out that it is a block. In order to write a new effective block, when determining an empty block address in the image memory, the memory 44b for instructing an empty block is referred to.

In this way, when the address generation unit 43 of FIG. 1 supplies the address of one page to the memory block allocation control unit 42, the data writing of the virtual page of one page to the image memory 30 is completed. Then, the data of the next virtual page is written.

In parallel with this, printing of the already written page can be executed. In this case, first, the address generation unit 43 in FIG. 1 generates an address in the raster direction (X direction) of the virtual page 61. The memory block allocation control unit 42 refers to the address conversion memory 44a of the address conversion unit 44 based on the address.

Here, if the mapping flag T corresponding to the block address is 1, the valid data is read from the image memory 30 by referring to the corresponding block address RM of the image memory 30, and is read via the connection switching circuit 45. The print data is output to the print unit 50. Also, referring to the address translation memory 44a, if the mapping flag T is zero, the memory block allocation control unit 42 generates blank data by itself and sends it to the printing unit 50 via the connection switching circuit 45. Output.

If such operations are sequentially performed in units of one block, the image on the virtual page 61 can be reproduced as a print output, as shown in FIG. When the reading is completed, the mapping flag T and the page identification flag of the virtual page are all reset (cleared to zero), and the writing of the next virtual page is enabled.

<Normal Printing Operation Mode Flowchart> FIG. 9 is a flowchart showing a data writing operation in the normal printing operation mode of the apparatus of the present invention.

In the figure, when the write operation is started, before printing the first page, the page identification flag P ₁ a to P _X "0" of the mapping flag T, and an empty block indication memory 44b of address translation memory 44a Clear (Step S
1).

Next, a virtual page is read (step
S2). Here, it is determined whether the block read first is a blank block (step S3).

On the other hand, if the read block is not a blank block, it is determined whether or not the T flag is "1" (step S1).
S4). At the stage where the first data of the corresponding block is written, since the T flag is "0", the T flag of the block of the corresponding virtual page in the address translation memory is set to "1" (step S5). Then, referring to the empty block instruction memory, the block address to be written in the image memory is determined, and the P flag is set to 1 (step S6).

Next, the corresponding block address RM is written into the address conversion memory through the selector 71 (step S7).
Here, before writing data, the corresponding block of the image memory is cleared by one block (step S8). Then, the virtual page data is written to the corresponding block of the image memory (step S9). Thereafter, it is determined whether the write operation for one virtual page has been completed (step S10). Step S if one page is not completed
Return to 1. After the first data of the valid block has been written, the T flag is "1". Therefore, in step S4, the process directly proceeds to step S9, and the next data is overwritten on the corresponding block of the image memory. . Again, when writing the first data of a new valid block,
The process moves from step S4 to S5.

 The write operation is performed as described above.

FIG. 10 is a flowchart showing a data read operation.

When the read operation is started, the mapping flag T of the address translation memory is first referenced (step S).
1). Here, it is determined whether the T flag is “0” (step S2). If the T flag is "0", the block is a blank block, so that one block of blank data is output (step S3). On the other hand, if the T flag is not "0", the block is a valid block, and the corresponding block address RM is referred to (step S4). Then, one valid block at that address is read from the image memory (step S5). Thereafter, it is determined whether reading of one page has been completed (step S6). If not completed, the process returns to step S1, and if completed, the process proceeds to step S7. When reading of one page is completed,
All the T flags of the address translation memory corresponding to the read virtual page are reset. Also, in the empty block instruction memory, the T
All flags are reset (step S8).

That is, in the reading stage, the image memory is not cleared.

FIG. 11 shows two types of configuration examples of actual virtual pages.

FIG. 7A shows a virtual page composed of 80 blocks, of which 34 hatched blocks are valid blocks 62, and other blocks are blank blocks 62 '. On the other hand, the virtual page shown in FIG. 7B is composed of 80 blocks, of which 11 blocks are valid blocks 62 and the remaining blocks are blank blocks 62 '.

When such two types of virtual pages are printed, the memory clear time is as follows.

FIG. 12 is a graph comparing memory clear times.

In the figure, that shown in the top graph is the total time of the memory clearing by conventional methods, the time is in the t _3. However, when the present invention is implemented, the virtual page in FIG. 11 (a) has a shorter time t ₂ as shown in FIG.
To clear the memory. Moreover, the virtual page shown in FIG. 11 (b) is a memory cleared further a short time t ₁ as shown in FIG. 12.

As described above, in the apparatus of the present invention, the memory clear of the image memory is performed only for the effective blocks when writing the effective blocks, so that the memory clear time is reduced according to the ratio of the effective blocks. Therefore, for a virtual page having a small number of effective blocks, the memory clear time is significantly reduced.

<Data Write Operation in Test Mode> Next, a state in which the test flag register 70 is set to “1” in the test mode will be described.

In the test mode, unlike normal printing,
The page identification flag of the empty block indication memory 44b is
The capacity required for one page of the image memory 30 is set in advance.

First, when the address of the virtual page is generated from the address generation unit 43, the memory block allocation control unit 42 reads the data of the first block of the virtual page 61 in word order in this address order, and the data is obtained by the block determination unit 41. Irrespective of the determination result, even in the case of data constituting a blank block, all data is written to the image memory 30.

The read data is stored in the memory block allocation control unit.
When input to 42, the memory block allocation control unit 42
Refer to the address translation memory 44a of the address translation unit 44. However, when the first data constituting the block is stored in the image memory 30, the mapping flag has an initial value of zero, and the block address RM of the image memory 30 is undecided. Therefore, in this case, the mapping flag is set to “1”, and the virtual page block address is set as the block address RM of the image memory 30 so that the virtual page block address and the image memory 30 have a one-to-one correspondence. The address obtained by adding the offset value
Then, the memory is cleared for the block of the block address RM in the image memory 30. Thereafter, the data for one word is written to the block address of the image memory 30.

When the address contained in the same block is written, when the mapping flag T is referred to, it is “1”, indicating that the mapping has been performed. Therefore, the block address already written in the address conversion memory 44a is written. RM
The data is written to.

 The flowchart of this operation is as follows.

FIG. 13 is a flowchart of a data write operation in the test mode.

In the figure, when the write operation is started, before printing the first page, the page identification flag P ₁ a to P _X "0" of the mapping flag T, and an empty block indication memory 44b of address translation memory 44a Clear (Step S
1).

Next, the P flag of the free block instruction memory for the virtual page capacity to be printed is set to 1 (step S2).
Thereafter, a virtual page is read (step
S3).

It is further determined whether the T flag is "1" (step
S4). At the stage where the first data of the corresponding block is written, since the T flag is "0", the T flag of the block of the corresponding virtual page in the address translation memory is set to "1" (step S5). Then, an offset is added to the virtual block address so as to correspond to the image memory on a one-to-one basis, and a write block is determined (step S6).

Next, the corresponding block address RM is written into the address conversion memory through the selector 71 (step S7).
Here, before writing data, the corresponding block of the image memory is cleared by one block (step S8). Then, the virtual page data is written to the corresponding block of the image memory (step S9). Thereafter, it is determined whether the write operation for one virtual page has been completed (step S10). Step S if one page is not completed
Return to 3.

Regarding the data read operation, when the test flag register is “1”, the operation is the same as when it is “0”. However, in step S2 shown in FIG. 10, all the T flags are set to T = 1, so that the processing in step S3 is not performed.

As described above, in the apparatus of the present invention, in the test mode, it is possible to print the virtual pages and the image memories in a one-to-one correspondence, so that the test of the image memories can be easily performed. .

 The present invention is not limited to the above embodiments.

The configuration of the printing unit is not limited to electrophotography, but may be any type such as a thermal printer type or a wire dot type. Further, the print control unit may be replaced with various circuits having the same performance.

(Effects of the Invention) According to the printing apparatus of the present invention described above, the image memory is cleared only in the portion corresponding to the effective block of the virtual page corresponding to the print data. A clear operation can be largely omitted, and the printing speed can be increased.

Further, in the test mode, since the relative position of the block on the virtual page and the relative position of the block on the image memory are matched, there is an effect that the inspection of the image memory can be easily performed.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of a printing apparatus according to the present invention;
FIG. 2 is a block diagram of a conventional printing apparatus, FIG. 3 is a conceptual diagram for explaining control of reading out a print output from a conventional image memory, and FIG. FIG. 5 is an explanatory diagram for explaining an example, FIG. 5 is an explanatory diagram of the operation of the print engine, FIG. 6 is a time chart for explaining write / read timing of a conventional image memory, and FIG. FIG. 8 is a detailed explanatory diagram of the operation of the address conversion unit of the apparatus of the present invention. FIG. 9 is a flowchart illustrating a write operation of the apparatus of the present invention in a normal printing operation mode.
FIG. 10 is a flowchart for explaining a data read operation of the device of the present invention, FIG. 11 is an explanatory diagram showing a configuration example of a virtual page, and FIG. 12 is a graph comparing memory clear times when the virtual page is printed FIG. 13 is a flowchart for explaining the write operation in the test mode. 30 ... Image memory, 40 ... Print control unit, 41 ... Block determination unit, 42 ... Memory block allocation control unit, 43 ... Address generation unit, 44 ... Address conversion unit, 44a ... Address conversion memory , 44b: memory for indicating empty blocks, 45: connection switching circuit, 50: printing unit, 60: printing data, 61: virtual page, 62: block, 70: test flag register, 71: ... selector, T ...... mapping flag, RM ...... image memory block _{address, P 1, P 2 ‥ P} X ...... page identification flag.

Claims (2)

(57) [Claims] An image memory for storing print data; a print control for writing the print data to the image memory; and a printing unit for printing the print data stored in the image memory. The control unit divides a virtual page composed of an image for one page virtually set in correspondence with print output into a plurality of blocks, and for each block, a blank block composed of only blank data. And a block determining unit that determines whether the block is a valid block including valid data. Based on the determination result of the block determining unit, only a valid block is selected, and data is written to the image memory in block units. A memory block allocation control unit, a block address of the effective block in the virtual page, and a block of the image memory in which the effective block is written. Associating the address, and, in the virtual page,
An address conversion unit that stores a mapping flag for identifying an effective block and a blank block, and stores a block address of the image memory in which the effective block is written in association with the mapping flag when the block is an effective block; At this time, sequentially refer to the mapping flag of the address conversion unit, if the block is a valid block, read the image data from the address stored in the image memory corresponding to the mapping flag in the address conversion unit, A printing apparatus, further comprising: a data readout control unit that outputs to a printing unit, and when the block is a blank block, outputs blank data corresponding to the block to the printing unit. 2. A printing apparatus according to claim 1, further comprising a test flag register for displaying a test mode for image memory inspection, wherein said test flag register is set in a test mode, and said virtual page is validated. A printing apparatus, wherein all blocks and blank blocks are written into the image memory, and the relative positions of the blocks on the image memory and the relative positions of the blocks on the virtual page are matched.