JPH02273995A - Treatment of copper circuit on inner layer circuit board - Google Patents

Treatment of copper circuit on inner layer circuit board

Info

Publication number
JPH02273995A
JPH02273995A JP9552489A JP9552489A JPH02273995A JP H02273995 A JPH02273995 A JP H02273995A JP 9552489 A JP9552489 A JP 9552489A JP 9552489 A JP9552489 A JP 9552489A JP H02273995 A JPH02273995 A JP H02273995A
Authority
JP
Japan
Prior art keywords
copper
circuit
inner layer
board
circuit board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9552489A
Other languages
Japanese (ja)
Inventor
Takafumi Arai
新井 啓文
Sunao Ikoma
生駒 直
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP9552489A priority Critical patent/JPH02273995A/en
Publication of JPH02273995A publication Critical patent/JPH02273995A/en
Pending legal-status Critical Current

Links

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  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PURPOSE:To improve adhesion between a copper circuit and prepreg resin and prevent the development of a halo phenomenon by dissolving and removing an oxide coating on the surface of the copper circuit with warm water after performing oxidation treatment of the copper circuit which is provided on an inner layer circuit board. CONSTITUTION:After electric circuits are formed on the both sides of a laminated board which is a glass cloth base material-epoxy resin laminated board clad with copper foils on the both sides of the above board, both faces are made to become slightly rough by a belt sander. Then the solution of alkaline sodium chlorite is prepared at a temperature of 90 deg.C and an inner layer circuit board is immersed in the above solution for 10min. Then its circuit face is made to become rough still more by performing oxidation treatment of the surface of the copper circuit and a cupric oxide film if formed as well. Subsequently, this circuit board is immersed in warm water for 60min. at a temperature of 50 deg.C to dissolve the cupric oxide film. Then its film is removed and the above board is washed with water and is dried. In this way, surface treatment of the copper circuit not only improves adhesion between the copper circuit and prepreg resin but also prevents the development of a halo phenomenon.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は電子機器、電気機器、コンピューター通信機器
等に利用される多層プリント配線板の製造に用いる内J
−用回路板の銅回路の処理方法に関するものである。
Detailed Description of the Invention [Industrial Field of Application] The present invention is applicable to the production of multilayer printed wiring boards used in electronic equipment, electrical equipment, computer communication equipment, etc.
This invention relates to a method for processing copper circuits on circuit boards for use in -.

[従来の技術1 多層プリント配線板は、片面乃至両面に銅箔等で回路を
形成した内層用回路板にプリプレグを介して外層用回路
板もしくは銅箔を重ね、これを加熱加圧成形して内層用
回路板と外層用回路板もしくは銅箔と積層することによ
って製造されるのが一般的である。
[Conventional technology 1] A multilayer printed wiring board is made by laminating an outer layer circuit board or copper foil via a prepreg on an inner layer circuit board with a circuit formed on one or both sides using copper foil, etc., and then forming this under heat and pressure. It is generally manufactured by laminating an inner layer circuit board and an outer layer circuit board or copper foil.

そして、内層用回路板に形成した銅の回路と外層用回路
板もしくはtMNを積Nさせるプリプレグの樹脂との接
着性を確保することが必要である。
It is also necessary to ensure adhesion between the copper circuit formed on the inner layer circuit board and the outer layer circuit board or the prepreg resin on which tMN is laminated.

特に内層用回路板の回路を電解銅箔によって形成する場
合、銅箔の片面は粗面に形成されるが他の片面は平滑面
に形成されており、内層用回路板の製造に際しては粗面
で銅箔を接着させているために、内層用回路板の銅回路
の表面は銅箔の平滑面となり、銅回路とプリプレグの樹
脂との接着性は非常に低くなるものであって、接着性を
高める工夫が必要となるのである。
In particular, when forming circuits on inner layer circuit boards using electrolytic copper foil, one side of the copper foil is formed with a rough surface, while the other side is formed with a smooth surface. Because the copper foil is bonded to the inner layer circuit board, the surface of the copper circuit on the inner layer circuit board becomes a smooth surface of the copper foil, and the adhesion between the copper circuit and the prepreg resin is extremely low. Therefore, it is necessary to devise ways to increase this.

そこで、従来がら種々の方法で銅の回路と樹脂との接着
性を高めることが検討されており、銅回路の表面を酸化
処理して接着性を高めることが一般になされている。こ
の銅回路の表面を酸化処理する方法としては、過硫酸カ
リウムを含むアルカリ性水溶液、あるいは亜塩素酸ナト
リウムを含むアルカリ性水溶液を用いて行うことが一般
的である。
Therefore, various methods have been studied to improve the adhesion between copper circuits and resins, and it is common practice to oxidize the surface of copper circuits to improve adhesion. The surface of the copper circuit is generally oxidized using an alkaline aqueous solution containing potassium persulfate or an alkaline aqueous solution containing sodium chlorite.

[発明が解決しようとする課題] 上記のように銅回路の表面を酸化処理することによって
、銅回路と樹脂との接着性を十分に確保することができ
る。しかしながら、特開昭56−153797号公報や
特開昭61−176192号公報においで報告されてい
るように、銅酸化物は酸に溶解し易いために、スルホー
ルをドリル加工した後スルーホールメツキをする際に化
学メツキ液に浸漬すると、スルーホールの内周に露出す
る銅回路の断面部分の銅酸化物がメツキ液の酸(塩酸等
)に溶解し、スルホールの内周から銅回路と樹脂との界
面に酸が浸入する溶解侵食いわゆるハロー現象が起こり
易(なり、多層プリント配線板の信頼性が低下すること
になるものであった。また回路の表面に形成される銅酸
化物の被膜は物理的強度が弱いために、酸化被膜によっ
て接着強度の向上の効果が減じられる虞れもあった。
[Problems to be Solved by the Invention] By oxidizing the surface of the copper circuit as described above, sufficient adhesion between the copper circuit and the resin can be ensured. However, as reported in JP-A-56-153797 and JP-A-61-176192, copper oxide is easily dissolved in acid, so through-hole plating is not required after drilling through-holes. When it is immersed in a chemical plating solution, the copper oxide on the cross section of the copper circuit exposed on the inner periphery of the through-hole will be dissolved in the acid (hydrochloric acid, etc.) of the plating solution, and the copper circuit and resin will be removed from the inner periphery of the through-hole. The so-called halo phenomenon, in which acid penetrates into the interface between circuits, is likely to occur (resulting in a decrease in the reliability of multilayer printed wiring boards).Furthermore, the copper oxide film formed on the surface of the circuit is Since the physical strength is weak, there is a possibility that the effect of improving the adhesive strength due to the oxide film may be reduced.

本発明は叙述の点に鑑みてなされたものであって、本発
明の目的とするところは回路中即ち回路面積が大きくな
っても層間接着性がよく、耐ハロー性もよい内層用回路
板の銅回路の処理方法を提供するにある。
The present invention has been made in view of the above points, and an object of the present invention is to provide an inner layer circuit board that has good interlayer adhesion and good halo resistance even when the circuit area becomes large. The present invention provides a method for processing copper circuits.

[課題を解決するための手段1 上記目的を達成するため本発明内層用回路板の銅回路の
処理方法は、内層用回路板に設けた銅の回路を酸化処理
した後、この銅の回路の表面の酸化被膜を温水で溶解除
去することをvf徴とする。
[Means for Solving the Problems 1] In order to achieve the above object, the method for treating the copper circuit of the inner layer circuit board of the present invention is to oxidize the copper circuit provided on the inner layer circuit board, and then oxidize the copper circuit. The VF feature is the removal of the oxide film on the surface by dissolving it with hot water.

以下本発明の詳細な説明する。The present invention will be explained in detail below.

内層用回路板としては、銅箔を張った銅張りがラスエボ
袴シ樹脂積層板、銅張りガラスポリイミド樹脂積層板な
どを用いてvA箔をエツチング処理等することによって
、片面もしくは両面に銅の回路を設けて形成したものを
用いることができるが、さらに積層板に化学メツキや電
気メツキで銅の回路を設けて形成したものを用いること
もできる。
For the inner layer circuit board, copper circuits can be formed on one or both sides by etching the vA foil using a copper-clad resin laminate, a copper-clad glass polyimide resin laminate, etc. However, it is also possible to use a laminated board with a copper circuit formed by chemical plating or electroplating.

そしてこの内層用回路板の表面を粗面化処理するのが好
ましい、粗面化処理はサンドペーパーやベルトサングー
等を用いることができる。銅箔として両面が粗面に予め
形成されたものを用いる場合には、この上うな粗面化処
理は省略することができる。
It is preferable to roughen the surface of this inner layer circuit board, and the roughening treatment can be performed using sandpaper, belt sanding, or the like. If a copper foil with rough surfaces on both sides is used, further roughening treatment can be omitted.

次に内層用回路板の銅回路の表面を酸化処理(黒化処理
とも称される)する、酸化処理は、過硫酸カリウムを含
むアルカリ性水溶液や、亜塩素酸ナトリウムを含むアル
カリ性水溶液など、酸化剤を含むアルカリ性水溶液を用
いて処理することによって行うことができる。このよう
に酸化処理することによって銅回路の表面に銅酸化物層
を形成することができる。銅酸化物層は酸化第一銅ある
いは酸化第二銅あるいは両者の混合物によって形成され
るものであり、銅の回路の表面には黒色の銅酸化物の被
膜が形成される。
Next, the surface of the copper circuit on the inner layer circuit board is subjected to oxidation treatment (also called blackening treatment). This can be carried out by treatment using an alkaline aqueous solution containing. By performing the oxidation treatment in this manner, a copper oxide layer can be formed on the surface of the copper circuit. The copper oxide layer is formed of cuprous oxide, cupric oxide, or a mixture of both, and a black copper oxide film is formed on the surface of the copper circuit.

このように内層用回路板の銅回路の表面に酸化物層を形
成した後に、酸化被膜を温水に浸漬して溶解除去する。
After forming the oxide layer on the surface of the copper circuit of the inner layer circuit board in this manner, the oxide film is immersed in warm water to be dissolved and removed.

この温水の温度は30〜90℃であり、好ましくは50
〜60℃であり、浸漬する時間は30分〜2時間である
。この温水にて酸化被膜を溶解除去した後、水洗して乾
燥する。
The temperature of this hot water is 30 to 90°C, preferably 50°C.
The temperature is ~60°C, and the immersion time is 30 minutes to 2 hours. After dissolving and removing the oxide film with this warm water, it is washed with water and dried.

このように処理した内層用回路板を用いて、通常の工程
で多層プリント配線板を製造することがで訃る。すなわ
ち、内層用回路板にプリプレグを介して外層用回路板(
あるいは他の内層用回路板)やもしくは#!箔を重ね、
これを加熱加圧して積層成形することによってプリプレ
グにて接着して多層に積層する。この多層成形は多段プ
レスやマルチロール等で行なわれ、成形圧力は5〜50
Kg/c−2、成形温度は130〜220℃、成形時間
は30〜120分間である。このように多層成形した後
、スルーホールをドリル加工して設けると共に化学メツ
キ等によってスルーホールメツキを施し、さらにエツチ
ング等の処理をして外層回路を形成することによって、
多層プリント配線板を製造できる。
It is not possible to manufacture a multilayer printed wiring board using the inner layer circuit board treated in this way through a normal process. In other words, the outer layer circuit board (
Or other inner layer circuit board) or #! Layer the foil,
This is heated and pressurized and laminated to form multiple layers by adhering with prepreg. This multilayer molding is performed using a multistage press or multiroll, and the molding pressure is 5 to 50.
Kg/c-2, molding temperature is 130 to 220°C, and molding time is 30 to 120 minutes. After multi-layer molding in this way, through-holes are formed by drilling, through-hole plating is performed by chemical plating, etc., and an outer layer circuit is formed by etching, etc.
Multilayer printed wiring boards can be manufactured.

[作用] 内層用回路板の銅回路の表面を酸化処理することによっ
て、銅回路の表面に凹凸を形成させることができるもの
であり、この凹凸によって銅回路とプリプレグの樹脂と
の接着性を高めることができる。また銅回路の表面に形
成される酸化被膜を温水で溶解除去することによって、
酸化被膜がメツキ処理の際などに酸に溶解して発生する
ハロー現象を防ぐことができる。
[Function] By oxidizing the surface of the copper circuit of the inner layer circuit board, unevenness can be formed on the surface of the copper circuit, and this unevenness improves the adhesiveness between the copper circuit and the prepreg resin. be able to. In addition, by dissolving and removing the oxide film formed on the surface of the copper circuit with hot water,
It is possible to prevent the halo phenomenon that occurs when the oxide film dissolves in acid during plating.

[実施例] 次−二本発明を実施例により具体的に説明する。[Example] Next-2 The present invention will be specifically explained with reference to Examples.

又(涯 両面に70μ厚の銅箔を張って形成した厚み1゜01の
〃ラス布基材エポキシ樹IIw積層板(松下電工株式会
社製品番176G)を用いて両面に電気回路を形成し、
電気回路形成後、ベルトサングーで軽く粗面化した。
In addition, an electric circuit was formed on both sides using a lath cloth base epoxy tree IIw laminate (Matsushita Electric Works Co., Ltd. product number 176G) with a thickness of 1°01, which was formed by pasting 70μ thick copper foil on both sides,
After forming the electric circuit, the surface was lightly roughened using a belt sander.

次に、 NaCa、02     30g10゜NaOH15g
/12゜ N asP O410g/ Q。
Next, NaCa, 02 30g10°NaOH15g
/12°N asP O410g/ Q.

N a2c Ov         5 g/ IZの
アルカリ性亜塩素酸ナトリウムの水溶液を90°Cに調
製し、これに内層用回路板を10分間浸漬することによ
って、銅の回路の表面を酸化処理(黒化処理)して回路
面をさらに粗面化すると共に酸化第二銅膜を形成した。
The surface of the copper circuit is oxidized (blackened) by preparing an aqueous solution of alkaline sodium chlorite of Na2c Ov 5 g/IZ at 90°C and immersing the inner layer circuit board in this solution for 10 minutes. Then, the circuit surface was further roughened and a cupric oxide film was formed.

次にこのように形成した内層用回路板を50℃の温水に
60分間fi潰して酸化第二銅膜を溶解除去させ、水洗
して乾燥した。
Next, the inner layer circuit board thus formed was crushed in warm water at 50° C. for 60 minutes to dissolve and remove the cupric oxide film, washed with water, and dried.

このように銅回路の表面を処理した後、内層用回路板の
両面に〃ラス布基材にエポキシ樹脂を含浸乾燥して調製
した厚み0,1a+mのプリプレグ(松下電工株式会社
!Z1661JM)を2枚づつ重ねると共に、さらにそ
の外側に厚み35μの銅箔を重ね、40Kg/am2.
165℃、60分間積層成形することによって4層プリ
ント配線板を得た。
After treating the surface of the copper circuit in this way, two coats of prepreg (Matsushita Electric Works Co., Ltd.! Z1661JM) with a thickness of 0.1 a + m prepared by impregnating and drying an epoxy resin on a lath cloth base material are applied to both sides of the inner layer circuit board. Layer each sheet one by one, and then layer a 35μ thick copper foil on the outside, 40Kg/am2.
A four-layer printed wiring board was obtained by lamination molding at 165° C. for 60 minutes.

赴(燵 実施例と同じ内層用回路板を用い、これを実施例と同様
に酸化処理(黒化処理)した後、水洗t!、燥してから
、直ちに実施例と同様にプリプレグ及び銅箔を重ねて加
熱加圧成形して4層プリント配線板を得た。
(Using the same inner layer circuit board as in the example, it was oxidized (blackened) in the same manner as in the example, washed with water, dried, and then immediately prepreg and copper foil as in the example. were piled up and molded under heat and pressure to obtain a four-layer printed wiring board.

上記実施例及び比較例で得た4層プリント配線板に0.
4mmφのドリルビットを用いて8万rp1]1の回転
速度及び1.6m/winの送り速度の条件でスルーホ
ール加工を行った。これを水:HCαが1:1の容積比
の酸性溶液に30分間浸漬して、ハローの発生状態を顕
微鏡で観察した。ハローの大きさ(スルーホールの内周
からの酸溶液の浸入幅寸法で測定)を大麦に示す。また
4層プリント配線板における内層用回路板の銅回路とプ
リプレグの樹脂との層間接着性(内層回路板とプリプレ
グとの引き剥がし強度で測定)を測定した。結果を大麦
に示す。
The four-layer printed wiring boards obtained in the above Examples and Comparative Examples had 0.
Through-hole drilling was performed using a 4 mmφ drill bit at a rotational speed of 80,000 rpm and a feed rate of 1.6 m/win. This was immersed in an acidic solution with a water:HCα volume ratio of 1:1 for 30 minutes, and the state of halo formation was observed using a microscope. The size of the halo (measured by the width of the acid solution entering from the inner circumference of the through-hole) is shown on the barley. In addition, the interlayer adhesion between the copper circuit of the inner layer circuit board and the resin of the prepreg in the four-layer printed wiring board (measured by the peel strength between the inner layer circuit board and the prepreg) was measured. Show the results to barley.

上記表に見られるように、銅回路を酸化処理したのち温
水で酸化被膜を除去するようにした実施例のものは、酸
化被膜を除去する処理を行わない比較例のものに比べて
、ハローの発生を大きく低減することができることが確
認されると共に、さらに層間接着性の向上でさることが
確認される。
As seen in the table above, the example in which the copper circuit was oxidized and then the oxide film was removed with hot water had a lower halo level than the comparative example in which the oxide film was not removed. It has been confirmed that the occurrence of this phenomenon can be greatly reduced, and it has also been confirmed that interlayer adhesion is further improved.

従って比較例のものでは層間接着性がやや不足するため
ファインパターンの回路のような回路面積が大きいもの
では接着不良が生じる虞れがあるが、実施例のものでは
層間接着性が高いためファインパターンの回路の場合に
も接着不良は生じない。
Therefore, since the comparative example has a slight lack of interlayer adhesion, there is a risk of adhesion failure in circuits with a large circuit area such as fine pattern circuits, but the example has high interlayer adhesion, so fine pattern Adhesion failure does not occur even in the case of the circuit.

[発明の効果] 上述のように本発明にあっては、内層用回路板に設けp
、@の回路を酸化処理した後、この銅の回路の表面の酸
化被膜を温水で溶解除去するようにしたので、酸化処理
することによって銅回路の表面に微細な凹凸を形成する
ことができて、この凹凸によって銅の回路とプリプレグ
の樹脂との接着性を高めることができるものであり、ま
た銅の回路の表面に形成される酸化被膜を溶解除去する
ことによって酸化被膜がメツキ処理の際などに酸に溶解
するような虞れがなくなり、ノ)ロー現象を防止できる
ものであり、さらに酸化被膜を温水で溶解除去するので
、物理的に除去したりするのに比べて簡単且つ確実に除
去できるものである。
[Effect of the invention] As described above, in the present invention, the p
After oxidizing the , @ circuit, the oxide film on the surface of this copper circuit was dissolved and removed with hot water, so the oxidation treatment made it possible to form fine irregularities on the surface of the copper circuit. This unevenness can improve the adhesion between the copper circuit and the prepreg resin, and by dissolving and removing the oxide film formed on the surface of the copper circuit, the oxide film can be removed during plating processing, etc. This eliminates the risk of the product being dissolved in acid and prevents the oxidation phenomenon.Furthermore, since the oxide film is removed by dissolving it with hot water, it is easier and more reliable to remove than physically removing it. It is possible.

Claims (1)

【特許請求の範囲】[Claims] [1]内層用回路板に設けた銅の回路を酸化処理した後
、この銅の回路の表面の酸化被膜を温水で溶解除去する
ことを特徴とする内層用回路板の銅回路の処理方法。
[1] A method for treating a copper circuit on an inner layer circuit board, which comprises oxidizing the copper circuit provided on the inner layer circuit board, and then dissolving and removing the oxide film on the surface of the copper circuit with hot water.
JP9552489A 1989-04-15 1989-04-15 Treatment of copper circuit on inner layer circuit board Pending JPH02273995A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9552489A JPH02273995A (en) 1989-04-15 1989-04-15 Treatment of copper circuit on inner layer circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9552489A JPH02273995A (en) 1989-04-15 1989-04-15 Treatment of copper circuit on inner layer circuit board

Publications (1)

Publication Number Publication Date
JPH02273995A true JPH02273995A (en) 1990-11-08

Family

ID=14139949

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9552489A Pending JPH02273995A (en) 1989-04-15 1989-04-15 Treatment of copper circuit on inner layer circuit board

Country Status (1)

Country Link
JP (1) JPH02273995A (en)

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