JPH02271577A - High breakdown strength film transistor - Google Patents

Abstract

PURPOSE:To obtain a film transistor (HVTFT) having large on-off ratio and high breakdown strength by providing an insulating layer of silicon nitride film, which is thin in the range of 50Angstrom to 1000Angstrom , between the semiconductor layer of amorphous silicon and the source drain electrodes. CONSTITUTION:This is constituted of a gate electrode 1, L2 apart on the plane from a drain electrode 6, a gate insulating film 2 on the gate electrode, a semiconductor layer 3 of amorphous silicon, a thin insulating film 4 in the range of 50Angstrom to 1000Angstrom , a source electrode 5, and a drain electrode 6, and this is of such structure that the thin insulating film 4 at the part of the source electrode 5 is removed and the source electrode 5 and the semiconductor layer 3 contact with each other. Hereby, HVTFT high in on-off ratio can be realized. Moreover, since the insulating films are two layers, it becomes more resistant against the insulation breakdown than the case where the gate insulating film is one layer, so the critical voltage between the source and drain electrodes 5 and 6, which act as transistors, becomes 300V to 500V.

Description

Detailed Description of the Invention (Field of Industrial Application) The present invention relates to a high voltage thin film transistor (hereinafter referred to as HVTF) that can be used as a switch in an electrostatic plotter device, etc.
The present invention relates to the structure of HVTFT (abbreviated as "T"), and particularly relates to an HVTFT that is easy to manufacture and has high performance.

(Prior Art) The structure of a conventionally reported HVTFT is that of a normal thin film transistor (hereinafter abbreviated as TPT) shown in FIG. 2, namely, a gate electrode 1, a gate insulating film 2, and an amorphous silicon semiconductor layer 3 , n layer 7, and a pair of source and drain electrodes 5, but the difference is that the third
As shown in the figure, there is an offset L2 between the gate electrode and the source electrode. By doing this, there is a distance of L2 between the drain electrode and the gate electrode in a plane, and even if a high voltage is applied to the drain electrode, dielectric breakdown of the gate insulating film is less likely to occur, and the source operating as a transistor・The limit voltage between drain electrodes is 4
A TPT with a high withstand voltage of about 00V is realized (R, A,
Martin, P., K., Yap.

M, Hack, H, Tuan, Teehnlca.
l Digest or IEEE International
onal Electron Device Meet
ing, 1987, p. 440). However, in such an HVTFT, the source and drain electrodes are connected to the n layer, so even when the gate voltage is Ov,
When a high voltage is applied to the source/drain electrodes, in addition to electrons injected from the source into the semiconductor, holes injected from the drain into the semiconductor flow through the semiconductor layer, resulting in a large off-state current, which is controlled by the gate voltage. Possible sources/
There was a problem that the drain current (on-off ratio) became small.

(Problems to be Solved by the Invention) An object of the present invention is to solve the above-mentioned problems and provide a high-voltage thin film transistor with reduced off-state current and a large on-off ratio.

(Means for Solving the Problems) The HVTFT of the present invention includes: (1) a gate electrode, a gate insulating film, a gate insulating film,
In an inverted stagger type high breakdown voltage thin film transistor that has a structure of an amorphous silicon semiconductor layer, a pair of source and drain electrodes, and an offset exists between the gate electrode and the drain electrode, the amorphous silicon semiconductor layer and having a thin insulating film layer of silicon nitride film in the range of 50 to 1000 layers between the source and drain electrodes, and without intervening a thin insulating film made of silicon nitride film in the source electrode portion; A high voltage thin film transistor, characterized in that the source electrode and the amorphous silicon semiconductor layer are in contact with each other, and the limiting voltage between the source and drain electrodes operating as a transistor is from 300 V to 500 V. (2) A structure in which a pair of source/drain electrodes, an amorphous silicon semiconductor layer, a gate insulating film, and a gate electrode are provided in this order on an insulating substrate, and there is an offset between the gate electrode and the drain electrode. Existing staggered high voltage thin film transistors include a thin insulating film layer of silicon nitride in the range of 50 to 1000 layers between the source/drain electrodes and the amorphous silicon semiconductor layer; A thin insulating film made of a silicon nitride film is not interposed in the source electrode portion, and the source electrode and the amorphous silicon semiconductor layer are in contact with each other, and the limiting voltage between the source and drain electrodes that operates as a transistor is 300v to 500v
(3) A gate electrode, a gate insulating film, and a gate insulating film are sequentially formed on an insulating substrate.
In a staggered high-voltage thin film transistor that has a structure of an amorphous silicon semiconductor layer, an n-layer, and a pair of source/drain electrodes, and an offset exists between the gate electrode and the drain electrode, the amorphous silicon semiconductor 50 to 100 layers between the layer and the source/drain electrodes.
The source electrode has an insulating film layer of a thin silicon nitride film in the range of 100 nm, and there is no thin insulating film layer made of silicon nitride film interposed in the source electrode portion, and the source electrode is in contact with the n layer and the transistor. The limit voltage between the source and drain electrodes that operates as 300V to 500V
(4) A pair of source/drain electrodes, an n layer, an amorphous silicon semiconductor layer, a gate insulating film,
In a staggered high-voltage thin film transistor having a gate electrode structure and having an offset between the gate electrode and the drain electrode, there are 50 to 10 layers between the source/drain electrode and the amorphous silicon semiconductor layer.
It has a thin silicon nitride insulating film layer in the range of 0.00
Further, the present invention is a high voltage thin film transistor characterized in that a thin insulating film made of a silicon nitride film is not interposed in the source electrode portion, and the source electrode is in contact with the n+ layer.

(5) From 50 to 1000 people in (1) to (4) above
(6) The amorphous silicon semiconductor layer in (1) to (5) above contains boron, phosphorus, germanium, carbon, nitrogen, This is a high voltage thin film transistor characterized by an amorphous silicon layer doped with at least one type of impurity such as oxygen.

Hereinafter, the present invention will be explained in detail using the drawings.

FIG. 1 is a diagram showing an embodiment of the HVTFT according to the present invention. In other words, Figure (a) shows the case in which the present invention is configured in an inverted staggered type without sandwiching the n layer, and Figure (b) shows the configuration in which the present invention is configured in a staggered type without sandwiching the n layer. e
) shows the case where the present invention is constructed in an inverted staggered type, with n layers sandwiched between them, and (d) of the same figure shows the case where the present invention is constructed in a staggered type with n layers sandwiched between them.

First, to explain the diagram (a), the HVTFT of the present invention
A gate insulating film 2, an amorphous silicon semiconductor layer 3, a thin insulating film 4 with a thickness ranging from 1.50 to 1000, and a source electrode 5 are formed on the gate electrode 1, which is separated from the drain electrode 6 by L2 on the plane. It is composed of a drain electrode 6, and the thin insulating film 4 in the source electrode 5 portion is removed so that the source electrode 5 and the semiconductor layer 3 are in contact with each other.

(b) The figure shows the case where the present invention is configured in a staggered type.
It is composed of a thin insulating film 4 with a thickness of 0.00 mm, a semiconductor layer 3 of amorphous silicon, and a gate electrode 1 separated from the gate insulating film 2 and the drain electrode 6 by L2 on the plane. The structure is such that the source electrode 5 and the semiconductor layer 3 are in contact with each other by removing a portion of the thin insulating film 4. In this case, the HVTFT of the present invention can be realized with a smaller number of photomasks than when configuring with an inverted stagger type.

(e) and (d) The figures show the inverted stagger type, and the stagger type between the amorphous silicon semiconductor layer 3 and the thin insulating film 4 in the range of 50 to 1000 layers, and between the source electrode 5 and the semiconductor layer 3. In addition, n+, which is amorphous silicon doped with a large amount of phosphorus,
This is the case where layer 7 is sandwiched.

(Function) As shown in the present invention, L2 on the plane from the drain electrode
In the HVTFT, which is characterized in that it is composed of gate electrodes 1 that are separated from each other, a thin silicon nitride film in the range of 50 to 1000 layers is placed between the semiconductor layer 3 of amorphous silicon, the source electrode 5, and the drain electrode 6. By sandwiching the insulating film 4 and removing the thin insulating film 4 at the source electrode 5 portion to create a structure in which the source electrode 5 and the semiconductor layer 3 are in contact with each other, the following effects can be considered.

When the gate voltage is Ov, even if a high voltage is applied to the source/drain electrode, holes will not flow from the drain electrode to the semiconductor layer because there is a thin silicon nitride insulating film between the drain electrode and the semiconductor layer. injection is blocked. In addition, since there is a thin silicon nitride insulating film on the channel, the surface level of the amorphous silicon film decreases, and therefore electrons flow through the semiconductor layer, but the leakage current at the surface of the semiconductor layer decreases. Decrease. In this way, even if a high voltage is applied between the source and drain electrodes, the off-state current can be kept small.

On the other hand, when a gate voltage is applied, electrons are induced at the interface between the gate insulating film and the amorphous silicon semiconductor layer. In this case, since the silicon nitride insulating film is 50 to 1000 times thinner, the electrons induced at the interface between the gate insulating film and the amorphous silicon semiconductor layer are transferred to the silicon nitride film due to the tunnel effect and Frankel-Pool effect. Can pass through a nitride insulating film (note that if the insulating film has a thickness of 50 mm)
If the number is less than 1,000, the injection of holes from the drain electrode into the semiconductor layer is hardly prevented, and if the number is more than 1,000, electrons are hardly able to pass through the insulating layer).

That is, according to the present invention, an HVTF with a high on-off ratio
T can be achieved. Further, since there are two layers of insulating films, the gate insulating film is more resistant to dielectric breakdown than the case of two layers, so the limit voltage between the source and drain voltages for operating as a transistor is 300V to 500V. Furthermore, since the channel portion between the source and drain electrodes is covered with a thin silicon nitride insulating film, a TPT that is resistant to deterioration can be realized without providing a new passivation film.

Furthermore, in the case of the present invention, the source electrode is a semiconductor layer or an n
Since it is in contact with the + layer and electrons can be easily injected with a low gate voltage, a high gate voltage is not required. Note that even if a thin silicon oxide insulating film is used instead of the thin silicon nitride insulating film, the same effect as in the case of using a thin silicon nitride film can be achieved. Furthermore, by sandwiching an n layer between the insulating film and the amorphous silicon semiconductor layer, in addition to the above effect, the rise voltage of the on-current can be controlled.

In addition, boron, carbon, nitrogen,
HVT with even higher voltage resistance can be achieved by doping with either oxygen.
FT can be realized.

Also, if doped with phosphorus, a higher drain current can be obtained compared to the case without doping, and if doped with germanium, the off-state current can be lowered even under light irradiation.
PT can be manufactured.

(Example) FIG. 4 shows drain voltage-current characteristics using the gate voltage as a parameter in the inverted staggered HVTFT structure shown in FIG. 1(a). In this case, the thickness of the thin silicon nitride insulating film is approximately 100 mm.

The broken line represents the gate voltage Ov, ie, the off-state current characteristic, of a normal TPT whose source-drain voltage is in contact with the n layer.

It can be seen that by adopting the structure of the present invention, a good HVTFT with a sufficient on-off ratio can be obtained even when the source-drain voltage is 200 V.

In addition, as shown in Fig. 1(e), the HVT sandwiching the n layer
Also in FT, the H shown in FIG. 1(a) shown in FIG.
Almost the same characteristics as the VTFT were obtained, but the rise voltage was about 50V, which was about an aOV lower than the HVTFT shown in FIG. 1(a).

(Effects of the Invention) Since the TPT of the present invention has a very high breakdown voltage while maintaining a sufficient on-off ratio, it can be used for high breakdown voltage switches, such as switches for electrostatic blocks. Furthermore, by controlling the film thickness and film quality of the insulating film, such as a thin silicon nitride film or silicon oxide film, the source
It is possible to control the withstand voltage of the drain voltage.

[Brief explanation of drawings]

FIG. 1 is a diagram showing an embodiment of the HVTFT according to the present invention, in which (a) the present invention is configured with an inverted stagger type, and n
When no layers are sandwiched, (b) is when the present invention is constructed in a staggered type and n layers are not sandwiched; (C) is when the present invention is constructed in an inverted staggered type and n layers are sandwiched; (d) ) is a case in which the present invention is constructed in a staggered type, with an n layer sandwiched between them. FIG. 2 is a structural diagram of a typical conventional inverted stagger structure TPT. Figure 3 is a structural diagram of a previously reported HVTFT.
FIG. 4 shows drain voltage-current characteristics using the gate voltage as a parameter in an embodiment of the inverted staggered structure TPT according to the present invention. Note that the broken line indicates the source-drain voltage n
This is the gate voltage OV current when in contact with the layer. 1... Gate electrode 2... Gate insulating film 3
...Semiconductor layer 4 of amorphous silicon...Thin insulating film 5 of silicon nitride film or silicon oxide film...Source electrode 6...Drain electrode 7
... N-layer sub-agent Patent attorney Hiroaki Tamura Figure 1 Otsuke μ shoulder 1 bottleke 2. Gu 1 - Written amendment to the law procedure filed on March 23, 1990 1, Indication of the case 1999 Patent Application No. 91826 2, Name of the invention High-voltage thin film transistor 3, Person making the amendment Relationship to the incident Patent applicant address 2-6-3 Otemachi, Chiyoda-ku, Tokyo Name (6
85) Nippon Steel Corporation 4, sub-agent address: 3-4-5 Kuramae, Taito-ku, Tokyo■D The drawing ■ and the claims are amended as shown in the attached sheet. 2. The specification (detailed description of the invention and brief description of the drawings) is amended as follows. (1) Page 8, line 6 “Stagger (2) In lines 6 and 17 of page 10, and line 10 of page 11, the text ``Kata'' is corrected to ``Sugata Kata''.
Correct "L2" to rNJ. (3) Next to "in contact" on page 9, line 6, insert the following statement: "The limit voltage between the source and drain electrodes, which is a structure and operates as a transistor, is 300v to 500v." (4) On page 13, line 4, and page 14, line 11, the words "drain voltage" should be corrected to "drain electrode." (5) Change "gate voltage" to page 14, line 8, to [gate voltage (
Vc) Correct to J. (6) Page 14, lines 8-9 “Drain voltage-current characteristics”
Corrected to "Drain voltage (V,) - current (Io) characteristics". 3. Correct the drawing (Figure 1) as shown in the attached sheet. sub-agent

Claims (1)

[Claims] 1. A structure in which a gate electrode, a gate insulating film, an amorphous silicon semiconductor layer, and a pair of source/drain electrodes are provided in this order on an insulating substrate, and between the gate electrode and the drain electrode. In an inverted stagger type high breakdown voltage thin film transistor in which an offset exists between the amorphous silicon semiconductor layer and the source/drain electrode,
The source electrode has a thin insulating film layer made of silicon nitride film in the range of 0 Å, and the source electrode portion is in contact with the semiconductor layer made of amorphous silicon without intervening a thin insulating film made of silicon nitride film. A high voltage thin film transistor, characterized in that it has a structure in which the transistor operates as a transistor, and the limiting voltage between the source and drain electrodes is 300V to 500V. 2. A pair of source and drain electrodes on the insulating substrate,
In a staggered high voltage thin film transistor that has a structure including an amorphous silicon semiconductor layer, a gate insulating film, and a gate electrode, and in which an offset exists between the gate electrode and the drain electrode, the source/drain electrode and the non-crystalline 50 Å to 1000 Å between crystalline silicon semiconductor layer
a thin insulating film layer of silicon nitride film having a thickness in the range of 1.5 Å, the source electrode portion is not interposed with a thin insulating film of silicon nitride film, and the source electrode is in contact with the semiconductor layer of amorphous silicon. A high voltage thin film transistor, characterized in that it has a structure in which the transistor operates as a transistor, and the limiting voltage between the source and drain electrodes is 300V to 500V. 3. A structure is adopted in which a gate electrode, a gate insulating film, an amorphous silicon semiconductor layer, an n^+ layer, and a pair of source/drain electrodes are provided in this order on an insulating substrate, and between the gate electrode and the drain electrode. In an inverted stagger type high breakdown voltage thin film transistor in which an offset exists, there is a gap of 50 Å between the amorphous silicon semiconductor layer and the source/drain electrode.
The source electrode has an insulating film layer of a thin silicon nitride film with a thickness ranging from 1000 Å to 1000 Å, and the source electrode portion is not interposed with a thin insulating film made of silicon nitride film, and the source electrode is n^
It has a structure in which it is in contact with the + layer, and the limiting voltage between the source and drain electrodes that operates as a transistor is from 300V to 500V.
High voltage thin film transistor. 4. A pair of source and drain electrodes on the insulating substrate,
n^+ layer, amorphous silicon semiconductor layer, gate insulating film,
In a staggered high voltage thin film transistor having a structure in which a gate electrode is provided and an offset exists between the gate electrode and the drain electrode, there is a gap of 50 Å between the source/drain electrode and the amorphous silicon semiconductor layer. The source electrode has an insulating film layer of a thin silicon nitride film in the range of 1000 Å, and no thin insulating film made of silicon nitride film is interposed in the source electrode portion, and the source electrode is formed in the n^
A high voltage thin film transistor, characterized in that it has a structure in which it is in contact with the + layer, and that the limiting voltage between the source and drain electrodes that operates as a transistor is from 300V to 500V. 5. The high breakdown voltage thin film transistor according to claim 1, wherein the thin silicon nitride insulating film having a thickness in the range of 50 Å to 1000 Å is a silicon oxide film. 6. The amorphous silicon semiconductor layer according to claim 1 or 2 or 3 or 4 or 5 is doped with at least one impurity such as boron, phosphorus, germanium, carbon, nitrogen, or oxygen. Claim 1 or 2 or 3 or 4 or 5
The high voltage thin film transistor described above.