JPH02270357A - Semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a semiconductor device which is small in size and in which a wiring operation is easily made keeping an adequate insulation distance between wiring bars at external wiring by a method wherein steps are provided to the outer face of a case, and at least some of connection terminals different in electric polarity are arranged on the faces of the different steps. CONSTITUTION:An electronic circuit composed of semiconductor elements is housed in a case, and connection terminals 6-16 of the electronic circuit are arranged on the outer face of the case to constitute a semiconductor device, where steps are provided to the outer face of the case and some of the connection terminals 6-16 different in electric polarity are arranged on different step faces 5a-5e. For instance, two or more steps of different heights H1 and H2 are provided to a fitting face 5 or the upper side of a case main body 4 of a high power semiconductor device which includes a switching element such as a GTO thyristor or the like. The connection terminals different from each other in electric polarity of the connection terminals 6-16 are arranged on the different step faces 5a-5e on the surface of the case.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a semiconductor device, and particularly relates to an improvement in the case of a semiconductor device in which an electronic circuit constituted by a high-power semiconductor element or the like is housed inside the case. It is something.

[Conventional technology]

Figure 5 shows a conventional gate turn-off risk (
6 is a plan view of a high power semiconductor device including a switching element such as a GTO thyristor (hereinafter referred to as a GTO thyristor), and FIG. 6 is a front view thereof. As shown in both figures, a case 1 constituting the envelope of this semiconductor device has a metal cooling block 3 having holes 2 and a plastic case body 4 attached to the cooling block 3. configured.

FIG. 7 shows a circuit diagram of the electronic circuit housed within the case 1. As shown in the figure, in this circuit, two GTO
Including thyristors Al and A2, each GTO thyristor AI
, A2 with respect to the flywheel diode A3. A4 are each connected in antiparallel. and GTO thyristor A
A cathode terminal 7, a cathode auxiliary terminal 9 of the GTO thyristor A1, and a snubber circuit (details will be described later) for protecting the GTO thyristor A1 from overvoltage are connected to the cathode of the flywheel diode A1 and the anode of the flywheel diode A3. Terminal 14 is connected to the snubber attachment. Also, GT
The snubber mounting terminal 13 and the AC terminal 6 are connected to the anode of the O thyristor A1 and the cathode of the flywheel diode 83, and the gate auxiliary terminal 11 is connected to the gate of the GTO thyristor A1.

On the other hand, the cathode of the GTO thyristor A2 and the anode of the flywheel diode A4 are connected to the AC terminal 6 and the GTO thyristor A2.
Cathode auxiliary terminal 10 of TO thyristor A2, and G
A terminal 16 is connected to the snubber mounting to which a snubber circuit for protecting the TO thyristor A2 from overvoltage is connected. In addition, the snubber mounting terminal 15 and the anode terminal 8 are connected to the anode of the GTO thyristor A2 and the cathode of the flywheel diode A4.
A gate auxiliary terminal 12 is connected to the gate of No. 2.

FIG. 8 shows a circuit diagram of the snubber circuit SN.

This snubber circuit SN includes a diode D whose cathode is connected to the terminal 13, a resistor R connected in parallel to the diode D, and a series connection to the diode D. and a capacitor C connected between them. Snubber installation is terminal 1
A snubber circuit SN having a configuration similar to this configuration is also connected between 5 and 16.

Referring again to FIGS. 5 and 6, on the flat mounting surface 5, which is the upper surface of the case body 4, there are AC terminals 6, which are connection terminals of the electronic circuit explained using FIG. Cathode terminal 7, anode terminal 8, cathode auxiliary terminal 9 of the GTO thyristor A1, gate auxiliary terminal 11, snubber circuit S
The snubber mounting to which N is connected has terminals 13 and 14, the cathode auxiliary terminal 10 for the other GTO thyristor A2, the gate auxiliary terminal 12, and the snubber mounting to which the snubber circuit is connected has terminals 15 and 16. Each connection terminal 6 to 16 is provided with a nut 1 for connection with a connection conductor.
7 are placed respectively.

In the conventional semiconductor device configured as described above, the anode terminal 8 and each snubber attachment are connected between the terminals 13 to 16, and each snubber attachment is connected between the terminals 13 to 16 and the gate auxiliary terminal 1.
1.12, it is necessary to maintain a certain insulation distance between each connection terminal 6 to 16 to ensure mutual electrical insulation. It is necessary to set a certain creepage distance. If such insulation distance or creepage distance is insufficient, case 1 above
When the semiconductor switching elements constituting the electronic circuit housed inside are energized, an air discharge occurs between the connection terminals 6 to 16, resulting in a situation where the semiconductor switching elements do not function properly. In some cases, overvoltage or overcurrent due to air discharge may destroy the semiconductor device.

[Problem to be solved by the invention]

In this way, each connection terminal 6 to 16 can be mounted flat on the surface 5.
In the conventional semiconductor device arranged above, each connection terminal 6 to 1
6 are disposed on the same plane, there is a problem in that the case 1 becomes larger if the above insulation distance and creepage distance are to be ensured.

In addition, as shown in FIGS. 9 and 10, the AC terminal 6
．． When wiring the wiring bars 18 to 20 for external connection to the cathode terminal 7 and the anode terminal 8, for example, the 10th
As shown in the figure, there is a problem in that the wiring process requires time and effort, such as the need to bend the broken line member 20 midway.

This invention was made to solve the above-mentioned problems, and in addition to reducing the size, wiring work can be easily performed while ensuring an appropriate insulation distance between wiring bars during external wiring. The purpose is to provide semiconductor devices.

[Means to solve the problem]

The semiconductor device of the present invention is a semiconductor device in which an electronic circuit composed of semiconductor elements is housed inside a case, and a plurality of connection terminals of the electronic circuit are arranged on the surface of the case, and achieves the above object. Therefore, a step is formed on the outer surface of the case so that at least some of the connection terminals having different electrical polarities are arranged on different step surfaces.

[Effect]

According to the semiconductor device of the present invention, since at least some of the connection terminals having mutually different electrical polarities are arranged on different step surfaces on the case surface, compared to a case where each connection terminal is arranged on a flat surface, The length of the case in the transverse direction can be shortened while ensuring sufficient insulation distance and creepage distance between the connection terminals, and the device can be made more compact. Furthermore, wiring work between the wiring bars for external connection connected to each connection terminal can also be simplified by using the above-mentioned level difference.

〔Example〕

FIG. 1 is a plan view of a high power semiconductor device including a switching element such as a GTO thyristor, which is an embodiment of the present invention, and FIG. 2 is a front view thereof.

This semiconductor device includes an electronic circuit having the same configuration as the electronic circuit shown in FIG. 7 inside a case 1 consisting of a cooling block 3 and a case body 4. Regarding the mounting, for example, a plurality of steps having different step amounts H1 and H2 are provided. Then, the AC terminal 6 is on the step surface 5a, the cathode terminal 7 is on the step surface 5b, the anode terminal 8 is on the step surface 5c, and the cathode auxiliary terminal 9 of the GTO thyristor AI (Fig. 7) is on the step surface 5d. Auxiliary terminal 11, snubber circuit SN (8th
Terminals 13 and 14 are arranged in the snubber mounting to which the terminals 13 and 14 are connected. Also, the other GTO thyristor A is on the step surface 5e.
Terminals 15 and 16 are disposed at the snubber mounting to which the cathode auxiliary terminal 10 for 2 (FIG. 17), the gate auxiliary terminal 12, and the snubber circuit SN (FIG. 8) are connected. A nut 17 for connecting to a connecting conductor is arranged on each of the connecting terminals 6 to 16, respectively. Other configurations are
According to this semiconductor device, in which the same parts are given the same reference numerals and their explanations are omitted because they are similar to the conventional example, the cover body 4 is attached to the surface 5.
Since the connecting terminals 6 to 16 are arranged on different stepped surfaces by using the stepped surfaces 5a, 5b, 5c, 5d, and 5e, the flat mounting as in the conventional method is
Compared to the case where the connection terminals 6 to 16 are arranged on the top (Fig. 6), the length of the case 1 in the transverse direction is This makes it possible to reduce the overall size of the device. Further, as shown in FIGS. 3 and 4, an AC terminal 6. Even when wiring the connection bars 18 to 20 for external wiring to the cathode terminal 7 and anode terminal 8, respectively, it is possible to wire the wiring bars 20 and 40 without bending them as in the conventional case, which makes wiring easier. The number of man-hours can be reduced.

Although the above description has given an example in which a GTO thyristor is used as a switching element, the present invention is not limited to this, and similar effects can be expected even if a transistor element or the like is used. . Further, in the above embodiment, the step is formed along the left-right direction in FIG. 1, but depending on the arrangement of the connection terminals, the step may be formed along the up-down direction in FIG. Steps may be formed along both the left-right direction and the up-down direction in FIG. Furthermore, the step amount H1 for forming the step
, H2 may also be adjusted as needed.

〔Effect of the invention〕

As described above, according to the semiconductor device of the present invention, at least some of the connection terminals having mutually different electrical polarities are arranged on different stepped surfaces of the case surface, so when each connection terminal is arranged on a flat surface, Compared to this, the length of the case in the transverse direction can be shortened while ensuring sufficient insulation distance and creepage distance between the connection terminals, making it possible to downsize the device. Furthermore, wiring work between the wiring bars for external connection connected to each connection terminal can be easily performed while ensuring an appropriate insulation distance between the wiring bars by utilizing the step.

[Brief explanation of drawings]

FIG. 1 is a plan view of a semiconductor device according to an embodiment of the present invention, FIG. 2 is a front view thereof, FIG. 3 is a plan view showing a state in which wiring bars are connected to the semiconductor device, and FIG. 5i is a plan view of a conventional semiconductor device, FIG. 6 is a front view thereof, FIG. 7 is a circuit diagram showing an electronic circuit built into the semiconductor device, and FIG. 8 is a snubber circuit 9 is a plan view showing a state in which wiring bars are connected to a conventional semiconductor device, and FIG. 10 is a front view thereof. In the figure, 1 is a cover, 5 is a mounting surface, 5a, 5b
, 5c, 5d, 5e are stepped surfaces, 6 is an AC terminal, 7 is a cathode terminal, 8 is an anode terminal, 9 and 10 are cathode auxiliary terminals, 1
1.12 is the gate auxiliary terminal, 13 to 16 are the snubber mounting terminals, AI, A2 is the GTO thyristor, A3. A4 is a flywheel diode. Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims (1)

[Claims] (1) In a semiconductor device in which an electronic circuit composed of semiconductor elements is housed inside a case, and a plurality of connection terminals of the electronic circuit are arranged on the outer surface of the case, a step is formed on the outer surface of the case. A semiconductor device characterized in that at least some of the connection terminals having different electrical polarities are arranged on different step surfaces.