JPH02266659A - Read circuit for facsimile equipment - Google Patents

Read circuit for facsimile equipment

Info

Publication number
JPH02266659A
JPH02266659A JP1087442A JP8744289A JPH02266659A JP H02266659 A JPH02266659 A JP H02266659A JP 1087442 A JP1087442 A JP 1087442A JP 8744289 A JP8744289 A JP 8744289A JP H02266659 A JPH02266659 A JP H02266659A
Authority
JP
Japan
Prior art keywords
frequency
processing section
image processing
section
ccd
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1087442A
Other languages
Japanese (ja)
Other versions
JP2830028B2 (en
Inventor
Shigetaka Ogawa
茂孝 小川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP1087442A priority Critical patent/JP2830028B2/en
Publication of JPH02266659A publication Critical patent/JPH02266659A/en
Application granted granted Critical
Publication of JP2830028B2 publication Critical patent/JP2830028B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Facsimile Scanning Arrangements (AREA)
  • Storing Facsimile Image Data (AREA)
  • Facsimile Image Signal Circuits (AREA)

Abstract

PURPOSE:To decrease the nonoperating period of a picture processing section while a CCD is operated with a shift clock having a frequency corresponding to the storage time in response to the luminous quantity of the light source by not making the frequency of the shift clock of the CCD identical to the frequency of a drive clock of the picture processing section but giving a proper ratio to the frequencies. CONSTITUTION:A frequency conversion section 13 comprising of a frequency conversion memory is inserted between a picture processing section 14 and an A/D converter 12 which converts an analog data output of an image sensor section 11 using a charge coupled device(CCD) 10 used as a solid-state image pickup element into a digital multi-value data. Then the ratio of the frequency of a shift clock CLK 1 of the CCD 10 and the frequency of a drive clock CLK 2 of the picture processing section 14 is selected to be a proper value. Thus, the nonoperating period of the picture processing section 14 is reduced while the CCD 10 is operated at the frequency corresponding to the storage time in response to the luminous quantity of the light source.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明はファクシミリ装置に関し、特に原稿を読み取っ
て画像処理を行なう読み取p部の処理能率を高めたファ
クシミリ装置の読み取り回路に関する。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a facsimile apparatus, and more particularly to a reading circuit for a facsimile apparatus in which the processing efficiency of a reading section that reads a document and performs image processing is improved.

(従来の技術) 従来のこの梅のファクシミリ装置の読み取り部は、固体
撮像素子として使用される電荷結合デバイス(以下00
Dとい5)と、OODの出力のアナログ信号をデジタル
多値データに変換するアナログデジタル変換部(以下A
/l)変換部という)と、001)出力i A / L
)変換部で変換したデジタル多1直データを入力し画像
信号の処理を行う画像処理部の駆動線、すべて同一周波
数のクロックで行われていた。
(Prior Art) The reading section of the conventional facsimile machine is a charge-coupled device (hereinafter referred to as 000) used as a solid-state image sensor.
D5) and an analog-to-digital converter (hereinafter referred to as A) that converts the analog signal output from the OOD into digital multi-value data.
/l) converter) and 001) output i A/L
) The driving lines of the image processing unit, which inputs the digital multi-single-channel data converted by the conversion unit and processes the image signal, were all clocked at the same frequency.

(発明が解決しよりとする課題) 上述した従来のファクシミリ装置の絖み取り部H,oo
uのシフトクロックと、A/D変換器および画像処理部
の駆動クロックの周阪数が同一なので、処理能力の遅い
部分に早い方が合わぜる必要がある。
(Problem to be solved by the invention) The groove removing portion H,oo of the above-mentioned conventional facsimile machine
Since the frequency of the shift clock of u and the drive clock of the A/D converter and image processing section is the same, it is necessary to match the faster one to the part with lower processing capacity.

一般に、原稿またはO(I Dのいずれかが移動し、あ
る相対速度で走食し読み取vを行うが、00Dの読み取
りライン数と画像として採用するライン数の比(以下サ
ンプル比という)は。
Generally, either the original or O(ID) moves and scans at a certain relative speed to perform reading, but the ratio of the number of read lines of 00D to the number of lines adopted as an image (hereinafter referred to as sample ratio) is:

2対l以±の場合が1:lの場合より画質が良いとされ
ている。ところが、このサンプル死金2対1以上にする
と、見掛は上本来の画像処理部の駆動クロック周波数の
2分の1以下の周波数で画像処理部を駆動していること
となる。したがって〔]ODシフトクロック周波数1に
:、画像処理駆動周波数が同一である従来の装置の読み
取り方式で蝶、サンプル比を2対lあるいは2対l以上
にすると、0OL)が採用しないラインを出力している
期間中画像処理部を有効に使用できないという欠点があ
る。
It is said that the image quality is better when the ratio is 2:l or more than when the ratio is 1:l. However, if the ratio of sample dead money is 2 to 1 or more, the image processing section is apparently driven at a frequency that is one-half or less of the original driving clock frequency of the image processing section. Therefore, if [ ]OD shift clock frequency is 1:, the image processing drive frequency is the same, and the reading method of the conventional device is butterfly, if the sample ratio is 2:1 or more than 2:1, 0OL) will output the line that is not adopted. The disadvantage is that the image processing section cannot be used effectively during this period.

本発明の目的はこのような欠点全解消し、00Df%光
源光量に対応した蓄積時間に対応した周波数で動作させ
ながら、画像処理部の非可動期間を小さくすることがで
きるようなファクシミリ装置の読み取り回路を提供する
ことにある。
The object of the present invention is to eliminate all of these drawbacks, and to provide a reading facsimile device that can operate at a frequency corresponding to the accumulation time corresponding to the light intensity of the 00Df% light source and reduce the non-operating period of the image processing section. The purpose is to provide circuits.

(課題を解決するための手段) 前記の目的を達成するため1本発明のファクシミリ装置
の読み取り方式は%0OD10t−用いたイメージセン
サ部11と、イメージセンサ部11の出力の゛アナログ
データをデジタル多値データに変換するA/D変換器1
2と、前記デジタル多値データに画像処理を施す画像処
理部14を有するファクシミリ装置の読み取り方式にお
いて、入力データの駆動クロック周波数を変換して出力
データの駆動クロックとする周波数変換部13を有し、
A/D変換器12と画像処理部14の間に周波数変換部
13を挿入し。
(Means for Solving the Problems) In order to achieve the above object, the reading method of the facsimile apparatus of the present invention is to use an image sensor section 11 using %0OD10t- and digital multiplication of analog data output from the image sensor section 11. A/D converter 1 converting into value data
2, in a reading method of a facsimile machine having an image processing unit 14 that performs image processing on the digital multivalued data, the facsimile apparatus has a frequency conversion unit 13 that converts a driving clock frequency of input data and uses it as a driving clock of output data. ,
A frequency conversion section 13 is inserted between the A/D converter 12 and the image processing section 14.

周波数変換部13に入力し友前記デジタル多値データを
出力するとき、クロック周波数を前記画像処理部駆動ク
ロックの周波数に変えて出力する回路構成とする。
When the digital multivalued data inputted to the frequency conversion section 13 is outputted, the circuit configuration is such that the clock frequency is changed to the frequency of the image processing section driving clock and outputted.

(実 施例) 次に、本発明について図面を参照して説明する。(Example) Next, the present invention will be explained with reference to the drawings.

m1図は、本発明の一実施例を示す回路略図である。Figure m1 is a schematic circuit diagram showing one embodiment of the present invention.

第1図に示すように1本実施例は、001)10を使用
するイメージセンサ部11のアナログデータ出力を、デ
ジタル多値データに変換するA/L)変換器12と画像
処理部14の間に周波数変換用メモリからなる周波数変
換部13が挿入されている。
As shown in FIG. 1, in this embodiment, an image processing unit 14 is provided between an A/L converter 12 that converts the analog data output of an image sensor unit 11 using 001) 10 into digital multi-value data, and an image processing unit 14. A frequency conversion section 13 consisting of a frequency conversion memory is inserted in the .

第1図においてC0D10のシフトクロック1!:、A
/D変換器12のサンプルクロックは。
In FIG. 1, shift clock 1 of C0D10! :, A
The sample clock of the /D converter 12 is:

同一の周波数(図中の0LKIの周波数)t′ある。The same frequency (0LKI frequency in the figure) t' exists.

A/D変換器12で変換されたデータt−%A/Dlj
Jk器12のサンプルクロックと同じ周波数で周波数変
換用メモリ13に書き込む。この周波数変換用メモリ1
3に書き込まれたデータを1画像処理部14の駆動クロ
ック(図中0LK2)と同じ周波数で読み出し1画像処
理部14に入力する。
Data t-%A/Dlj converted by A/D converter 12
It is written into the frequency conversion memory 13 at the same frequency as the sample clock of the Jk device 12. This frequency conversion memory 1
The data written in the first image processing section 14 is read out at the same frequency as the driving clock (0LK2 in the figure) of the first image processing section 14 and inputted to the first image processing section 14.

このよりにして0ODIOのシフトクロック(OLKり
と画像処理部14の駆動クロック(OLK2)の周波数
の比を適当な値とすることによって画像処理部14の能
率を上げることができる。
In this way, the efficiency of the image processing section 14 can be increased by setting the frequency ratio of the 0ODIO shift clock (OLK) and the driving clock (OLK2) of the image processing section 14 to an appropriate value.

(発明の効果) 以上説明したように本発明は、読み取り部のA/D変換
器と画像処理部の間にクロックの周波数を変換する周波
数変換部を挿入することによt)、OODのシフトクロ
ックの周波数と画壇象処理部の駆動クロックの周波数を
同一ではなく適当な比にすることができるので%光源光
量に応じた蓄積時間に対応する周波数のシフトクロック
でOODを動作させながら、画像処理部の非可動期間を
小さくできるという効果がある。
(Effects of the Invention) As explained above, the present invention can shift the OOD by inserting a frequency conversion section that converts the clock frequency between the A/D converter of the reading section and the image processing section. Since the frequency of the clock and the frequency of the driving clock of the image processing unit can be set to an appropriate ratio instead of being the same, image processing can be performed while operating OOD with a shift clock of a frequency corresponding to the accumulation time according to the % light intensity of the light source. This has the effect of reducing the period during which the part is not movable.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は1本発明の一実施例を示す回路略図である。 10・・・001)   11・・・イメージセンサ部
12・・・A/L)変換器 13・・・周波数変換部(周波数変換用メモリ)l4・
・・画像処理部
FIG. 1 is a schematic circuit diagram showing one embodiment of the present invention. 10...001) 11... Image sensor section 12... A/L) Converter 13... Frequency conversion section (frequency conversion memory) l4.
・Image processing section

Claims (1)

【特許請求の範囲】[Claims] 電荷結合デバイスを用いたイメージセンサ部と、前記イ
メージセンサ部の出力のアナログデータをデジタル多値
データに変換するアナログデジタル変換器と、前記デジ
タル多値データに画像処理を施す画像処理部を有するフ
ァクシミリ装置の読み取り回路において、入力データの
駆動クロック周波数を変換して出力データの駆動クロッ
クとする周波数変換部を有し、前記アナログデジタル変
換器と前記画像処理部の間に前記周波数変換部を挿入し
、前記周波数変換部に入力した前記デジタル多値データ
を出力するとき、クロック周波数を前記画像処理部駆動
クロックの周波数に変えて出力することを特徴とするフ
ァクシミリ装置の読み取り回路。
A facsimile machine having an image sensor section using a charge-coupled device, an analog-to-digital converter that converts analog data output from the image sensor section into digital multi-value data, and an image processing section that performs image processing on the digital multi-value data. The reading circuit of the device includes a frequency converter that converts a drive clock frequency of input data to use as a drive clock of output data, and the frequency converter is inserted between the analog-to-digital converter and the image processing unit. . A reading circuit for a facsimile apparatus, characterized in that when outputting the digital multi-value data input to the frequency conversion section, the clock frequency is changed to the frequency of the image processing section drive clock before outputting.
JP1087442A 1989-04-06 1989-04-06 Reading circuit of facsimile machine Expired - Lifetime JP2830028B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1087442A JP2830028B2 (en) 1989-04-06 1989-04-06 Reading circuit of facsimile machine

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1087442A JP2830028B2 (en) 1989-04-06 1989-04-06 Reading circuit of facsimile machine

Publications (2)

Publication Number Publication Date
JPH02266659A true JPH02266659A (en) 1990-10-31
JP2830028B2 JP2830028B2 (en) 1998-12-02

Family

ID=13914974

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1087442A Expired - Lifetime JP2830028B2 (en) 1989-04-06 1989-04-06 Reading circuit of facsimile machine

Country Status (1)

Country Link
JP (1) JP2830028B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0511005A2 (en) * 1991-04-26 1992-10-28 Canon Kabushiki Kaisha Image pickup apparatus with a choice of clock pulse generation means

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0511005A2 (en) * 1991-04-26 1992-10-28 Canon Kabushiki Kaisha Image pickup apparatus with a choice of clock pulse generation means
US5825511A (en) * 1991-04-26 1998-10-20 Canon Kabushiki Kaisha Image pickup apparatus

Also Published As

Publication number Publication date
JP2830028B2 (en) 1998-12-02

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