JPH08336073A - Solid-state image pickup device and its drive method - Google Patents

Abstract

PURPOSE: To drive a CCD at a horizontal transfer frequency faster than a frequency by which all signal charges in the horizontal direction are transferred during the horizontal scanning period in compliance with the television signal standards to use an analog format recording solid-state image pickup element for a digital format recording system digital video camera. CONSTITUTION: First and second stop signals 24, 25 are ORed by a CCD horizontal transfer pulse 22 to stop the CCD horizontal transfer pulse 22 for a prescribed time not only for a vertical scanning period 30 at the end of valid picture element transfer of the CCD or around it. An OB level signal 26 of the CCD is normally clamped by using an OB level clamp pulse 21 generated from a horizontal synchronizing signal 20 by adjusting the stop period 31.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state image pickup device used in a digital video camera and a driving method thereof.

[0002]

2. Description of the Related Art In a conventional consumer video camera, a solid-state image sensor (hereinafter referred to as 510HCCD or 768HCCD) in which the number of photoelectric conversion elements called effective pixels is arranged in a horizontal direction of about 510 or 768 is mainly used. Is used for. The number of effective pixels of these two types of CCDs is determined based on the frequency of the analog format recording method. On the other hand, digital format recording type digital video cameras have been developed for high resolution applications in multimedia and VTR systems. Digital format recording system In a digital video camera system, the driving frequency is a multiple of 4.5 MHz, so a CCD with 590 or 710 effective pixels arranged in the horizontal direction.
(Hereinafter referred to as 590HCCD or 710HCCD, respectively) and the like are required.

For example, FIG. 6 schematically shows the structure of a conventional 510HCCD in which 510 effective pixels are arranged in the horizontal direction. In FIG. 6, 1 is a two-dimensionally arranged pixel group, 2 is a vertical transfer unit, 3 is a horizontal transfer unit, and 4 is an output unit. In the horizontal direction, the pixel group 1 is arranged in the order of the effective pixel section 5 and the optical black (hereinafter abbreviated as OB) level pixel section 6 from the side closer to the output section 4. OB level pixel section 6
Is optical black (OB), which is the black reference level for video cameras.
It is provided to detect the level.

The 510HCCD shown in FIG. 6 has about 510 effective pixels and about 28 OB level pixels in the horizontal direction.
Individually arranged. It is necessary to output the signal charges from all these pixels in the horizontal scanning period defined by the television signal standard. Therefore, CCD
The transfer frequency of the horizontal transfer unit is determined by the number of pixels. 5
The horizontal transfer frequency of 10HCCD is about 9.5 MHz in the case of the NTSC recording system. Similarly, 590HCCD
The horizontal transfer frequency of is about 11.3 MHz.

Next, a general driving method of the 510HCCD will be described with reference to FIGS. 6 and 7. In FIG. 6, the signal charge accumulated in the pixel group 1 of 510HCCD for a certain period is read out to the vertical transfer unit 2. Next, in the vertical transfer unit 2, the signal charges are vertically transferred at least one stage in the vertical direction and vertically in the direction of the horizontal transfer unit 3. Horizontal transfer unit 3
Horizontally transfers the signal charges toward the output section 4. Due to the structure of the CCD, the output unit 4 outputs the output signal of the effective pixel unit 5 (hereinafter referred to as the effective pixel signal) as a video signal first, and then the output signal of the OB level pixel unit 6 (hereinafter referred to as O
A B level signal) is output.

FIG. 7 shows the input / output signal voltage waveform of the above conventional CCD. In FIG. 7, the horizontal axis represents time and the vertical axis represents voltage. Further, 7 is a horizontal synchronizing signal conforming to the television signal standard, 8 is an OB level clamp pulse, and 9 is a CC.
Horizontal transfer pulse D, 10 CCD signal output, 11 C
The effective pixel signal charge portion of the CD signal output, 12 is the OB level signal portion of the CCD signal output, 13 is the vertical transfer period of the CCD, and 14 is the OB level clamp period by the OB level clamp pulse.

As shown in FIG. 7, the horizontal transfer is stopped during the vertical transfer period 13 of the CCD, and the CCD signal output 10 is not output. Then, in synchronization with the horizontal transfer pulse 9, CC
The effective pixel signal charge portion 11 and the OB level signal portion 12 of D are transferred and output. The OB level clamp pulse 8 is created in accordance with the OB level signal portion 12 by counting the horizontal synchronizing signal 7 as a reference. The OB level signal portion 12 is kept at O for a certain period (OB level clamp period 14).
By clamping with the B-level clamp pulse 8, the black reference level of the video signal is obtained every horizontal scanning period.

[0008]

As an example of substituting a conventional analog video camera CCD for a digital video camera, consider a case where the 510HCCD is driven by a system clock of 590HCCD, for example. As described above, in the case of the NTSC recording system, the horizontal transfer frequency of 510HCCD is about 9.5MHz, and 590HCCD
The horizontal transfer frequency of is about 11.3 MHz. Therefore, when the 510HCCD is driven at a frequency of about 11.3 MHz, signal charges in the horizontal direction are transferred at a speed of about 1.2 times. The input / output signal voltage waveform in this case is shown in FIG.

As is apparent from FIG. 8, 510HCCD
When the output signal of 590HCCD is driven at the horizontal transfer frequency of 590HCCD, the effective pixel portion 11 of the output signal and the OB level signal subsequent to it are driven by the number of pixels smaller than when the 590HCCD is driven at the original horizontal transfer frequency of 590HCCD. Finish transferring part 12 fast. Therefore, OB
During the OB level clamp period 14 by the level clamp pulse 8, the OB level signal portion 12 has already been transferred, so the OB level signal portion 12 cannot be clamped. As a result, there arises a problem that the black reference level of the video camera output signal is deviated.

When the OB level clamp pulse 8 is moved in order to clamp the OB level signal portion 12, the counting circuit is operated from the previous horizontal synchronizing signal 7 to continue counting throughout the video period. You have to create it. When the counting circuit is operated during the video period, in the conventional counting circuit represented by the ring counter, the number of flip-flop operations of each counting stage for the rising and falling of the counting clock used, that is, the number of simultaneous changes is Since they are different, variations in current consumption with time with respect to the clock of the counting circuit occur. This variation is CC
This affects D and causes a problem that noise or the like occurs in the video signal.

The present invention has been made to solve the above problems, and transfers signal charges in the horizontal direction to an output portion during a horizontal scanning period defined by the television signal standard of the CCD used. An object of the present invention is to provide a solid-state imaging device capable of outputting an OB level signal of a CCD in accordance with an OB level clamp pulse generated from a horizontal synchronizing signal even when driven at a frequency faster than the available frequency, and a driving method thereof. I am trying.

[0012]

In order to solve the above-mentioned problems, a method of driving a solid-state image pickup device according to the present invention comprises a photoelectric conversion element group arranged two-dimensionally and a signal charge accumulated in the photoelectric conversion element group. And a horizontal transfer unit for horizontally transferring the signal charges transferred from the vertical transfer unit in the order of effective pixel signal charges and optical black level signal charges. A solid-state imaging device having an output section for converting the signal charge transferred from the device into a voltage and outputting the voltage, and a frequency capable of transferring all the pixel signals in the horizontal direction during a horizontal scanning period defined by a television signal standard. Pulse generating means for generating a faster frequency, and a first stop signal for counting the vertical scanning period of the solid-state image sensor and stopping the horizontal transfer unit transfer pulse of the solid-state image sensor. The first counting means, the number of simultaneous changes in the rising and falling edges of the counting clock and the load capacitance of each counting stage are uniform, and when the effective pixel signal charge transfer of the solid-state image sensor is completed or near the end of transfer. Second counting means for creating a second stop signal for stopping the horizontal transfer unit transfer pulse of the solid-state image pickup device, an output pulse of the pulse generation circuit, and the first and second stop signals. And a logic means for creating the horizontal transfer unit transfer pulse of the solid-state image sensor.

In the above structure, the pulse generating means,
It is preferable that the first counting means, the second counting means, and the logic means are integrally configured in a circuit. Further, the second counting means includes at least a plurality of JK flip-flops that generate an output as a counting circuit, an AND gate that equalizes the number of simultaneous changes of the plurality of flip-flops, and the plurality of flip-flops. It is preferable that the gray code type counting circuit includes an AND gate that makes the output load capacitances of the above 1) uniform. Alternatively, it is preferable that the second counting means is configured separately from the pulse generating means, the first counting means and the logic means.

On the other hand, in the method for driving a solid-state image pickup device of the present invention, a vertical transfer section for reading out the photoelectric conversion element group arranged in a two-dimensional manner and the signal charges accumulated in the photoelectric conversion element group and transferring them in the vertical direction. , A horizontal transfer unit that transfers the signal charge transferred from the vertical transfer unit in the horizontal direction in the order of effective pixel signal charge and optical black level signal charge, and converts the signal charge transferred from the horizontal transfer unit into a voltage A solid-state image sensor having an output section for outputting the signal in the horizontal direction at a frequency faster than a frequency capable of transferring the signal charge in the horizontal direction to the output section during the horizontal scanning period defined by the television signal standard. In addition to transferring the signal charges by the horizontal transfer unit and stopping the transfer of the horizontal transfer unit during the vertical scanning period, when the transfer of the effective pixel signal charges of the solid-state imaging device is completed or completed. After said transfer of the horizontal transfer unit stops a predetermined period in the near, the optical black level signal charges again transferred by the horizontal transfer portion in accordance with the optical black level clamp signal, output from the output unit.

[0015]

According to the solid-state image pickup device and the method of driving the same of the present invention configured as described above, the horizontal transfer pulse of the CCD is added to the vertical scanning period, and at the end of transfer of the effective pixels of the CCD or at the vicinity thereof for a certain period. By stopping and adjusting this stop period, even if the horizontal transfer frequency of the CCD is faster than the frequency capable of transferring all the signal charges in the horizontal direction during the horizontal scanning period defined by the television signal standard, By the OB level clamp pulse created from the synchronization signal,
The OB level signal of the CCD is normally clamped. Therefore, the black reference level of the video camera output signal does not shift.

Also, pulse generating means, first counting means,
By integrally configuring the circuit of the second counting means and the logic means, the integration degree of the solid-state imaging device is improved. Further, the second counting means includes at least a plurality of JK flip-flops that generate an output as a counting circuit, an AND gate that makes the number of simultaneous changes of the plurality of flip-flops uniform, and a plurality of the flip-flops. By using a gray code type counting circuit including an AND gate that makes the output load capacitance uniform, the number of simultaneous changes in each counting stage and the load capacitance become the same with respect to the reference clock, and even when the effective pixel signal charge is being transferred. The power consumption is uniform, and no noise is generated in the video signal.

Alternatively, by configuring the second counting means in a circuit separately from the pulse generating means, the first counting means and the logic means, the number of simultaneous changes in each counting stage of the second counting means and the load capacitance are increased. Even if the change occurs, the change in the power consumption by the second counting means does not affect the power consumption of the solid-state imaging device. Therefore, even when the effective pixel signal charge is being transferred, the power consumption becomes uniform, and noise or the like does not occur in the video signal.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of the solid-state image pickup device and the driving method thereof according to the present invention will be described below with reference to FIGS. FIG. 1 is a diagram showing the configuration of the CCD horizontal transfer pulse creation unit 15 in the solid-state imaging device of the first embodiment. The other structure is substantially the same as that of the conventional example shown in FIG. In FIG. 1, CC
The D horizontal transfer pulse generation unit 15 includes a pulse generation circuit 16,
It comprises a first counting circuit 17, a second counting circuit 18 and a logic circuit 19.

FIG. 2 shows input / output signal voltage waveforms in the solid-state image pickup device of the first embodiment and its driving method. Figure 2
20, a horizontal sync signal, 21 an OB level clamp pulse, 22 a horizontal transfer unit transfer pulse of the solid-state image pickup device (hereinafter referred to as CCD horizontal transfer pulse), and 23 C
CD signal output, 24 is a first stop signal which is a pulse signal output of the first counting circuit 17, and 25 is a second counting circuit 18
2nd stop signal which is a pulse signal output of
Effective pixel signal charge portion of signal output, 27 OB level signal portion of CCD signal output, 28 OB level clamp period, 29 counting operation period of counting circuit 2, 30 horizontal transfer of CCD by first stop signal 24 A pulse transfer stop period, 31 is a horizontal transfer pulse transfer stop period of the CCD by the second stop signal 25.

As shown in FIG. 1, first, the pulse generation circuit 1
According to 6, the horizontal transfer frequency of 590HCCD is 1
Generate a 1.3 MHz pulse. First counting circuit 1
7 counts with the horizontal synchronizing signal 20 as a reference, and outputs a first stop signal 24. The first stop signal 24 stops the CCD horizontal transfer pulse 22 during the vertical transfer period in FIG. The second counting circuit 18 is also provided with a horizontal synchronizing signal 20.
Is counted over the vertical transfer period and video period,
The second stop signal 25 is output. Second stop signal 25
Starts at or near the end of the transfer of the effective pixel signal charge portion 26 in FIG. 2, and stops the CCD horizontal transfer pulse 22 during that period. The logic circuit 19 logically sums the output pulse from the pulse generation circuit 16 and the first and second stop signals 24 and 25, and the horizontal transfer pulse 22 of the CCD.
Is output.

As shown in FIG. 2, the second stop signal 25
Is the OB level signal portion 2 of the CCD signal output 23.
The optimum location 7 is created from the horizontal sync signal 20 O
The high level period is adjusted so that the B level clamp pulse 21 is normally clamped during the OB level clamp period 28. That is, even if the frequency of the CCD horizontal transfer pulse 22 changes, the output position of the OB level signal portion 28 in the CCD signal output 23 can be freely changed by adjusting the second stop signal 25. With this driving method, not only the OB level signal portion 28 can be matched with the OB level clamp period 29 of the OB level clamp pulse 22, but also the place to be clamped can be freely set. This driving method uses 510HCCD
It is effective for a digital video camera system using different CCDs such as a system clock of 0HCCD. The horizontal synchronizing signal 20 and the OB level clamp pulse 21 may be created not only by using the counting circuit of the image pickup apparatus as in the present embodiment but also by using an external counting circuit. Good.

Next, the structure of the CCD horizontal transfer pulse generator 15 in the first embodiment will be described in detail. The second counting circuit 18 shown in FIG. 1 starts counting on the basis of the horizontal synchronizing signal 20, and continues counting during the transfer of the effective pixel signal charge portion 27 which is a video period during the period indicated by 29 in FIG. . In order to eliminate the current fluctuation of the counting circuit during the video period, the second counting circuit 18 has a uniform load capacitance of each counting stage in addition to the number of simultaneous changes of the rising and falling edges of the clock which is the reference of counting. Use a counting circuit.

As an example of the configuration of the second counting circuit 18,
The configuration of the gray code type counting circuit is shown in FIG. In FIG. 3, reference numeral 32 denotes J- which generates an output as a counting circuit.
Each counting stage of the K flip-flop, 33 is an AND gate that makes the number of simultaneous changes of each flip-flop of the counting stage 32 uniform, 34 is an AND gate that makes the output load capacitance of each flip-flop of the counting stage 32 uniform, and 35 This is the counting output of this counting circuit (see ** patent application No. 2-11943:
This application should have been published already, so please enter the publication number).

Further, the current consumption distribution in the second counting circuit 18 and the current consumption distribution in the conventional counting circuit (not shown) will be compared with reference to FIG. 4A is a schematic diagram of a current consumption distribution with respect to a clock serving as a reference for counting in a conventional counting circuit, and FIG.
FIG. 4 is a schematic diagram of a current consumption distribution with respect to a clock serving as a reference for counting in the gray code type counting circuit shown in FIG. 3. The horizontal axis represents counting time and the vertical axis represents current consumption. FIG.
As shown in (a), in the conventional counting circuit, the current consumption changes according to each counting stage, but in the gray code type counting circuit shown in (b), the consumption current is changed regardless of each counting stage. It can be seen that the current is constant.

The first counting circuit 17 shown in FIG. 1 starts counting with the horizontal synchronizing signal 20 as a reference, creates the horizontal transfer stop period 30 in FIG. 2, and prevents the generation of noise during the video period. Then, the counting is stopped before the effective pixel signal charge portion 27 of the CCD is transferred. Since the gray code type counting circuit has the same number of simultaneous changes and the same load capacitance of each counting stage with respect to the reference clock, even during the period of the effective pixel signal charge portion 27, uniform power consumption is achieved as shown in FIG. Continue counting operation. This gray code type counting circuit is the second
2 is generated by decoding the output of each counting stage by using the same as the counting circuit 18 of FIG. 2 to generate a horizontal stop signal 25 including the OB level signal 26 of the CCD from the rise of the horizontal synchronizing signal 20. Even if the counting operation is performed over the transfer period, since there is no variation in the consumed current, noise or the like does not occur in the video signal. The second counting circuit 18
As long as the effective pixel signal charge portion 27 of the CCD is not affected by noise or the like, a configuration different from the gray code type counting circuit of FIG. 3, for example, a shift register circuit of a reference clock using a large number of flip-flops The same effect can be obtained by using the above.

Next, a second embodiment of the solid-state image pickup device of the present invention will be described with reference to FIG. Figure 5 wave, second
It is a figure which shows the structure of the CCD horizontal transfer pulse production | generation part 38 in the solid-state imaging device of the Example of FIG. The other structure is similar to that of the first embodiment, and the description thereof is omitted. In FIG. 5, the CCD horizontal transfer pulse generation unit 38
Is a pulse generation circuit 39, a counting circuit 40, a logic circuit 41.
It is equipped with. A counter circuit (not shown) corresponding to the second counter circuit in the first embodiment is provided outside,
The second stop signal 25 is the CCD horizontal transfer pulse generation unit 38.
Input from outside. In the second embodiment, the signal voltage waveform of the solid-state image pickup device is similar to that of the first embodiment, the counting circuit 40 outputs the first stop signal 24, and the logic circuit 41 transfers the CCD horizontal transfer. The pulse 22 is output.

In the second embodiment shown in FIG. 5, since the second counting circuit (not shown) for counting the video period is provided outside the CCD horizontal transfer pulse creating section 38, the counting circuit during the video period is provided. And so on. Therefore, there is no variation in current consumption, and it is possible to prevent noise from occurring. The circuit for creating the second stop signal 25 may have any configuration as long as it is as shown in FIG. Further, the horizontal synchronizing signal 20 and the OB level clamp pulse 21 may be generated by either the counting circuit inside the solid-state imaging device or the external circuit.

[0028]

As described above, according to the present invention, the CCD
Horizontal transfer pulse is added to the vertical scanning period and stopped for a certain period at or near the end of CCD effective pixel transfer, and by adjusting this stop period, the horizontal transfer frequency of the CCD is determined by the television signal standard. The OB level clamp pulse generated from the horizontal synchronizing signal can normally clamp the OB level signal of the CCD even if the frequency is higher than the frequency capable of transferring all the signal charges in the horizontal direction during the horizontal scanning period. . Therefore, the black reference level of the video camera output signal does not deviate, and the 510HC for the consumer video camera of the analog format recording system is used.
A CD, 768HCCD or the like can be used in a digital format recording type digital video camera for high resolution use in multimedia or VTR system.

Also, pulse generating means, first counting means,
By integrally configuring the circuit of the second counting unit and the logic unit, it is possible to improve the degree of integration of the solid-state imaging device, and it is possible to achieve miniaturization of the video camera using the solid-state imaging device. Further, the second counting means includes at least a plurality of JK flip-flops that generate an output as a counting circuit, an AND gate that makes the number of simultaneous changes of the plurality of flip-flops uniform, and a plurality of the flip-flops. By using a gray code type counting circuit including an AND gate that makes the output load capacitance uniform, the number of simultaneous changes in each counting stage and the load capacitance become the same with respect to the reference clock, and even when the effective pixel signal charge is being transferred. The power consumption becomes uniform, and it is possible to prevent noise and the like from occurring in the video signal.

Alternatively, by arranging the circuit of the second counting means separately from the pulse generating means, the first counting means and the logic means, the number of simultaneous changes in each counting stage of the second counting means and the load capacitance are increased. Even if the change occurs, the change in the power consumption by the second counting means does not affect the power consumption of the solid-state imaging device. Therefore, even when the effective pixel signal charge is being transferred, the power consumption becomes uniform, and it is possible to prevent noise or the like from occurring in the video signal.

As a result, it is possible to provide a digital video camera in which the influence of noise on the video signal does not occur, and it is possible to configure a digital video camera system using the CCD which is widely used at present. Therefore, its practical effect is extremely large.

[Brief description of drawings]

FIG. 1 is a CCD of a solid-state image pickup device according to a first embodiment of the present invention.
Diagram showing the configuration of the horizontal transfer pulse generator

FIG. 2 is an input / output signal voltage waveform diagram in the solid-state imaging device and the driving method thereof according to the first embodiment.

FIG. 3 is a diagram showing a configuration of a second counting circuit used in the solid-state imaging device according to the first embodiment.

FIG. 4A is a current consumption distribution diagram of a conventional counting circuit,
(B) is a current consumption distribution diagram of the second counting circuit used in the solid-state imaging device of the present invention

FIG. 5 is a CCD of a solid-state image pickup device according to a second embodiment of the present invention.
Diagram showing the configuration of the horizontal transfer pulse generator

FIG. 6 is a schematic diagram showing a general configuration of a conventional solid-state imaging device.

FIG. 7 is a voltage waveform diagram of an input / output signal in a conventional solid-state imaging device and a driving method thereof.

FIG. 8 shows a conventional solid-state imaging device and its driving method,
Input / output signal voltage waveform diagram when the horizontal transfer frequency of D is set to be higher than the frequency at which all the signal charges in the horizontal direction can be transferred during the horizontal scanning period defined by the television signal standard.

[Explanation of symbols]

1 Pixel Group 2 Vertical Transfer Section 3 Horizontal Transfer Section 4 Output Section 5 Effective Pixel Section 6 Optical Black (OB) Level Pixel Section 7 Horizontal Sync Signal (HD) 8 OB Level Clamp Pulse 9 CCD Horizontal Transfer Pulse 10 CCD Signal Output 11 CCD Effective pixel signal part of signal output 12 OB level signal part of CCD signal output 13 Vertical transfer period of CCD 14 OB level clamp period by OB level clamp pulse 15 CCD horizontal transfer pulse generation part 16 Pulse generation circuit 17 First counting circuit 18 Second counting circuit 19 Logic circuit 20 Horizontal synchronization signal 21 OB level clamp pulse 22 CCD horizontal transfer pulse 23 CCD signal output 24 First stop signal 25 Second stop signal 26 Effective pixel signal portion of CCD signal output 27 CCD signal Output OB level signal part 28 OB level clock Ramp period 29 Counting operation period of second counting circuit 30 Transfer stop period of CCD horizontal transfer pulse by first stop signal 31 Transfer stop period of CCD horizontal transfer pulse by second stop signal 32 Each of JK flip-flops Counting stage 33 AND gate for equalizing the number of simultaneous changes in the counting stage 34 ANDing for equalizing the output load capacitance of the counting stage
Gate 35 Counting output of counting circuit 38 Another embodiment of solid-state imaging device of the present invention 39 Pulse generation circuit 40 Counting circuit 41 Logic circuit

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Masaaki Yamaki 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd.

Claims (5)

[Claims] 1. A photoelectric conversion element group arranged two-dimensionally,
Reading out the signal charges accumulated in the photoelectric conversion element group,
A vertical transfer unit for transferring in the vertical direction, a horizontal transfer unit for transferring the signal charges transferred from the vertical transfer unit in the horizontal direction in the order of effective pixel signal charges and optical black level signal charges,
A solid-state image sensor having an output section for converting the signal charge transferred from the horizontal transfer section into a voltage and outputting the voltage, and during a horizontal scanning period defined by the television signal standard,
Pulse generating means for generating a frequency faster than the frequency capable of transferring all pixel signals in the horizontal direction, vertical scanning period of the solid-state image sensor, and stopping the horizontal transfer section transfer pulse of the solid-state image sensor The first counting means for generating a first stop signal, the number of simultaneous changes of rising and falling of the counting clock and the load capacitance of each counting stage are uniform, and the transfer of the effective pixel signal charge of the solid-state image sensor is completed. Second counting means for generating a second stop signal for stopping the horizontal transfer section transfer pulse of the solid-state image pickup device for a certain period of time or near the end of transfer, an output pulse of the pulse generation circuit, and the first And a second stop signal, which is logically operated to generate the horizontal transfer unit transfer pulse of the solid-state image pickup device. 2. The solid-state imaging device according to claim 1, wherein the pulse generating means, the first counting means, the second counting means, and the logic means are integrally configured as a circuit. 3. The second counting means includes a plurality of JK flip-flops that generate at least an output as a counting circuit, an AND gate that equalizes the number of simultaneous changes of the plurality of flip-flops, and the plurality of the JK flip-flops. 3. The solid-state imaging device according to claim 1 or 2, which is a Gray code type counting circuit including an AND gate for making the output load capacitance of the flip-flop uniform. 4. The solid-state image pickup device according to claim 1, wherein the second counting means is configured separately from the pulse generating means, the first counting means and the logic means. 5. A photoelectric conversion element group arranged two-dimensionally,
Reading out the signal charges accumulated in the photoelectric conversion element group,
A vertical transfer unit for transferring in the vertical direction, a horizontal transfer unit for transferring the signal charges transferred from the vertical transfer unit in the horizontal direction in the order of effective pixel signal charges and optical black level signal charges,
A solid-state imaging device having an output section for converting the signal charge transferred from the horizontal transfer section into a voltage and outputting the voltage, and outputting the signal charge in the horizontal direction during a horizontal scanning period defined by a television signal standard. In addition to transferring all the signal charges in the horizontal direction at a frequency faster than the transferable frequency to the horizontal transfer unit and stopping the transfer of the horizontal transfer unit during the vertical scanning period, After the transfer of the horizontal transfer unit is stopped for a certain period at or near the end of the transfer of the effective pixel signal charges, the optical black level signal charges are transferred again by the horizontal transfer unit in accordance with the clamp signal of the optical black level. And a method for driving a solid-state imaging device that outputs from the output unit.