JPH02263474A - Insulated gate type field effect transistor - Google Patents

Abstract

PURPOSE:To prevent permeation of water from cracks generating in a protecting film, and improve characteristics and reliability of a device itself, by forming a silicon nitride film between a semiconductor layer and insulator. CONSTITUTION:A silicon nitride film 15 is formed so as to cover the following; an ITO 23 surface, an SiXC1-X surface, an N-type silicon semiconductor 21 surface, an intrinsic semiconductor 13 surface, an N-type silicon semiconductor 14 surface, and an ITO 23 surface. Further said film 15 is formed in a region 31 as well as a region 30. After that, further, polyimide resin 16 being an insulator to protect a semiconductor layer is formed; holes for electrodes are formed; a power supply VDD 19, a ground Vss 17 and the anode of an output 18 are manufactured by using aluminum. Since, in this manner, the silicon nitride film 15 is formed between the insulator to protect the semiconductor layer and the semiconductor layer, permeation of water (moisture) from cracks generating in the protecting film, adverse influence on the lower layer semiconductor, etc., can be prevented by the silicon nitride film, and the manufacturing of highly reliable semiconductor Iayer is enabled.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an insulated gate field effect semiconductor device.

Conventionally, the outer surface of an insulated field effect semiconductor device is covered with a protective film made of organic resin or the like for the purpose of protecting the semiconductor layer.

However, water (humidity) may enter through the protective film itself, enter through cracks in the protective film, or affect the underlying semiconductor layer when forming this protective film, causing damage to the semiconductor device itself. This led to deterioration of characteristics and a decrease in trustworthiness.

The present invention aims to solve the above-mentioned problems in an insulated field effect semiconductor device and to improve the characteristics and reliability of the semiconductor device itself.

Therefore, the present invention provides an insulated gate field effect transistor in which an insulator is formed to protect a semiconductor layer, and in which a silicon nitride film is formed between the semiconductor layer and the insulator. This is what I did.

Because a silicon nitride film is formed between the semiconductor layer and an insulating material such as an organic resin that protects the semiconductor device, water (humidity) can enter through cracks in the protective film, or the protective film can be damaged. The silicon nitride film can prevent effects on the underlying semiconductor layer that occur during formation.

On the other hand, electrodes on an insulated gate field effect semiconductor (hereinafter referred to as FIET) having N (source), I (channel forming region), N (drain) or PIF junction also have the following characteristic structure.

Conventionally, it has been known to form aluminum on P- or N-type amorphous silicon of an FET by a vacuum evaporation method. However, if such an electrode made of amorphous silicon and aluminum is heat-treated at 100 to 150'C for about 50 hours, the aluminum migrates into the semiconductor (abnormal diffusion), causing electrical deterioration. For this reason,
In the PI or Nl junction, this aluminum reaches extremely deeply into the PI or Nl junction, deteriorating the junction characteristics.

For this reason, attempts have been made to form an oxide conductive film on a P- or N-type semiconductor, rather than vacuum-depositing such a metal. That is, for P-type amorphous silicon, tin oxide is used as a light-transmitting conductive oxide film (hereinafter referred to as CTO), and for N-type amorphous silicon, CTO containing indium oxide as a main component, that is, ITO (tin oxide 10
Attempts have been made to bring oxidized indium (indium oxide added in an amount of less than % by weight) into close contact with each other. Furthermore, if necessary, this C
A method of forming reflective metals such as aluminum or silver on TO is known.

With a structure like this, even if manufactured at 150"C, the
Until 00 hours, deterioration of electrical characteristics could be prevented to within 10%. However, after 500 to 2000 hours, for example, in PVC with PIN junction, the initial efficiency was 8.3% (1,05 crfl), but the amount of change was 5% (500 hours) to 25% ( 2000 hours) characteristic deterioration (decrease) occurred.

A detailed study of the cause revealed that a thin layer of silicon oxide was formed at the interface between the amorphous semiconductor in the P or N region and the CTO. In particular, PSG (phosphorus glass) is used for N-type amorphous silicon, and BSG (boron glass) is used for P-type amorphous silicon.
is formed. These glasses ultimately have insulating properties, and this was found to be the cause of the deterioration of characteristics.

Since amorphous silicon is chemically more unstable and more reactive than crystalline semiconductors, it has been found that these deteriorations are unique to amorphous semiconductors.

Furthermore, when a semiconductor having microcrystalline or polycrystalline properties is used instead of amorphous silicon, the amorphous component in the component is approximately 50%.
The reaction between ITO and CTO can be reduced to about 1/2 compared to when only amorphous silicon is used. However, even with this, it still essentially has deterioration characteristics, and a more drastic solution was required.

Therefore, the present invention provides a semiconductor device having a P-type semiconductor and an N-type semiconductor, in which each of the P-type semiconductor and the N-type semiconductor has a structure in close contact with a transparent conductive film. Each of the semiconductors consists of two layers: a silicon non-single crystal semiconductor layer and a silicon carbide semiconductor layer represented by SiC, -X (O<X<1), and the silicon carbide constituting the P-type semiconductor The semiconductor layer is in close contact with an oxide light-transmitting conductive film, and the silicon carbide semiconductor layer constituting the N-type semiconductor is in close contact with a light-transmitting conductive film containing indium oxide as a main component. In other words, a semiconductor having a conductivity type of P or N type and having greater translucency than amorphous silicon, and an electrode of a translucent conductive film having conductivity in close contact with this semiconductor. In order to prevent the formation of an insulator due to a reaction at the electrode-semiconductor interface when bringing them into close contact to form an ohmic contact, P or P, which has a higher translucency than amorphous silicon and has the same conductivity type as the semiconductor, is used between the electrodes and the semiconductor. Six C+-x (0
Silicon carbide represented by
Oxygen constituting O diffuses into silicon and forms PSG and BS.
The formation of G can be prevented, and a highly reliable semiconductor device can be obtained.

The silicon carbide semiconductor represented by Six C+-x (0<x<l) has a sufficient oxygen blocking effect especially when x = 0.95 to 0.8, and its thickness is sufficient to draw tunnel current. A thickness of 100 Å or less (typically estimated to have an average film thickness of 15 to 40) has a sufficient blocking effect. As a result, for example, a photoelectric conversion device without a P■N bond is held at 150''C,
Even after 0 to 2000 hours, the deterioration is 0 to 2% (10
00 hours) to 0 to 3% (2000 hours), and thermal deterioration could be completely eliminated.

In the present invention, the semiconductor in contact with one layer is a non-single crystal semiconductor, and in particular, a microcrystalline or polycrystalline P or N type silicon semiconductor may be used.

In a PI or Nl junction, or when the N-type semiconductor layer is amorphous silicon, its electrical conductivity is 10-7 to 10-'(Ωcm)-', and its activation energy is also 0.3 to 0. It is large at .4eV.

Therefore, the active state of intrinsic or substantially intrinsic I
In order to have an internal electric field at the junction with the type semiconductor,
Such amorphous silicon is insufficient, and furthermore, when attempting to inject light into an I-type semiconductor by transmitting light through this P- or N-type semiconductor, it is required to further reduce light absorption loss in this semiconductor layer.

Therefore, a microcrystalline or polycrystalline P or N type silicon semiconductor was used. This microcrystalline or polycrystalline P or N type silicon semiconductor has an electrical conductivity of 10 tatami to 102 (Ωc
m)-' and also has a light absorption coefficient of, for example, 500 nm.
1xlO5 (Ωcm) and amorphous silicon are 3x
10'(Ωcm)-', it can be reduced to 1/3.

The grain size of such microcrystalline or polycrystalline silicon is 5 to 5, respectively.
200 people and 200-2000 people.

Hereinafter, the present invention will be explained in detail with reference to Examples.

〔Example〕

In FIG. 1, a gate electrode (thickness: 0.2 μm, width: 5 μm) made of N-type silicon was fabricated on a quartz substrate (1) using a first mask. Furthermore, the Dito insulator is oxidized at a temperature of 1100"C in a halogen element atmosphere to a temperature of 300~1200"
Manufactured to the thickness of a person. Furthermore, a P-type intrinsic semiconductor (I-type silicon) (13) in which boron is implanted at a concentration of IPPM is processed using a known plasma vapor phase method or LT CVD method.
The film was manufactured to a thickness of 0.3 μm by the LPCVD method (also referred to as CVD method) and photo-CVD method (low-pressure vapor phase method).

Next, after making silicon oxide to a thickness of 1μ by CVD method,
A photoresist was coated, and a laser beam was irradiated from below to remove the resist except above the gate electrode. Furthermore, the resist was removed, leaving only silicon oxide.

Furthermore, a microcrystalline N silicon semiconductor was formed as (21) to a thickness of 5°0 on these entire surfaces by plasma vapor phase method.
Furthermore, 5iXCτ4 (0<x<1 where x = 0
．． 9) (22) with a thickness of less than iooÅ, here 50
Thicknesses were formed continuously in the same reactor. Furthermore, ITO (23) was formed to a thickness of 50 OA by electron beam evaporation. Thereafter, the silicon oxide was removed by a lift-off method, and both ends of the gate electrode were made approximately coincident with each other to form an N-type semiconductor (21). As a result, the source (12) and drain (14) are connected to the gate electrode (11).
) and Selfaline were formed.

In this case, N (12) I (13) N (14)
Or N(14)! (13) N (20) inverter integrated structure could be constructed.

Thereafter, a passivation film (15) of silicon nitride film was formed. This silicon nitride film (15) covers the surface of ITO (23), the surface of St, C, □ (22), and the surface of N-type silicon semiconductor (2
1) It was formed to cover the surface, the intrinsic semiconductor (13) surface, the N-type silicon semiconductor (14) surface, and the ITO (23) surface. This silicon nitride film (15) is not only formed in the region (30) (but also in the region (31)).
is formed similarly.

This silicon nitride film is produced by photo-CVD using a mercury excitation method by introducing silane and ammonia into a reactor at a temperature of 100 to 300°C, preferably 150 to 250'C, and supplying light energy thereto. It was formed by the method. The silicon nitride film was formed to a thickness of 500 to 1000 layers.

After that, a polyimide resin, such as PIQ (16), which is an insulator that protects the semiconductor layer, is formed to a thickness of about 2 μm, holes for electrodes are made, and a power source (VDD) (19) is formed.
The ground (Vss) (17) and output (18) anodes were made of aluminum.

When drilling this PIQ, input (gate electrode (11),
A hole was also made in the gate electrode (11'') of the load (not shown) to provide an inverter structure.

The silicon nitride film formed as described above is an intrinsic semiconductor (humidity) due to water (humidity) from the resin of the insulator formed subsequently or water (humidity) from cracks generated in the insulator.
3) or other N-type silicon semiconductors. In addition, it not only has an effect on water (humidity), but also can prevent the influence of impurities on the semiconductor layer when forming an insulator that protects the semiconductor layer, and furthermore, the power source (19) and the ground (17),
It is possible to prevent the influence on the semiconductor layer due to impurity diffusion from the anode of the output (18). In particular, intrinsic semiconductors (
The effect of the present invention on the channel forming region 13) is significant.

As is clear from the drawings, the N-type semiconductor has a microcrystalline or polycrystalline structure (21)Six C+-x(
0<x<l) When the FET or IC is composed of a semiconductor (22) and a CTO (23) and is made into such an N-N-CTO junction, even if this FET or IC is left at 150°C for 1000 hours,
No change due to deterioration of FET characteristics was observed, and the reliability was significantly higher than in the conventional case where metal was simply laminated on an N-type silicon semiconductor.

In the present invention, in the above embodiments, an electrode containing indium oxide such as ITO as a main component was fabricated on an N-type non-single crystal semiconductor. However, P-type silicon semiconductor - P silicon carbide (Six
C1-K O<χ<1) It is effective to simultaneously produce an electrode structure using semiconductor-tin oxide CTO.

As described above, in the insulated gate field effect transistor of the present invention, since the silicon nitride film is formed between the insulator that protects the semiconductor layer and the semiconductor layer, water from cracks generated in the protective film can be removed. The silicon nitride film can prevent (humidity) from entering or affecting the underlying semiconductor layer that occurs when forming a protective film. Furthermore, in the electrode structure of a semiconductor device, a crystalline non-single crystal semiconductor with good electrical conductivity is formed in close contact with the type semiconductor, and furthermore, a chemically extremely stable Si is formed on the upper surface of the non-single crystal semiconductor.
xC+-x (0<x<1) silicon carbide is provided, and as a result, it is possible to prevent the formation of an insulating film due to the reaction between the non-single crystal silicon semiconductor and CTO, and it is possible to create a highly reliable semiconductor layer. It has become possible.

[Brief explanation of drawings]

FIG. 1 is a longitudinal sectional view of an integrated structure of an insulated gate field effect transistor using the structure of the present invention. /1 1!

Claims (1)

[Claims] (1) An insulated gate field effect transistor in which an insulator is formed to protect a semiconductor layer, characterized in that a silicon nitride film is formed between the semiconductor layer and the insulator. effect transistor.