JPH02263424A - Chip type solid electrolytic capacitor and manufacture thereof - Google Patents

Abstract

PURPOSE:To inhibit an increase in a leakage current due to the migration of silver in a moisture-containing atmosphere by a method wherein anode and cathode terminals are formed not by use of a conductive paste but by direct formation of a plated-layer and a solder layer on a layer on a surface which forms the terminals. CONSTITUTION:Alumina powder of a mean particle diameter of about 40 to 50mum is sprayed on the surface of an anode lead 2, a lead 2 implanted surface, which inclines to form an anode terminal 14, and the surface of an insulating resin layer 8 on part of the side surfaces of an element and the surfaces are roughened. After that, a sponge impregnated with a butyl acetate solution consisting of an ashing compound of palladium is brought into contact with the roughened surfaces, whereby after being applied on the surfaces, the sponge is thermally decomposed in an atmosphere of 180 to 200 deg.C and palladium powder is adhered. Then, an electroless plating is performed, an element plated layer 11 is formed and moreover, a solder layer 12 is formed thereon to form a the terminal 14. Thereby, as a silver paste is not used for a conductive paste to be used as a base layer of the electroless plated layer, an increase in a leakage current due to the migration of silver in a moisture-containing atmosphere can be prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a chip-type solid electrolytic capacitor and a method for manufacturing the same, and particularly relates to an improvement in the terminal structure.

[Conventional technology]

As shown in Figure 3, a conventional chip-type solid electrolytic capacitor is manufactured by coating a capacitor element manufactured by a known technique with an insulating resin on the entire outer circumferential surface except for the surface facing the anode lead implantation surface, and then implanting the anode lead implantation. It is assembled by forming an anode terminal and a cathode terminal consisting of a conductor layer, a plating layer 29, 30, and a solder layer 31, 32 on the vertical surface and the opposing surface, respectively (see, for example, Japanese Utility Model Publication No. 14673/1983).

[Problem to be solved by the invention]

In the conventional chip-type solid electrolytic capacitor described above, when forming an anode terminal, a conductive paste is applied and cured on the insulating resin layer 26 to form the conductive layers 27 and 28, and then the electroless plating layers 29 and 30 are sequentially applied. , the following problems were found because the solder layers 31 and 32 were formed.

(a) Since silver paste is used as the conductive paste as the base layer of the electroless plating layer, leakage current increases due to migration of silver in a humid atmosphere.

(b) Since the coefficient of thermal expansion of the silver paste as the base layer is more than one order of magnitude larger than that of the tantalum anode lead 2, the connection reliability between the anode lead 2 and the anode conductor layer 27 is low and it easily peels off, resulting in dielectric loss of the capacitor element. increases.

(...) For item (b), in order to maintain the connection reliability between the anode lead 2 and the anode terminal, the connection length between the anode lead 22 and the plating layer 29, which has a close coefficient of thermal expansion and has a reliable connection, is calculated to a certain extent. As a result, the anode lead 22 becomes longer (FIG. 3, 33. Anode protrusion), which increases handling defects during automatic mounting.

(d) Conductive paste) Therefore, when forming the anode conductor layer 27, if a low-viscosity paste is applied, the thickness may vary, or the paste may soak into the insulating resin layer, causing the anode terminal shape to be distorted. Furthermore, it even comes into contact with the cathode terminal. Therefore, since it is necessary to apply a paste with a certain degree of viscosity, the anode conductor layer 27 becomes considerably thicker near the anode lead 2, and the angle θ between the anode terminal and the mounting surface is smaller than the angle between the cathode terminal and the mounting surface. (See Figure 6)
, the "-mus"-7 phenomenon (or Manhattan phenomenon) is likely to occur during surface mounting by reflow.

[Means to solve the problem]

The chip-type solid electrolytic capacitor of the present invention includes an element in which a dielectric oxide film, a semiconductor oxide layer, and a cathode layer are sequentially formed on an anode body made of a valve metal on which an anode lead is planted, and A chip having an insulating resin layer adhered to the outer peripheral surface of the element other than the opposing surface, an anode terminal formed on the insulating resin layer on the anode lead planting surface, and a cathode terminal formed on the surface opposite the anode lead planting surface. In type solid electrolytic capacitors,
When forming at least one terminal, an organic compound solution of a metal catalyst is attached to the terminal forming surface, and then heated and thermally decomposed to fix the metal catalyst, and then electroless plating is performed to form a plating layer. Furthermore, a solder layer is formed thereon to form a terminal.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a sectional view of an embodiment of a chip-type solid electrolytic capacitor according to the present invention.

An anode lead 2 made of tantalum is planted on an anode body 1 in which tantalum powder, which is a metal that has a valve action, is pressure-molded and vacuum sintered, and a water-repellent resin layer 3 is formed near the anode lead. . An oxide film layer 100 is formed on the outer peripheral surface of the anode body 1. Semiconductor oxide layer 4. Graphite layer 50. First conductor layer 5
1. A second conductor layer 52 is sequentially formed. Further, after a coating resin layer 6 is formed near the anode lead 2, a third conductor layer 53 is formed on the outer peripheral surface of the anode body. The first plating layer 7 is sequentially formed.

Next, after an insulating resin layer 8 is formed on the entire outer peripheral surface of the anode body other than the surface opposite to the anode lead implantation surface, a fourth conductor layer 9 and a second conductor layer 8 are formed on the opposite surface to the anode iJ-de implantation surface. Plating layer 10. A cathode terminal 13 made of solder layer 12 is formed. Furthermore, a third layer is placed on the insulating resin layer on the anode lead planting surface and on the anode lead 2.
An anode terminal 14 consisting of a plating layer 11 and a solder layer 12 is formed, and finally the anode lead 2 is cut to form a chip type solid electrolytic capacitor.

Next is a chip-type tantalum solid electrolytic capacitor with such a configuration (external dimensions: length 5.7 mm, !5.0 mm).

2.5 mm thick) The anode lead 2 made of tantalum is pressed and pressed while being embedded in tantalum powder.
After the molded anode body 1 is sintered at high temperature in a vacuum, a water-repellent resin is applied near the anode lead 2 and heated, thereby forming a water-repellent resin layer 3.

Next, the anode body 1 is anodized in a phosphoric acid aqueous solution at an anodizing voltage of about 40 V, and a dielectric oxide film layer 100 made of tantalum oxide film is formed on the entire outer peripheral surface (with a thickness of about 0.05 V).
~0.07 μm). Further, the anode body 1 is immersed in a manganese nitrate solution and then thermally decomposed in an atmosphere of 200 to 250°C to form a semiconductor oxide layer 4 made of manganese dioxide (approximately 20 to 80 μm thick). This immersion and heating are performed multiple times in order to sufficiently fill the pores inside the anode body 1 with manganese dioxide and to form strong and uniform manganese dioxide on the outer peripheral surface of the anode body 1. The aforementioned water-repellent resin 3 is formed to prevent the manganese nitrate solution from adhering to the anode lead 2 in this step.

Next, the anode body 1 is immersed in a mixed aqueous solution of a water-soluble resin and graphite powder, and then dried in an atmosphere of 150 to 200°C to form a graphite layer 5 as a base conductor layer.
0 is formed (approximately 1-2 μm thick). This immersion drying is performed on the semiconductor oxide layer 4 described above and the first conductor layer 5 described below.
This is repeated multiple times to reduce the contact resistance with 1.

Next, the anode body l was immersed in a solution prepared by diluting a conductive paste mainly composed of graphite powder, epoxy resin, inorganic filler, etc. with an organic solvent such as butyl cellosolve.
After drying in an atmosphere of ~200°C to form the first conductive layer 51 (approximately 20 to 50 μm), an anode is added to a solution prepared by diluting a conductive paste mainly composed of graphite powder, acrylic resin, etc. with water. After the body 1 is immersed, it is dried in an atmosphere of 150 to 200°C to form a second conductive layer 52 (
thickness approximately 30-60 μm). Furthermore, after applying polybutadiene resin to the anode lead planting surface using a dispenser,
The coating resin layer 6 is formed by drying in an atmosphere of ~200°C.

Next, graphite powder 10-20%, copper powder 30-50%
%, epoxy resin 15-30%, inorganic filler 2-6%
After immersing the anode body 1 in a solution prepared by diluting a conductive paste consisting of
The third conductor layer 53 is thermally cured in an atmosphere of 200°C.
is formed (about 20-50 μm thick). Note that the copper powder in the third conductor layer 53 has a particle size of about 0.5 μm and acts as a plating catalyst. In addition, the inorganic filler creates unevenness on the surface and has an anchor effect, which will be described later in the first plating layer 7.
It has the effect of increasing the adhesion of the This third conductor layer 53
If the amount of copper powder inside is small, the effect of the plating catalyst will disappear, but if it is too large, it will lead to a decrease in the strength of the layer.
In addition, copper oxidizes in a humid atmosphere, leading to a phenomenon in which resistance increases. Therefore, the solid content of graphite powder, copper powder, epoxy resin, and inorganic filler is 1
Conductive pastes of 9%, 53%, 23%, and 5% were used.

Next, it is immersed in approximately 3.5% hydrochloric acid for 1 to 2 minutes, then washed with pure water, and electroless plating is performed. At this time, the outer circumferential surface of the anode body 1 is covered with the first to third conductor layers and the coating resin layer 6, so that the semiconductor oxide layer 4 made of manganese dioxide and the dielectric oxide film are removed from the gas during the plating reaction. The layer is protected by using, for example, an electroless nickel plating solution (PH of 6 to 7) using dimethylaminoborane as a reducing agent, and
Plating is carried out at ~65° C. for 30 to 40 minutes to deposit approximately 5 μm of nickel plating, forming the first plating layer 7.

After plating, the plate is thoroughly washed with water and then dried in an atmosphere at 120 to 150°C.

Next, while masking the surface opposite to the anode lead planting surface, powdered epoxy resin was electrostatically applied to the outer peripheral surface of the element.
After temporary curing for about 30 seconds in an atmosphere of 0 to 200°C,
Remove the masking and heat in an atmosphere of 100 to 200℃ for 30 minutes.
The insulating resin layer 8 is formed by heating for ~60 minutes and completely curing (thickness: approximately 100 μm).

Next, alumina powder with an average particle size of about 40 to 50 μm is sprayed onto the surface of the anode lead 2, the anode lead planting surface where the anode terminal 19 is to be formed, and the surface of a part of the insulating resin layer 8 on the side surface of the element. After roughening the surface with
Palladium powder is deposited by thermal decomposition in an atmosphere at ℃. The surface of the insulating resin layer 8 is roughened in the third step described below.
This is to increase the adhesion strength with the plating layer 11.

In addition, the palladium powder is only sparsely attached to the insulating resin layer, and the palladium particle size is about 0.01 μm and the palladium powder is about 0.3 p g/crA (about 4 x 10 particles/a).
nt) adhere. Therefore, the adhesion between the roughened insulating resin layer 8 and the third plating layer 11 does not deteriorate. In view of this adhesive strength, it is not preferable to use an amount of palladium powder that is such that the attached palladium particles bond with each other to form a conductive layer.

Since the surface opposite to the anode lead planting surface is masked, no insulating resin layer is formed and the first plating layer 7 is exposed, but it is used when forming the third plating layer on top of it. After applying the conductive paste and pressing the sheet, the fourth conductive layer 9 is formed by heating and curing in an atmosphere of 150 to 200° C. after removing excess paste.
thickness approximately 20-100 μm).

Next, the element is immersed up to the anode lead 2 in the electroless nickel plating solution mentioned above, and plating is performed at 60 to 65°C for 30 to 40 minutes to roughen the fourth conductor layer 9 and the surface, and then deposit palladium on the fourth conductor layer 9. A second plating layer 10. A third plating layer 11 is formed. At this time, there are
Electroless nickel plating does not deposit because there is no copper or palladium to act as a plating catalyst.

After further immersing the element in flux, the solidus line 280~3
Immerse in a 10°C silver-added solder bath (bath temperature 300-350°C).

Next, it is immersed in a 230-280°C eutectic solder bath. A solder layer 12 is formed on the third plating layer, and the cathode terminal 1
3 and an anode terminal 14 are formed.

Finally, the excess anode lead 2 is cut off with a laser to complete the chip-type tantalum solid electrolytic capacitor.

In this example, polybutadiene resin was used as the material for the coating resin layer 6, but this material was used to protect the dielectric oxide layer and the semiconductor oxide layer 4 from gas (mainly hydrogen) generated during the plating reaction. Resins such as epoxy, acrylic, polyester, polyvinyl chloride, polypropylene, and mixed resins thereof may be used.

FIG. 2 is a sectional view of a cathode terminal according to a second embodiment of the present invention.

In this example, unlike the previous example in which electroless nickel plating was performed after thermally decomposing the organic compound of the metal catalyst when deriving the anode terminal, this method was also used when deriving the cathode terminal. I will do it. That is, after forming the insulating resin layer 8, a butyl acetate solution of a palladium 7-synth compound was applied to the anode lead having a roughened surface, the anode lead implanted surface, and the opposing surface in the same manner as in Example 1 to give a coating of 180 to 200%. Palladium is deposited by thermal decomposition in an atmosphere at ℃. Next, the aforementioned 60
The electroless nickel layer, that is, the second plating layer 10. A third plating layer 11 is formed. In this example, since the M4 conductor layer 9 used in the previous example is not used, the cathode terminal 13 can be made thinner by about 20 to 100 μm, which has the advantage of further miniaturizing the chip type solid electrolytic capacitor. There is an advantage of reducing manufacturing costs by reducing the number of constants.

〔Effect of the invention〕

As explained above, the present invention does not use a conductive paste when forming anode and cathode terminals, and forms a plating layer and a solder layer directly on the terminal forming surface layer, so that the following effects can be obtained.

(i) Increase in leakage current due to silver migration in a humid atmosphere is suppressed (see FIG. 4(a)).

(11) The reliability of the connection between the anode lead and the anode terminal is improved, and an increase in dielectric loss during a temperature cycle test is suppressed (see FIG. 4(b)).

(iii) It becomes possible to shorten the anode lead length (see FIG. 4(c)), and handling defects during automatic mounting are reduced.

Gv) The shape of the anode terminal becomes close to the shape of the cathode terminal, and the angle θ between the two and the mounting surface can be made to be approximately the same, so that the tombstone phenomenon (or the man-no-hitter phenomenon) can be suppressed during surface mounting by reflow.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional view parallel to the board mounting surface of a chip-type solid electrolytic capacitor of the present invention (hereinafter abbreviated as a plane cross-sectional view), and FIG. 2 is a cathode of a chip-type solid electrolytic capacitor according to a second embodiment of the present invention. FIG. 3 is a plan sectional view of a terminal, FIG. 3 is a plan sectional view of a conventional chip-type solid electrolytic capacitor, and FIG. Kutzker test (121℃ 2 atm)
Figure 4 is a graph for comparing changes in leakage current at
b) is a graph for comparing changes in dielectric loss during temperature cycle tests (-55°C to 125°C), and Figure 4 (C) is a graph showing the anode lead length (from the anode side layer of the capacitor element to the anode lead tip). FIG. 5 is a side cross-sectional view of the anode portion of FIG. 1 perpendicular to the board mounting surface, and FIG. 6 is a side cross-sectional view of the anode portion of FIG. 3. DESCRIPTION OF SYMBOLS 1... Anode body, 100... Dielectric oxide film layer, 2... Anode lead, 3... Clear water resin layer, 4... ...Semiconductor oxide layer, 50...
...Graphite layer, 51...First conductor layer, 52...Second conductor layer, 53...
...Third conductor layer, 6...Coating resin layer, 7.
...First plating layer, 8...Insulating resin layer, 9...Fourth conductor layer, 10...Second plating layer, 11 ...Third plating layer, 12
...Solder layer, 13...Cathode terminal, 1
4... Anode terminal, 21... Anode body, 2
2... Anode lead, 23... Dielectric oxide film layer, 24... Semiconductor oxide layer, 25...
... Cathode layer, 26 ... Insulating resin layer, 27.
... Anode conductor layer, 28 ... Cathode conductor layer, 29 ... Plating layer, 30 ... Plating layer, 31 ... Solder Layer, 32...Solder layer, 33...Anode protrusion. Agent Patent Attorney Uchihara Shin Houki Concave Houki 4th side (0-) 4th T! II(b) Kaya M(C)

Claims (2)

[Claims] (1) An element in which a dielectric oxide film layer, a semiconductor oxide layer, and a cathode layer are sequentially formed on an anode body made of a valve metal on which an anode lead is planted, and a surface other than the surface on which the anode lead is planted In a chip type solid electrolytic capacitor having an insulating resin layer adhered to the outer peripheral surface of the element, an anode terminal formed on the insulating resin layer on the anode lead planting surface, and a cathode terminal formed on the opposite surface of the anode lead planting surface. . A chip type solid electrolytic capacitor, wherein the anode terminal is constructed by forming a solder layer on an electroless plating layer with the insulating resin layer as a base layer. (2) A step of sequentially forming a dielectric oxide film layer, a semiconductor oxide layer, and a cathode layer on the anode body made of valve metal on which the anode lead is planted, and In the process of depositing an insulating resin layer on the outer peripheral surface of the element, and in forming at least one terminal, the metal catalyst is fixed by attaching an organic compound solution of a metal catalyst to the terminal forming surface and then heating and thermally decomposing it. A method for producing a chip-type solid electrolytic capacitor, the method comprising: forming a plating layer by electroless plating, and then forming a solder layer.