JPH02246231A - Charge coupled type device - Google Patents
Charge coupled type deviceInfo
- Publication number
- JPH02246231A JPH02246231A JP1066403A JP6640389A JPH02246231A JP H02246231 A JPH02246231 A JP H02246231A JP 1066403 A JP1066403 A JP 1066403A JP 6640389 A JP6640389 A JP 6640389A JP H02246231 A JPH02246231 A JP H02246231A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- signal charge
- transfer
- charge transfer
- charge
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000012535 impurity Substances 0.000 claims abstract description 31
- 239000004065 semiconductor Substances 0.000 claims abstract description 15
- 239000000758 substrate Substances 0.000 claims abstract description 14
- 230000004888 barrier function Effects 0.000 claims abstract description 11
- 230000010354 integration Effects 0.000 abstract description 10
- 238000005468 ion implantation Methods 0.000 abstract description 3
- 238000003384 imaging method Methods 0.000 description 3
- 238000011144 upstream manufacturing Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000005036 potential barrier Methods 0.000 description 1
Landscapes
- Solid State Image Pick-Up Elements (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は電荷結合型デバイス(CCD)に関し、特に、
信号電荷転送方向の集積度を上げた電荷結合型デバイス
に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a charge-coupled device (CCD), and in particular:
This invention relates to a charge-coupled device with increased integration in the direction of signal charge transfer.
従来例の電荷結合型デバイスとして、第4図に示す構造
のものがある。即ち、これは埋込み型CCD (BCO
D)であり、半導体基板1の表面部分に別種類の不純物
層(N−不純物層)2をイオン打ち込みによって形成し
、その上面に複数のゲート電極g、〜g8等を信号電荷
転送方向Xに沿って併設し、これらのゲート電極に例え
ば第5図に示すような4相駆動力式の駆動信号φ1〜φ
4を印加して第4図中の点線にて示すようなボテンシャ
ル・プロフィールを発生させることで信号電荷を転送す
る。A conventional charge-coupled device has a structure shown in FIG. That is, this is a built-in CCD (BCO
D), a different type of impurity layer (N- impurity layer) 2 is formed on the surface of the semiconductor substrate 1 by ion implantation, and a plurality of gate electrodes g, ~g8, etc. are formed on the upper surface in the signal charge transfer direction X. For example, four-phase driving force type drive signals φ1 to φ as shown in FIG.
4 is applied to generate a potential profile as shown by the dotted line in FIG. 4, thereby transferring signal charges.
しかしながら、このような電荷結合型デバイスにあって
は、各ゲート電極を半導体基板の表面に対してほぼ水平
に形成するので、集積度が上がらない問題があった。However, in such a charge-coupled device, since each gate electrode is formed substantially horizontally to the surface of the semiconductor substrate, there is a problem that the degree of integration cannot be increased.
即ち、電荷結合型デバイスは信号電荷の転送効率及びダ
イナミック・レンジ等を考慮した設計を行うためには各
ゲート電極の面積を比較的大きくする必要があると共に
、相互に隣接する転送ピクセル中の信号電荷が転送中に
混合しないようにするためにポテンシャル障壁を発生さ
せるので相互に隣接するゲート電極の側端をオーバーラ
ツプさせる(−例として、第4図中のゲート電極g2の
側端がゲート電極g3の側端にオーバーラツプしている
)必要上、信号電荷転送方向Xの集積度を上げることが
できなかった。In other words, in order to design a charge-coupled device with consideration to signal charge transfer efficiency and dynamic range, it is necessary to make the area of each gate electrode relatively large. In order to prevent charges from mixing during transfer, a potential barrier is generated so that the side edges of adjacent gate electrodes overlap (for example, in FIG. 4, the side edges of gate electrode g2 overlap gate electrode g3). (overlapping with the side edges of the signal charge transfer direction), it was not possible to increase the degree of integration in the signal charge transfer direction X.
又、こうした理由に基づく集積度向上の限界は、例えば
CODを用いた固体撮像デバイスの信号電荷転送路とし
て適用した場合に画素の高密度化の妨げとなっている。In addition, the limitations in improving the degree of integration due to these reasons hinder the increase in pixel density when applied as a signal charge transfer path of a solid-state imaging device using COD, for example.
即ち、フィールド・インターライン・トランスファ型固
体撮像デバイス(FIT−COD)やインターライン型
面体撮像デバイス(IL−COD)等のように、画素に
相当する受光エレメントに隣接して信号電荷転送路を形
成し、これらの受光エレメントに発生した信号電荷を信
号電荷転送路を介して読み出す構造を有する場合には、
受光エレメントを可能な限り微細に形成して画素密度の
向上を図ってみても、上記のゲート電極の設計限界に起
因して転送エレメントの微細製造を行うことができない
ので、結局、低密度のゲート電極のサイズに準じて画素
を製造することとなる。That is, as in a field interline transfer solid-state imaging device (FIT-COD) or an interline surface imaging device (IL-COD), a signal charge transfer path is formed adjacent to a light-receiving element corresponding to a pixel. However, if the structure is such that the signal charges generated in these light-receiving elements are read out via a signal charge transfer path,
Even if we try to improve the pixel density by forming the light-receiving element as finely as possible, it is not possible to perform micromanufacturing of the transfer element due to the design limitations of the gate electrode mentioned above, so in the end, a gate with a low density is used. Pixels are manufactured according to the size of the electrode.
本発明はこのような従来の課題に鑑みて成されたもので
あり、信号電荷転送方向における集積度の向上を図るこ
とのできる電荷結合型デバイスを提供することを目的と
する。The present invention has been made in view of such conventional problems, and an object of the present invention is to provide a charge-coupled device that can improve the degree of integration in the signal charge transfer direction.
このような目的を達成するために本発明は、半導体基板
の上面に信号電荷転送方向に向けて複数のゲート電極を
併設し、これらのゲート電極に駆動信号を印加すること
によって信号電荷を該信号電荷転送方向へ転送する電荷
結合型デバイスにおいて、該信号電荷転送方向に向けて
前記半導体基板の表面に複数の溝部を形成し、これらの
溝部の内側の端面に電荷転送ピクセルに相当する所定濃
度及び種類の不純物層を拡散形成し且つ各不純物層の間
に所定不純物から成る障壁層を形成し、これらの不純物
層の上面に前記ゲート電極を積層し、上記ゲート電極に
前記駆動信号を印加することによって信号電荷を信号電
荷転送方向へ転送する構造とした。In order to achieve such an object, the present invention provides a plurality of gate electrodes on the upper surface of a semiconductor substrate in the direction of signal charge transfer, and applies drive signals to these gate electrodes to transfer signal charges to the signal charge. In a charge-coupled device that transfers charges in the signal charge transfer direction, a plurality of grooves are formed on the surface of the semiconductor substrate in the direction of signal charge transfer, and the inner end faces of these grooves are coated with a predetermined concentration and a concentration corresponding to charge transfer pixels. diffusing different types of impurity layers, forming a barrier layer made of a predetermined impurity between each impurity layer, stacking the gate electrode on the upper surface of these impurity layers, and applying the drive signal to the gate electrode. The structure is such that signal charges are transferred in the signal charge transfer direction.
尚、このような構造から成る電荷結合型デバイスにおい
て、上記溝部の端面に形成した各不純物層を、信号電荷
転送方向に対して高濃度とした濃度分布に設計すること
によって、ポテンシャル勾配を発生させる構造としても
よい。In a charge-coupled device having such a structure, a potential gradient is generated by designing each impurity layer formed on the end face of the groove to have a high concentration distribution in the signal charge transfer direction. It may also be a structure.
このような構造を有する本発明の電荷結合型デバイスに
あっては、信号電荷を転送するための各転送ピクセルを
溝状に形成して、信号電荷転送方向における各ゲート電
極の有効長を長くしたので、集積度を上げても、転送可
能な信号電荷量、換言すれば転送効率及びダイナミック
・レンジを向上することができる。In the charge-coupled device of the present invention having such a structure, each transfer pixel for transferring signal charges is formed in the shape of a groove to lengthen the effective length of each gate electrode in the signal charge transfer direction. Therefore, even if the degree of integration is increased, the amount of signal charge that can be transferred, in other words, the transfer efficiency and dynamic range can be improved.
尚、相互に隣接する上記不純物層の間は、前記障壁層に
よって隔絶されるが、ゲート電極に駆動信号を印加する
と、ポテンシャルの変化によってこれらの障壁層の下層
部を電荷が移動するので、一連の信号電荷転送動作が実
現される。Note that the impurity layers that are adjacent to each other are separated by the barrier layer, but when a drive signal is applied to the gate electrode, charges move in the lower layer of these barrier layers due to a change in potential, so that the impurity layers are separated by the barrier layer. The signal charge transfer operation is realized.
以下、本発明の一実施例を図面と共に説明する。 An embodiment of the present invention will be described below with reference to the drawings.
まず、第1図に基づいて構造を説明すると、同図におい
て、P−型の半導体基板3の表面部分に7字型の電荷転
送ピクセルが形成され、例えば図の左側から右側へこれ
らの電荷転送ピクセルを介して信号電荷が転送される構
造となっている。First, the structure will be explained based on FIG. 1. In the figure, 7-shaped charge transfer pixels are formed on the surface of a P-type semiconductor substrate 3. For example, these charge transfer pixels are transferred from the left side to the right side of the figure. The structure is such that signal charges are transferred through pixels.
即ち、半導体基板3の表面部分には、信号電荷転送方向
に向けて溝部の間隔lが、次式に従って決定され、この
実施例では2く1μm程度の間隔!毎に形成されるでい
る。That is, in the surface portion of the semiconductor substrate 3, the interval l between the grooves in the signal charge transfer direction is determined according to the following formula, and in this embodiment, the interval is about 2×1 μm! It is formed every time.
尚、εは半導体基板の誘電率、Kは絶対温度、NAは半
導体基板の不純物濃度、nlは真正半導体の電子数を表
す。更に、夫々の溝部の内側の端面にはN−型の不純物
層D1〜D5等がイオン注入等の手段によって形成され
、更に、相互に隣接する不純物層DI−D5等の間がP
゛型の不純物層から成る障壁層l5I−136で分離さ
れている。そして、半導体基板の表面に積層された酸化
膜の層S1を介して不純物層D I” D sに対向す
るゲート電極G I−G !1等が積層され、例えば第
5図に示した4層駆動方式の駆動信号φ1〜φ4を印加
するように配線されている。Note that ε represents the dielectric constant of the semiconductor substrate, K represents the absolute temperature, NA represents the impurity concentration of the semiconductor substrate, and nl represents the number of electrons in the genuine semiconductor. Further, N- type impurity layers D1 to D5, etc. are formed on the inner end face of each groove by means such as ion implantation, and furthermore, P is formed between the mutually adjacent impurity layers DI-D5, etc.
They are separated by a barrier layer 15I-136 made of a type impurity layer. Then, a gate electrode GI-G!1, etc., which faces the impurity layer DI''Ds, is laminated via an oxide film layer S1 laminated on the surface of the semiconductor substrate, for example, the four layers shown in FIG. Wiring is performed to apply drive signals φ1 to φ4 of the drive method.
次に、かかる構造を有する実施例の作動を説明すると、
第5図に示すような4層駆動方式の駆動信号φ!〜φ4
を各ゲート電極G1−G5等に順次に印加すると、ゲー
ト電極下の不純物層り、〜D3等のポテンシャル・プロ
フィールが変化して、信号電荷は、所定の転送方向Xへ
順次に転送される。Next, the operation of the embodiment having such a structure will be explained.
The drive signal φ! of the four-layer drive system as shown in FIG. ~φ4
When is sequentially applied to each gate electrode G1-G5, etc., the impurity layer under the gate electrode, the potential profile of ~D3, etc. changes, and the signal charges are sequentially transferred in a predetermined transfer direction X.
この転送時において、駆動信号φ1〜φ4の振幅を約5
ボルトに設定した場合には、各障壁層IS+〜IS6等
の間隔iが約1μm程度であるので、障壁層下の半導体
基板中を信号電荷が通り抜け、上流側の転送ピクセルか
ら下流側の転送ピクセルへ信号電荷が転送されることと
なる。更にゲート電極G+ とG2が設けられて成る転
送ピクセル間の信号電荷転送を代表して説明すれば、第
5図に示す駆動信号φ1が“L′ルベル、φ4が“H1
1レベルとなる時には、不純物JifD+のフェルミ・
レベルに対して不純物ND2のフェルミ・レベルが低く
成るので、障壁ISz間のフェルミ・レベルの差に起因
して信号電荷は図中のQのように移動する。そしてこの
ようなフェルミ・レベルの差は他の転送ピクセルについ
ても駆動信号φ1〜φ4のレベルの変化に従って発生し
、順々に信号電荷が転送されることとなる。During this transfer, the amplitude of the drive signals φ1 to φ4 is set to approximately 5
When set to volts, the interval i between each of the barrier layers IS+ to IS6 is about 1 μm, so the signal charge passes through the semiconductor substrate under the barrier layer and is transferred from the upstream transfer pixel to the downstream transfer pixel. Signal charges will be transferred to. Further, to describe signal charge transfer between transfer pixels provided with gate electrodes G+ and G2 as a representative example, the drive signal φ1 is “L” level and the drive signal φ4 is “H1 level” as shown in FIG.
When reaching the 1st level, the impurity JifD+ Fermi
Since the Fermi level of the impurity ND2 becomes lower than the Fermi level of the impurity ND2, the signal charge moves as shown by Q in the figure due to the difference in the Fermi level between the barriers ISz. Such Fermi level differences also occur in other transfer pixels according to changes in the levels of the drive signals φ1 to φ4, and signal charges are transferred one after another.
このように、この実施例によれば、信号電荷を転送する
ための各転送ピクセルを溝状に形成して、信号電荷転送
方向における各ゲート電極のを助長を長くしたので、集
積度を上げても、転送可能な信号電荷量、換言すれば転
送効率及びダイナミック・レンジを向上することができ
る。As described above, according to this embodiment, each transfer pixel for transferring signal charges is formed in the shape of a groove, and the length of each gate electrode in the signal charge transfer direction is lengthened, thereby increasing the degree of integration. Also, the amount of signal charge that can be transferred, in other words, the transfer efficiency and dynamic range can be improved.
次に、本発明の他の実施例を第2図と共に説明する。尚
、第2図において第1図と同−又は相当する部分を同一
符号で示しており、第1図に示す先の実施例との相違点
を説明すれば、各溝部内側の端面に拡散形成した不純物
層D1〜D5等の不純物濃度を、夫々について信号電荷
転送方向Xの上流側が低く、下流側が高くなるように形
成しである。第2図には、濃度の低い領域をN−1濃度
の低い領域をN゛で示している。Next, another embodiment of the present invention will be described with reference to FIG. In FIG. 2, the same or corresponding parts as in FIG. 1 are indicated by the same reference numerals, and the differences from the previous embodiment shown in FIG. The impurity concentrations of the impurity layers D1 to D5, etc., are lower on the upstream side of the signal charge transfer direction X and higher on the downstream side. In FIG. 2, the low concentration region is indicated by N-1, and the low concentration region is indicated by N'.
このように、各不純物層に濃度勾配を設けると、上流か
ら下流側へ下がるポテンシャル井戸が潜在的に形成され
るので、転送時に信号電荷が残留する等の問題を改善し
て、電荷転送効率の向上を図ることが出来る。又、第3
図に示すような所謂2相駆動方式の駆動信号該φ、、φ
Bを印加して信号電荷転送を行うことが可能となり、転
送ピッチを上げることが可能となるので、実質的な集積
度向上を実現することができる。In this way, by creating a concentration gradient in each impurity layer, a potential well that descends from upstream to downstream is potentially formed, which improves problems such as signal charges remaining during transfer and improves charge transfer efficiency. You can improve your performance. Also, the third
The drive signals of the so-called two-phase drive system as shown in the figure φ, φ
It becomes possible to perform signal charge transfer by applying B, and it becomes possible to increase the transfer pitch, so it is possible to realize a substantial improvement in the degree of integration.
以上説明したように本発明によれば、信号電荷を転送す
るための各転送ピクセルを溝状に形成して、信号電荷転
送方向における各ゲート電極の有効長を長(したので、
転送可能な信号電荷量、換言すれば転送効率及びダイナ
ミック・レンジを向上することができ、集積度の向上を
図ることが出来る。As explained above, according to the present invention, each transfer pixel for transferring signal charges is formed in a groove shape, and the effective length of each gate electrode in the signal charge transfer direction is lengthened.
The amount of signal charge that can be transferred, in other words, the transfer efficiency and dynamic range can be improved, and the degree of integration can be improved.
第1図は本発明の一実施例の構造を示す縦断面図;
第2図は他の実施例の構造を示す縦断面図;第3図は2
相駆動信号のタイミング・チャート;第4図は従来例の
構造を示す縦断面図;第5図は4相駆動信号のタイミン
グ・チャートである。
図中の符号:
D1〜D5 ;不純物層
Si ;酸化膜の層
Is鳳〜IS6 ;障壁層
Gi ””Gs ;ゲート電極
代理人 弁理士(8107)佐々木 清(外3名)Fig. 1 is a vertical sectional view showing the structure of one embodiment of the present invention; Fig. 2 is a longitudinal sectional view showing the structure of another embodiment;
Timing chart of phase drive signals; FIG. 4 is a longitudinal sectional view showing the structure of a conventional example; FIG. 5 is a timing chart of four-phase drive signals. Codes in the figure: D1 to D5; Impurity layer Si; Oxide film layer Is-IS6; Barrier layer Gi ""Gs; Gate electrode agent Patent attorney (8107) Kiyoshi Sasaki (3 others)
Claims (2)
数のゲート電極を併設し、これらのゲート電極に駆動信
号を印加することによって信号電荷を該信号電荷転送方
向へ転送する電荷結合型デバイスにおいて、 前記信号電荷転送方向に向けて前記半導体基板の表面に
複数の溝部を形成し、 これらの溝部の内側の端面に電荷転送ピクセルに相当す
る所定濃度及び種類の不純物層を拡散形成し、且つ各不
純物層の間に所定不純物から成る障壁層を形成し、 これらの不純物層の上面に前記ゲート電極を積層し、 上記ゲート電極に前記駆動信号を印加することによって
信号電荷を信号電荷転送方向へ転送する構造を有する電
荷結合型デバイス。(1) A charge-coupled device in which a plurality of gate electrodes are provided on the top surface of a semiconductor substrate in the direction of signal charge transfer, and signal charges are transferred in the direction of signal charge transfer by applying a drive signal to these gate electrodes. A plurality of grooves are formed on the surface of the semiconductor substrate in the direction of signal charge transfer, and an impurity layer of a predetermined concentration and type corresponding to a charge transfer pixel is diffused on the inner end surface of these grooves, and A barrier layer made of predetermined impurities is formed between each impurity layer, the gate electrode is stacked on the upper surface of these impurity layers, and the signal charge is transferred in the signal charge transfer direction by applying the drive signal to the gate electrode. A charge-coupled device with a transfer structure.
記溝部の端面に形成した各不純物層は、信号電荷転送方
向に対して高濃度とした濃度分布を有することを特徴と
する。(2) In the charge-coupled device according to claim (1), each impurity layer formed on the end face of the groove has a high concentration distribution in the signal charge transfer direction.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1066403A JPH02246231A (en) | 1989-03-20 | 1989-03-20 | Charge coupled type device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1066403A JPH02246231A (en) | 1989-03-20 | 1989-03-20 | Charge coupled type device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH02246231A true JPH02246231A (en) | 1990-10-02 |
Family
ID=13314806
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1066403A Pending JPH02246231A (en) | 1989-03-20 | 1989-03-20 | Charge coupled type device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH02246231A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20030011506A (en) * | 2001-08-03 | 2003-02-11 | 최태현 | Charge coupled device having trench structured electrode |
-
1989
- 1989-03-20 JP JP1066403A patent/JPH02246231A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20030011506A (en) * | 2001-08-03 | 2003-02-11 | 최태현 | Charge coupled device having trench structured electrode |
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