JPH0223644A - Manufacture of mounting board equipped with conduction pin - Google Patents

Manufacture of mounting board equipped with conduction pin

Info

Publication number
JPH0223644A
JPH0223644A JP17436488A JP17436488A JPH0223644A JP H0223644 A JPH0223644 A JP H0223644A JP 17436488 A JP17436488 A JP 17436488A JP 17436488 A JP17436488 A JP 17436488A JP H0223644 A JPH0223644 A JP H0223644A
Authority
JP
Japan
Prior art keywords
conductor
solder
hole
holes
board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17436488A
Other languages
Japanese (ja)
Inventor
Yukihiro Noda
幸宏 野田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ibiden Co Ltd
Original Assignee
Ibiden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibiden Co Ltd filed Critical Ibiden Co Ltd
Priority to JP17436488A priority Critical patent/JPH0223644A/en
Publication of JPH0223644A publication Critical patent/JPH0223644A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/306Lead-in-hole components, e.g. affixing or retention before soldering, spacing means
    • H05K3/308Adaptations of leads
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3447Lead-in-hole components

Abstract

PURPOSE:To allow forces transmitted by forced insertion of the head parts of conduction pins to be relieved by solder layers in through holes and prevent conduction layers in the through holes and a board itself from being damaged by forming the solder layers, thereby inserting compulsorily the heads of the conduction pins in the through holes. CONSTITUTION:Conduction circuits 14 and through holes 12 are formed in a substrate 11 and the inside of the through holes and the necessary upper side of the conduction circuits are coated with solder. Then, conduction pins 20 are inserted in the through holes and are soldered to the side of the substrate 11 by fusing solder in the through holes where the pins 20 are inserted. The mounting board 10 equipped with the conduction pins 20 are manufactured through the foregoing processes.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、導体ピンを有する電子部品搭載用基板、すな
わち基板上の導体回路をスルーホールに挿入した導体ピ
ンを介して外部に電気的に接続するようにした電子部品
搭載用基板の製造方法に関するものである。
Detailed Description of the Invention (Industrial Application Field) The present invention relates to a board for mounting electronic components having conductor pins, that is, a conductor circuit on the board is electrically connected to the outside through conductor pins inserted into through holes. The present invention relates to a method of manufacturing a board for mounting electronic components that is connected to the board.

(従来の技術) 導体ピンを有する電子部品搭載用基板は、その基板に形
成したスルーホール内に導体ピンを強制的に挿入し・て
、この導体ピンとスルーホール内に形成されている導体
層とを接触させ、その後に導体ピン側から基板を溶融半
田内に浸漬する等して導体ピンを基板に固定することに
より形成されているのか一般的である。
(Prior art) A board for mounting electronic components having conductor pins is manufactured by forcibly inserting the conductor pin into a through hole formed in the board, and connecting the conductor pin with the conductor layer formed in the through hole. Generally, the conductor pins are formed by fixing the conductor pins to the substrate by, for example, making contact with the conductor pins and then dipping the substrate into molten solder from the conductor pin side.

ところか、このように、導体ピンをスルーホール内に強
制的に挿入すると、例え部分的てはあっても、スルーホ
ール内に形成されている導体層か剥離・破損し、場合に
よっては基板自体に亀裂が発生することもある。このよ
うになると、電子部品搭載用基板として必要な電気的導
通が確保できなくなることは勿論のこと、基板に生した
亀裂によって導体ピン自体の保持を十分性なうことかで
きず、また各部の腐蝕を助長する原因となることもある
However, if a conductor pin is forcibly inserted into a through-hole in this way, the conductor layer formed inside the through-hole may peel off or be damaged, even if only partially, and in some cases, the board itself may be damaged. Cracks may also occur. When this happens, it goes without saying that it is not possible to ensure the electrical continuity necessary for a board for mounting electronic components, and the conductor pins themselves cannot be held sufficiently due to cracks that have formed in the board, and each part cannot be properly held. It may also promote corrosion.

このような、電子部品搭載用基板として不適切な現象が
生ずるのは、導体ピンをスルーホール内に強制挿入する
からであるか、導体ピンの強制挿込作業はこの種電子部
品搭載用基板の製造において避けて通ることのできない
ものである。近年のように、高密度実装される電子部品
搭載用基板においては、小さな導体ピンを電気的導通を
確保しながら基板に固定するには、スルーホール内に挿
入することが最も効率がよく1作業も容易だからである
This phenomenon, which is inappropriate for a board for mounting electronic components, occurs because the conductor pins are forcibly inserted into the through holes, or the forced insertion of the conductor pins is not suitable for this kind of board for mounting electronic components. This is something that cannot be avoided in manufacturing. In recent years, in electronic component mounting boards that are mounted at high density, the most efficient way to secure small conductor pins to the board while ensuring electrical continuity is to insert them into through-holes in one operation. This is because it is easy.

そこて、発明者等は、導体ピンをスルーホールに挿入す
ることにより基板に固定するという基本作業はそのまま
踏襲して、しかも導体回路や基板自体に悪影響を与えな
いように導体ピンを固定するには如何にしたらよいかを
鋭意研究して、本発明を完成したのである。
Therefore, the inventors decided to fix the conductor pins in a way that would not adversely affect the conductor circuit or the board itself, while still following the basic operation of fixing the conductor pins to the board by inserting them into through holes. After intensive research on how to do this, he completed the present invention.

(発明か解決しようとする課題) 本発明は以上の経緯に基づいてなされたものて、その解
決しようとする課題は、基板のスルーホールに導体ピン
を強制挿入する場合のスルーホール内の導体層や基板自
体の破損である。
(Invention or problem to be solved) The present invention has been made based on the above-mentioned circumstances, and the problem to be solved is to layer a conductor layer in a through-hole in a case where a conductor pin is forcibly inserted into a through-hole in a board. or damage to the board itself.

そして1本発明の目的とするところは、導体ピンをスル
ーホール内に強制挿入しても、スルーホール内の導体層
や基板自体に損傷を与えないようにすることのてきる方
法を簡単な構成によって提供することにある。
One object of the present invention is to provide a simple method for preventing damage to the conductor layer in the through hole or the board itself even if a conductor pin is forcibly inserted into the through hole. It is provided by.

(課題を解決するだめの手段) 以上の課題を解決するために、本発明の採った手段は、
実施例に対応する図面を参照して説明すると、 「基板(11)に形成されたスルーホール(I2)内に
導体ピン(20)を挿入して固定することにより、基板
(11)に形成された導体回路(14)を導体ピン(2
0)を介して外部に接続し得るようにした電子部品搭載
用基板(10)を、次の各工程を経て製造する方法。
(Means for Solving the Problems) In order to solve the above problems, the means taken by the present invention are as follows:
To explain with reference to the drawings corresponding to the embodiments, ``By inserting and fixing the conductor pin (20) into the through hole (I2) formed in the substrate (11), Connect the conductor circuit (14) to the conductor pin (2
0) A method for manufacturing an electronic component mounting board (10) that can be connected to the outside through the following steps.

(イ)基板(11)に導体回路(14)及びスルーホー
ル(I2)を形成する工程; (ロ)スルーホール(12)内及び必要な導体回路(I
4)上に半田をコーティングする工程;(ハ)スルーホ
ール(12)に導体ピン(20)を挿入する工程; (ニ)導体ピン(20)を、これが挿入されているスル
ーホール(12)内の半田を溶融することによって、基
板(11)側に半田付する工程。」である。
(a) Step of forming the conductor circuit (14) and through hole (I2) on the substrate (11); (b) Step of forming inside the through hole (12) and the necessary conductor circuit (I)
4) Coating solder on the top; (c) Inserting the conductor pin (20) into the through hole (12); (d) Inserting the conductor pin (20) into the through hole (12) into which it is inserted. A process of soldering to the substrate (11) side by melting the solder. ”.

すなわち、本発明においては、電子部品搭載用基板(1
0)を構成する基板(11)のスルーホール(12)内
に予しめ半田層(15)を形成しておき、その後にこの
スルーホール(12)内に導体ピン(20)の頭部(2
1)を強制挿入して、このスルーホール(12)内の半
田層(15)を溶融することにより、導体ピン(20)
を有する電子部品搭載用基板(10)か形成されるもの
である。
That is, in the present invention, an electronic component mounting board (1
A solder layer (15) is formed in advance in the through hole (12) of the substrate (11) constituting the circuit board (11), and then the head (2) of the conductor pin (20) is formed in the through hole (12).
1) and melt the solder layer (15) in this through hole (12), the conductor pin (20)
An electronic component mounting board (10) is formed.

この場合、半田のコーティング、すなわち、特にスルー
ホール(12)内における半田層(15)の形成は種々
な方法が適用てきるものてあり、代表的には、半田メツ
キによって半田層(15)を形成する方法、基板(11
)を溶融半田槽内に浸漬する方法、あるいは半田ペース
トをスルーホール(12)内に塗り込む方法等が適用さ
れる。
In this case, various methods can be applied to the solder coating, that is, the formation of the solder layer (15) in the through hole (12) in particular, and typically, the solder layer (15) is formed by solder plating. Method of forming a substrate (11
) in a molten solder bath, or applying solder paste into the through holes (12).

(発明の作用) 以上の本発明に係る方法が適用されると、特に導体ピン
(20)の頭部(21)がスルーホール(12)内に強
制挿入されるに際して、このスルーホール(12)内に
予じめ形成されている半田層(15)によって導体ピン
(20)の頭部(21)はスルーホール(12)内の導
体層(13)や基板(11)自体に損傷を与えることな
く挿入されるのである。半田層(15)を構成している
半田は、別に溶融しなくても、銅やニッケルに比べそれ
自体十分軟質てあって、導体ピン(20)を暫時保持す
るために導体ピン(20)の頭部(21)がスルーホー
ル(12)内に強制的に挿入されても、スルーホール(
12)内の導体層(13)や基板(11)が破損する前
に塑性変形するからである。
(Function of the Invention) When the method according to the present invention described above is applied, especially when the head (21) of the conductor pin (20) is forcibly inserted into the through hole (12), the through hole (12) The head (21) of the conductor pin (20) is prevented from damaging the conductor layer (13) within the through hole (12) or the board (11) itself due to the solder layer (15) previously formed therein. It is inserted without any problem. The solder constituting the solder layer (15) is soft enough in itself compared to copper or nickel without being melted, and is used to temporarily hold the conductor pin (20). Even if the head (21) is forcibly inserted into the through hole (12), the through hole (
This is because the conductor layer (13) and the substrate (11) in 12) are plastically deformed before being damaged.

また、スルーホール(12)内に導体ピン(20)の頭
部(21)を挿入した後に、このスルーホール(12)
内の半田層(15)を溶融させるのであるから、このス
ルーホール(12)内の半田層(15)は導体ピン(2
0)の頭部(21)及び鍔部(22)とスルーホール(
12)内の導体層(13)との電気的接続を確実に行な
い、しかもこれによって基板(11)に対する導体ピン
(20)の固定も確実になされるのである。
Also, after inserting the head (21) of the conductor pin (20) into the through hole (12), the through hole (12)
Since the solder layer (15) in the through hole (12) is melted, the solder layer (15) in the through hole (12) is melted.
0) head (21) and flange (22) and through hole (
The electrical connection with the conductor layer (13) in the conductor layer (12) is ensured, and the conductor pin (20) is also securely fixed to the substrate (11).

すなわち、スルーホール(12)内の半田層(15)は
勿論のこと、この半田層(15)に連続してスルーホー
ル(12)の周囲に存在する半田も同時に溶融されるの
であり、このように溶融された半田は、第1図に示すよ
うに、その表面張力等によって導体ピン(20)の頭部
(21)及び鍔部(22)の周囲に集中するのである。
In other words, not only the solder layer (15) inside the through hole (12) but also the solder existing around the through hole (12) following this solder layer (15) is melted at the same time. As shown in FIG. 1, the molten solder concentrates around the head (21) and collar (22) of the conductor pin (20) due to its surface tension.

半田は導電性を有するものであるから、この半田及びス
ルーホール(12)内の導体層(1:])?介して、基
板(11)の導体回路(14)と各導体ピン(20)と
の電気的接続を確実に行なうのである。
Since solder has conductivity, this solder and the conductor layer (1:]) in the through hole (12)? Through this, electrical connection between the conductor circuit (14) of the substrate (11) and each conductor pin (20) is established reliably.

従って、スルーホール(12)内の半田層(15)はそ
の厚さ等を厳しく限定する必要はなく、導体ピン(20
)の頭部(21)かスルーホール(12)内にてILま
る程度てあれば十分てあり、1造上の利点か高いのであ
る。換言すれば、スルーホール((2)内の半田層(1
5)はその後溶融されるものであるから、導体ピン(2
0)を挿入でき、しかも溶融されたとき導体ピン(20
)の基板(11)に対する固定か行なわれる程度の量が
確保されていれば、どのような状態によって形成しても
よいものとなっているのである。
Therefore, there is no need to strictly limit the thickness of the solder layer (15) in the through hole (12), and the conductor pin (20)
) It is sufficient to have a complete IL in the head (21) or through hole (12), which is an advantage in terms of construction. In other words, the solder layer (1) inside the through hole ((2)
5) is to be melted afterwards, so the conductor pin (2)
0) can be inserted, and when it is melted, the conductor pin (20
) can be formed in any state as long as a sufficient amount is secured to ensure fixation to the substrate (11).

なお、導体ピン(20)の頭部(21)か挿入された後
の半田層(I5)を溶融する場合、吹下の実施例にて説
明するように、各導体ピン(20)にて基板(11)を
支持して高熱オイル内に漬けられる治具板(30)を採
用すれば、導体回路(14)上の半田バンプ(16)等
の溶融させたくない半田を溶融しないで、半田層(15
)のみを溶融できるものである。
In addition, when melting the solder layer (I5) after the head (21) of the conductor pin (20) is inserted, as explained in the example below, each conductor pin (20) By using a jig plate (30) that supports (11) and is immersed in high-temperature oil, it is possible to avoid melting the solder that you do not want to melt, such as the solder bumps (16) on the conductor circuit (14), and prevent the solder layer from melting. (15
) can only be melted.

(実施例) 次に、本発明を、図面に示した実施例に従って詳細に説
明する。
(Example) Next, the present invention will be described in detail according to an example shown in the drawings.

まず、第2図に示すように、基板(1■)にトリル等に
よって所定径(本実施例にあっては直径0゜6■1m)
の穴を明け、第3図に示すように、これら各穴内及び基
板(11)表面に所定厚さ(本実施例においては0.O
1+m■)の銅メツキを施して、基板(【1)の表裏の
導通な確保するスルーホール(12)を形成する。すな
わち、この場合、トリル加工によって形成した穴内には
導体層(I3)か形成されているのである。このように
、基板(11)lに形成した銅メツキに対して所定のエ
ツチングを施すことにより、第4図に示すように、基板
(11)上に導体回路(I4)を形成するのである。
First, as shown in Fig. 2, the substrate (1) is drilled to a predetermined diameter (in this example, the diameter is 0°6x1 m) using a trill or the like.
holes to a predetermined thickness (in this example, 0.0
Copper plating of 1+m■) is applied to form through-holes (12) to ensure conductivity between the front and back sides of the substrate ([1)]. That is, in this case, a conductor layer (I3) is formed within the hole formed by the trilling process. In this way, by performing a predetermined etching on the copper plating formed on the substrate (11)l, a conductor circuit (I4) is formed on the substrate (11) as shown in FIG.

その後、第5図に示すように、所定のソルダーマスク(
17)を施して、このツルターマスク(17)から露出
している部分の銅メツキに対して、第6図に示すように
、半田コーチインクをして、特にスルーホール(12)
内の導体層(13)上に半田層(15)を形成するので
ある。この場合の半田層(15)は、その厚さが50p
Lm程度のものであり、この半田層(15)は半ロ1メ
ツキ法によって形成した。なお、半[ロタツキ法の他、
溶融半田内に基板(11)を浸漬する方法、半田ペース
ト法によりスルーホール(12)内に半田をコーティン
グする方法等が採用される。また、このスルーホール(
12)内の半田層(15)を形成すると同時に、導体回
路(14)の一部上面に半田バンブ(16)を形成して
おく。
Thereafter, as shown in Fig. 5, a predetermined solder mask (
17), and apply solder coach ink to the copper plating exposed from the sinter mask (17), as shown in Figure 6, especially for the through holes (12).
A solder layer (15) is formed on the inner conductor layer (13). The solder layer (15) in this case has a thickness of 50p.
The solder layer (15) was formed by a half-roll plating method. In addition, in addition to the semi-Rotatsuki method,
A method of dipping the substrate (11) into molten solder, a method of coating the inside of the through hole (12) with solder using a solder paste method, etc. are adopted. Also, this through hole (
At the same time as forming the solder layer (15) in 12), a solder bump (16) is formed on a portion of the upper surface of the conductor circuit (14).

そして、以上のように半田層(15)が形成されている
スルーホール(12)内に、第7図に示すように、各導
体ピン(20)をその頭部(21)にて強制挿入し、そ
の後第8図に示すように、半田層(15)を溶融するこ
とによって、導体ピン(20)の頭部(21)及び鍔部
(22)の周囲をこの溶融半田によって隙間なく埋める
のである。なお、ここで挿入した導体ピン(20)は、
特にその頭部(21)の直径か0.48mmのものであ
った。
Then, as shown in FIG. 7, each conductor pin (20) is forcibly inserted with its head (21) into the through hole (12) in which the solder layer (15) is formed as described above. Then, as shown in FIG. 8, by melting the solder layer (15), the area around the head (21) and collar (22) of the conductor pin (20) is filled with the molten solder without any gaps. . The conductor pin (20) inserted here is
In particular, its head (21) had a diameter of 0.48 mm.

本実施例において、スルーホール(12)内の半田層(
15)の溶融は、第9図に示すようにして行なった。す
なわち、各導体ピン(20)が挿入される多数の穴を有
した治具板(30)を用意して、この治具板(30)に
各導体ピン(20)を挿入することにより基板(11)
を支持する。そして、この治具板(30)の基板(11
)とは反対側の面を、210〜260℃に加熱したオイ
ル内に漬けるのである。そうすると、オイル側の熱は各
導体ピン(20)を通してスルーホール(12)内の半
田層(15)に伝導し、これによってスルーホール(1
2)内の半田層(15)が溶融されるのである。この方
法を採用すれば、スルーホール(12)内の半田層(1
5)のみ溶融させて1例えば、導体回路(14)上の半
田バンブ(16)は溶融させないようにすることがてき
るものである。
In this example, the solder layer (
15) was melted as shown in FIG. That is, by preparing a jig plate (30) having a large number of holes into which each conductor pin (20) is inserted, and inserting each conductor pin (20) into this jig plate (30), the board ( 11)
support. Then, the substrate (11) of this jig plate (30)
) is immersed in oil heated to 210-260°C. Then, the heat on the oil side is conducted to the solder layer (15) in the through hole (12) through each conductor pin (20), thereby causing the through hole (1
The solder layer (15) in 2) is melted. If this method is adopted, the solder layer (1
For example, the solder bump (16) on the conductor circuit (14) can be prevented from melting by melting only the solder bump (16) on the conductor circuit (14).

以上のようにして、第1図に示したような導体ピン(2
0)を有する電子部品搭載用基板(10)か完成される
のである。
In the above manner, conductor pins (2
0) is completed.

(発明の効果) 以上説明した通り、本発明においては、上記実施例に例
示した如く、 [(イ)基板(11)に導体回路(14)及びスルーホ
−ル(12)を形成する工程; (ロ)スルーホール(12)内及び′必要な導体回路(
14)上に半田をコーティングする工程;(ハ)スルー
ホール(12)に導体ピン(20)を挿入する工程; (ニ)導体ピン(20)を、これが挿入されているスル
ーホール(12)内の半田を溶融することによって、基
板(11)側に半田付する工程」の各工程を経て導体ピ
ン(20)を有する電子部品搭載用基板(10)を製造
するようにしたので、これにより、導体ピンをスルーホ
ール内に強制挿入しても、スルーホール内の導体層や基
板自体に損傷を与えないようにすることのできる方法を
簡単な構成によって提供することかできるのである。
(Effects of the Invention) As explained above, in the present invention, as exemplified in the above embodiments, [(a) Step of forming a conductor circuit (14) and a through hole (12) on a substrate (11); b) Inside the through hole (12) and 'necessary conductor circuit (
14) Coating the conductor pin (20) with solder; (c) inserting the conductor pin (20) into the through hole (12); (d) inserting the conductor pin (20) into the through hole (12) into which it is inserted. By melting the solder, the electronic component mounting board (10) having the conductor pins (20) is manufactured through the steps of "soldering to the board (11) side". It is possible to provide a method with a simple structure that can prevent damage to the conductor layer in the through hole or the board itself even if the conductor pin is forcibly inserted into the through hole.

すなわち、本発明に係る製造方法においては、スルーホ
ール(12)内に半田層(15)を形成してから導体ピ
ン(20)の頭部(21)を強制挿入するようにしたの
で、この時の力はスルーホール(12)内の半田層(1
5)によって緩和され、スルーホール(12)内の導体
層(13)や基板(11)自体に損傷を発生することは
ないのである。
That is, in the manufacturing method according to the present invention, the head (21) of the conductor pin (20) is forcibly inserted after forming the solder layer (15) in the through hole (12). The force is the solder layer (1) inside the through hole (12).
5), and no damage is caused to the conductor layer (13) in the through hole (12) or the substrate (11) itself.

また、半田層(15)を形成するに際して電気メツキを
採用することができるものてあり、この場合には半田層
(15)として微細なものを形成することができ、近年
の要求である高密度実装に十分対処することができるも
のである。
In addition, electroplating can be used to form the solder layer (15), and in this case, it is possible to form a fine solder layer (15), which is required in recent years to achieve high density. It can be fully implemented.

さらに、半田層(15)の溶融を所謂リフロ一方式によ
って行なうことがてき、従来のように、基板(11)と
導体ピン(20)との固定を溶融半田に浸漬することに
よって行なっていた場合と比較すれば、導体ピン(20
)間での半田ツリツシが発生するのを防止することがて
き、この種の導体ピン(20)を有する電子部品搭載用
基板(10)を確実に製造することかできるのである。
Furthermore, the solder layer (15) can be melted by a so-called reflow method, and when conventionally the board (11) and the conductor pins (20) are fixed by dipping them in molten solder. If compared with the conductor pin (20
), and it is possible to reliably manufacture an electronic component mounting board (10) having this type of conductor pin (20).

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の方法によって製造した導体ビンを有す
る電子部品搭載用基板の部分拡大断面図、第2図〜第8
図は本発明に係る製造方法をT程順に示した部分断面図
、第9図はスルーホール内の半田層を溶融している状態
を示す断面図である。 符  号  の  説  明 10・・・電子部品搭載用基板、11・・・基板、12
・・・スルーホール、13・・・導体層、14・・・導
体回路、15・・・半田層、20・・・導体ピン、30
・・・治具板。 以 上
FIG. 1 is a partially enlarged sectional view of an electronic component mounting board having a conductor bottle manufactured by the method of the present invention, and FIGS.
The figures are partial cross-sectional views showing the manufacturing method according to the present invention in the order of T, and FIG. 9 is a cross-sectional view showing a state in which the solder layer in the through hole is melted. Explanation of symbols 10...Substrate for mounting electronic components, 11...Substrate, 12
... Through hole, 13... Conductor layer, 14... Conductor circuit, 15... Solder layer, 20... Conductor pin, 30
...Jig plate. that's all

Claims (1)

【特許請求の範囲】 基板に形成されたスルーホール内に導体ピンを挿入して
固定することにより、前記基板に形成された導体回路を
前記導体ピンを介して外部に接続し得るようにした電子
部品搭載用基板を、次の各工程を経て製造する方法。 (イ)基板に導体回路及びスルーホールを形成する工程
; (ロ)前記スルーホール内及び必要な導体回路上に半田
をコーティングする工程; (ハ)前記スルーホールに導体ピンを挿入する工程; (ニ)前記導体ピンを、これが挿入されている前記スル
ーホール内の半田を溶融するこ とによって、前記基板側に半田付する工 程。
[Claims] An electronic device in which a conductive circuit formed on the substrate can be connected to the outside via the conductive pin by inserting and fixing a conductive pin into a through hole formed on the substrate. A method of manufacturing a board for mounting components through the following steps. (B) Step of forming conductor circuits and through holes on the board; (B) Step of coating solder in the through holes and on necessary conductor circuits; (C) Step of inserting conductor pins into the through holes; ( d) A step of soldering the conductor pin to the substrate side by melting the solder in the through hole into which the conductor pin is inserted.
JP17436488A 1988-07-12 1988-07-12 Manufacture of mounting board equipped with conduction pin Pending JPH0223644A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17436488A JPH0223644A (en) 1988-07-12 1988-07-12 Manufacture of mounting board equipped with conduction pin

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17436488A JPH0223644A (en) 1988-07-12 1988-07-12 Manufacture of mounting board equipped with conduction pin

Publications (1)

Publication Number Publication Date
JPH0223644A true JPH0223644A (en) 1990-01-25

Family

ID=15977329

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17436488A Pending JPH0223644A (en) 1988-07-12 1988-07-12 Manufacture of mounting board equipped with conduction pin

Country Status (1)

Country Link
JP (1) JPH0223644A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005020418A1 (en) * 2003-08-20 2005-03-03 Thomson Licensing Protection circuit for a power supply unit, and power supply unit with a respective protection circuit
JP2007059481A (en) * 2005-08-22 2007-03-08 Densei Lambda Kk Terminal pin and power supply device using the same
EP3155881A4 (en) * 2014-06-10 2018-03-21 Thomson Licensing Set top box having paste-in-hole tuner shield

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62128553A (en) * 1985-11-29 1987-06-10 Kyocera Corp Manufacture of semiconductor package

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62128553A (en) * 1985-11-29 1987-06-10 Kyocera Corp Manufacture of semiconductor package

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005020418A1 (en) * 2003-08-20 2005-03-03 Thomson Licensing Protection circuit for a power supply unit, and power supply unit with a respective protection circuit
JP2007059481A (en) * 2005-08-22 2007-03-08 Densei Lambda Kk Terminal pin and power supply device using the same
EP3155881A4 (en) * 2014-06-10 2018-03-21 Thomson Licensing Set top box having paste-in-hole tuner shield

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