JPH02232779A - Image rotating device - Google Patents

Abstract

PURPOSE:To execute a rotation processing at high speed even when a rotation angle is large by developing the rotational operation of image data of one word of an original image, in an image area having plural words. CONSTITUTION:The original image for receiving the rotation processing is inputted from an image input part 1 and stored in an image memory 6a. An operator displays the original image on a CRT 4, and inputs a rotation angle thetafrom a keyboard 5. A rotation control part 3a reads out the storage contents from the memory 6a and inputs them to a shift register, and sets/resets a bit set/reset part 3d after an arithmetic processing. In this case, the X (or Y) coordi nate of the leading bit of each line is derived by adding sintheta (or costheta) to the decimal part of a coordinate value of the line before by one and adding +1 when carry is generated. In such a manner, a coordinate after the rotation of a head picture element of each line is obtained. By repeating such an opera tion with regard to each picture element, a rotary image is obtained.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to an image rotation device that creates a rotated image by rotating an original image by a predetermined angle, and particularly relates to an image rotation device that creates a rotated image by rotating an original image by a predetermined angle. The present invention relates to an image rotation device for rapidly transferring pixels of an original image to rotated bit positions.

[Conventional technology]

A conventional device for rotating a black and white binary digital image is disclosed in Japanese Patent Application No. 1983-137837.

This image rotation device converts the coordinates Q (XJI, Y1) after rotation of the angle θ corresponding to each pixel P (J, I) of the original image into χ,,=Jcosθ+Isi. The data of the original image is transferred to the coordinates determined by an arithmetic expression based on nθ ¥,,=−Jstnθ+I cosθ (details will be described later). When synthesizing an original image with a pace image, a bit set/reset circuit is provided to hold a base image to be synthesized, and the base image is input word by word to this circuit to synthesize a rotated image.

[Problem to be solved by the invention]

In the conventional image rotation device described above, rotated pixels are combined with a one-word base image held in the bit set/reset circuit, so the image after rotation is not held in the bit set/reset circuit. If the word straddles a word other than the current word (for example, if the Y coordinate changes by "1")
In this case, it is necessary to replace the contents of the bit set/reset circuit. Therefore, access to the base image memory occurs multiple times in processing the same word. However, the access time for this image memory is several times longer than the operating time for the bit set/reset circuit. Therefore, when the rotation angle is large and the coordinates are updated frequently, the rotation processing time becomes significantly slow.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide an image rotation device that can perform rotation processing at high speed even when the rotation angle is large.

[Means for Solving the Problems] The present invention enables memory interleaving that substantially shortens the access time of an image memory, and includes the following means.

(1) Calculating means This is a means for calculating the rotated X coordinate value and Y coordinate value of each pixel of the original image, and the calculation of each coordinate value is performed by the above-mentioned calculation formula. That is, the coordinate values after rotation are calculated using the rotation angle θ as a parameter based on an arithmetic expression described later.

(2) Bint set/reset circuit This circuit temporarily stores the word of the base image corresponding to the address of the word to be processed in the original image, and multiple words before and after this word, and the contents of this memory are rotated. It is set or re-cented depending on the content of the image. Access to the base image memory can be memory interleaved to store multiple words of the base image.

(3) The control means bit set/reset circuit stores multiple words. If the rotated coordinates of the image data of the selected word in the original image span the coordinates of multiple words in the base image, select the corresponding bit of the corresponding word and set or When the bit set/reset circuit completes processing corresponding to one word of the original image, the plurality of words in the bit set/reset circuit are transferred to the base image memory.

[Effect]

Store the original image in the original image memory. Original image data, for example, one word of data in address order is read out to the shift register. The calculation means calculates the coordinate value after rotation based on the coordinate value of one word and the rotation angle. Meanwhile, the control means reads a plurality of words of image data from the base image memory into the bit set/reset circuit and stores the same. The addresses of these plural words are determined by the address of one word of the original image and the rotation angle.

One word of original image data is synthesized with the base image data of this bint set/reset circuit.

This composition of image data is performed by setting/resetting the base image using the data of the original image, and the bits corresponding to the coordinate values based on the calculation results of the coordinate values of the bits of the original image are combined into multiple words of the base image. Selected from When this bit manipulation is completed for a word of the original image, the combined words of image data are transferred to the previous address in the base image memory. Next, one word of the next address of the original image is read out to the shift register and the same operation is repeated. In this way, the words at all addresses of the original image are processed one word at a time, thereby completing the entire operation.

〔Example〕

FIGS. 1(a), 1(b), and 1(c) show an embodiment of the present invention, in which 1 is an image input unit that reads a document with a CCD or the like, 2 is a CPU that controls the entire device, 3 is an image rotation processing unit that rotates the original image by a specified angle θ;
is a CRT for monitoring images, 5 is an input unit such as a keyboard, 6a and 6b are image memories, 7 is an image output unit for printing out edited images, and 8 is a data path. (
L1) indicates the image rotation processing unit 3, and 3a indicates the rotation processing unit 3.
and a rotation control unit 3b that controls the image memories 6a and 6b.
3c is a timing generation unit that generates coordinate update timing in the X direction, and 3c generates coordinate update timing in the Y direction.
This is a binoto set/recenote unit that performs high-speed bit synthesis in the gaps between transfers to bit positions after 3D rotation, and receives bits at specific positions in the word read from the image memory 6a, and sets the bits of the original image. It is configured with a plurality of bit set/reset circuits that reset and reset according to white and black. (c) indicates a timing generation unit that generates the X, Y coordinate update timing, 10 is a coefficient register that sets the coefficients (sin θ, cos θ) of the calculation formula, and 1l is the offset value of the calculation at the start, or A selector 12 selects and passes the calculation result; 12 is a calculation data register into which the offset value or calculation result of the above-mentioned start calculation is input via the selector 11; and 13 is a calculation unit ( ALU), 1
4 is a flip-flop for holding a carry of the operation result.

FIG. 2 shows the bit set/reset unit 3d described in FIG. Register, 4 tons of multiple binots/7 tons/
A 4-bit word counter for selecting one focus set/reset circuit from among the reset circuits 143 (43-0, 43-15); 42 a word decoder for decoding the count value of the word counter 41; 33
is a 4-bit bit counter that specifies the bit position to be set/reset. Here, the count value of the bint counter 33 corresponds to all bit sets/resets.
is supplied to the component circuit. The output of shift register 32 is also provided to all bit cent/reset circuits.

In such a configuration, when the EN (enable) signal input to the word decoder 42 is turned on, the output of the shift register 32 is set to one bit of one word specified by the word counter 41 and the bit counter 33. Note that the base image is input to the image memory 6b, and the rotated original image is combined with the base image.

Figure 3 shows each bit set}-/reset circuit 4310
-43-15, the BD signal (image data) from the shift register 32 and the decoder enable (D) signal from the word decoder 42 are input, and the count value of the bit counter 33 is decoded. It is set or reset by the send side decoder 34a and the reset side decoder 34b, which specify the bit position. That is, one word of the base image is input bit by bit, and among the input data, the data corresponding to the coordinates after rotation is processed according to the black or white of the bit of the original image specified by the decoders 34a and 34b. For example, 16 pieces of Furi-Fronbu 3 can be used as a set.
6 (36., 36l, 1...-36lS)
The output of the signal state of the flipflop 36 to the image memory 6b is controlled by a 3-state bath sofa 37. In such a point center/recent circuit, one word of the base image is sent to the flip-flop 36 by the LD (load) signal. ,36l,...-1.
---36IS, and the content of the bit position specified by the count value CNTO~3 of the bit counter 33 is the output data of the shift register 32 (B
D) is set or reset according to At this time, one word is selected from a plurality of words by the word decoder 42, and the bit decoder 34. Bits are selected by a and 34b. In this way, the rotation source image is combined with the base image, and the combined image data is ff
It is output to the image memory 6b by the lr signal.

Here, the operations for rotation processing of the original image are shown in Figure 4 (a), (mouth), Figure 5 (a), (mouth), and Figure 6 (a), (mouth).
, (c). As mentioned above, the point P(J, I
) rotated by an angle θ around the origin 0, the point Q (XJI
, YJI) is as follows.

As mentioned above, coordinates are addresses or bit positions, so they can only take integer values. Therefore, Q (X
J I , Y J I ) is expressed as follows.

Xo+=[sin θ+α]X. ,=(2sin a+a) The original image to be subjected to the rotation process is input from the image input section 1 and stored in the image memory 6a. The operator displays the original image on the CRT 4 and inputs the rotation angle θ using the keyboard 5.

The rotation control unit 3a reads out the stored contents in word units from the image memory 6a, inputs them to the shift register 32, and after arithmetic processing, the bit set/reset unit 3d
7t/reset.

Prior to that, in Figure 4 (a), let the coordinates of the beginning of each line be p(o, I) (1 = 0.1.2-...M), and each point will be inverted by θ around the origin O. Let the point rotated clockwise be Q(Xo1, Y0,).

The coordinates of QCXo1, Y 6 I) are determined from the equation (2) by X.
1= (Isin θ+α3, Yo+= (Ico
s e+α]. From this, the X coordinate of the first bit of each line is X. .

= [α] X or = '(I sinθ+α]XoH='
(Msinθ+α] Y coordinate is Y0.=[α] Yo+” (COS θ+α) Yot = (2 cos θ+α]Yo+ =
'( I cos θ+α] YON= '(Mcos θ+α). In other words, for the X coordinate, when sin θ is added to the decimal part of the coordinate value of the previous line and a carry occurs, +
The Y coordinate can be determined by adding cos θ to the decimal part of the coordinate value of the previous line and adding +1 when a carry occurs. In this way, the rotated coordinates of the leading pixel of each line shown in FIG. 4 (opening) can be obtained.

Next, the rotation of pixels in the line (horizontal) direction will be explained with reference to FIGS. Let the values of the decimal part of the coordinates Q (X.I, Y o I) of the head point of the first line obtained earlier be the X and Y coordinates β, , β, respectively. Point P
The coordinate Q (XJI, Y, 1) after rotation of (J, I) is (2
) is expressed as follows.

Coefficient registers 10 of timing generators 3b and 3C that generate coordinate update timing prior to actual processing are
s θ, sin θ, βX,
Set βa. In addition, the X coordinate timing generation section 3b
The arithmetic logic of the ALU 13 of the Y-coordinate timing generator 3c is fixed to ADD, and the arithmetic logic of the ALU 13 of the Y-coordinate timing generating section 3c is fixed to SUB. Furthermore, carry flip-flop 14 is cleared.

As described above, one word of the original image to be rotated is input from the image memory 6a to the shift register 32. Also, the flip-flop 36 is connected to the image memory 6b.

~36lS One word of a predetermined address of the base image is input. FIG. 6(a) shows the original image P stored in the image memory 6a and subjected to rotation processing, and FIG.
(mouth) is an image memory 6 that is combined with the original image P after rotation processing.
The base image stored in b is shown. In this state, using equation (3), the shift register 3
Each pixel of the original image P input in step 2 is calculated. Through this operation, Q (Xji,
Yji) is determined and the flip-flop 36. ~361
, is set or reset. At this time, the count value of the bit counter 33 is decoded by the decoders 34a and 34b, and the flip-flop knob corresponding to Q (Xji, Yji) becomes the flip-flop 36. , 3636. , is selected from. For example, if Q (Xji, Yji) is black, one degree flip-flop 36 is output via the set-side decoder 34a. ~3rd generation is selected and set by inputting a set signal to the S terminal ("0" → "1") or "1" → "1"). On the other hand, if Q(xji..Yji) is white, it is reset ("0" → "0" or rlJ → 'OJ). Here, when a carry occurs in the X-axis direction, the counter 33 is incremented by 1 and the next calculation result is applied to the flip-flop 36 corresponding to the bit increased by 1 in the X-axis direction. On the other hand, if there is a carry in the Y-axis direction, the flip-flop 36 is activated. The contents of .about.361, are returned to the three-state buffer 37, and one word of the next line of the base image is input to flip-flops 3L.about.36, .

When one word is cent or reset based on the above calculation result and the predetermined processing operation is completed, the image memory 6
Returned to b. FIG. 6(c) shows one word W on the image memory 6b. The word W at this address contains the bit part W1 of only the base image and the original image P after rotation into the base image.
has a combined bit portion W2. Bint part WI
Each bit of the flip-flop 36. ~36, , are not set/reset according to the calculation result of the original image P, and each bit of the bit part W2 is set/reset according to the black/white of the bit of the original image P. It has been returned to its original address.

By repeating these operations for each bit, the composite image shown in Figure 6 (c) is obtained. The above explanation is about the set/reset circuit 43. 431, but in the present invention, image data corresponding to a plurality of words is read out from the image memory 6b and a plurality of set/reset circuits 43 are used. ~431s, and perform this operation between multiple words.

Figure 7 shows the case where one word of the original image is rotated approximately 30 degrees by the above operations. As shown in the figure, even if the original image is one word, the rotated image spans seven words in the Y-axis direction, and this tendency becomes stronger as the rotation angle increases.

In the present invention, a plurality of consecutive addresses (for example, address ?-g) of the base image are transferred to the focus set/receiver section 3d by memory interleaving before the rotation process starts, thereby reducing the execution time of memory access. I'm trying.

FIG. 8 shows an example of the access time of this memory interleaving, where (a) shows 1 word access and (g) shows 4 word access by 2-way interleaving. To, Il represents the overhead time until the access starts, TOH■ represents the overhead time when the access ends, and TMA represents the time for the memory access itself. As shown, TO, Il+To, I. =TMA, the access time per word is 2T-a when only one word is accessed, whereas it is reduced to 0.875 TnA, less than half, when accessed with four words interleaved.

FIG. 9 shows the access time when the number of access words is increased under the same conditions as FIG. 8. In the present invention, bit sets each storing one word, 'recent circuit 4
3. The focus/senoto/reset unit 3d is equipped with a plurality of . Therefore, there is no need to perform memory access every time the transfer address of one word is changed in the vertical direction, and bit composition of the rotated image can be performed at high speed. The operation of the present invention will be explained in more detail below.

First, one word of the original image is loaded into the shift register 32, and then a predetermined number of consecutive words are loaded upward or downward (this is determined by the rotation direction) from the start word of the base image in the image memory 6b. is loaded into the bit set/reset section 3d. The processing order of the bits that perform rotation processing is from the left side of the image to the right. For counterclockwise rotation, the destination address is loaded upwards, and for clockwise rotation, the loading destination is downwards. be exposed.

As an initial setting, the bit counter 33 has the start bit position 1 of the word of the base image to be synthesized, while the word counter 41 has the bit set/reset section 3d.
(number of words - 1) of the loaded word is set.

The count values set in the bit counter 33 and word counter 4 are calculated for each pixel of the original image according to the above-mentioned arithmetic expression, and are counted down by 1 each time the composite coordinates are updated. Here, the bit counter 33 corresponds to the X coordinate, and the word counter 41 corresponds to the Y coordinate. If the bit counter 33 or word counter 42 generates a borrow due to the above countdown, the bit position to be synthesized is bit sesoto/
Since this indicates that the number of words other than the multiple words loaded into the reset section 3d is now loaded, the data in the bit set/reset section 3d is transferred to the image memory 6b to be combined, and the words in the next area are bit set. /Load into the reset section 3d. Specifically, when the bit counter 33 generates a borrow, a predetermined number of words in the area on the right are binned, and when the word counter 41 generates a borrow, a predetermined number of words in the area on the upper side are binned.・Seventh/Reset part 3d
Load it into. As the transfer method for accessing the next area, two methods shown in FIGS. 10(a) and 10(a) are selected. In FIG. 3(a), the entire image memory is divided into blocks of a predetermined number of words, and the bint counter 33
When a borrow occurs and the next area is loaded, the bit counter 33 is set to "l5" and the word counter 41 is set to "l5".
will not be changed. When the word count 41 generates a borrow and loads the next area, the word count 4
The initial value is reloaded to 1, and the bit counter 33 is not changed.

On the other hand, in the same figure (b), when the bit counter 33 generates a borrow, the word required for rotation processing is used as a reference in the area to the right of the bit counter 33, and then a predetermined number of words at the upper or lower address is loaded. do. In this case, both the bint counter 33 and the word counter 41 are set to their initial values. In addition, in FIG. 4B, when the word counter 41 generates a borrow, the same procedure as in FIG. Of these two methods, method (a) is easy to control but has a lot of memory transfer loss, and method (a) is complicated to control but has little memory transfer loss.
Moreover, the processing speed is increased, but either method can be applied to the present invention. Note that the next word of the original image is stored in the shift register 32 when the shift register 32 becomes empty.
2 is loaded. The above procedure is performed line by line to rotate all the original images.

The number of words to be transferred using this method is set as follows. That is, when the rotation angle is θ and one word is 16 bits, let M be the maximum value of the number that spans the upper and lower words without moving to the left and right words at the synthesis destination. This M is 16
This is an integer obtained by rounding up X tan θ. In reality, the number of words spanning the top and bottom is a value from 1 to M, depending on the value of the start bit counter at the synthesis destination. When the area transfer method is as shown in FIG. 10(b), if the number of transferred words is set to M, almost all of the transferred words are used for bit synthesis, resulting in the most efficient processing. If the number of transferred words is smaller than M, there will be transferred words that are not used much, as shown in the transfer areas ■ and ■ in Figure lθ (b), and the efficiency will decrease somewhat. however,
Since the effect of memory interleaving is large even when the number of transferred words is other than M, the processing time can be shortened if the number of transferred words is 2 to 4 words. On the other hand, when the transfer method is shown in FIG. 10(a), the optimum number of transfer words changes depending on the start bint count value of the synthesis destination. Regardless of the size of this start bit count value, it is appropriate to set an integer value near the center of 1 to M in order to effectively utilize the transfer word.

In the above embodiment, the number of memory access interleaves is 2.
Although the case of 4-way or 8-way has been described, the apparent access time per word may be further reduced.

In addition, even if interleaved access is not performed, by increasing the number of consecutively accessed words at one time, 1
Since the overhead time at the start or end of memory access per word can be apparently reduced, processing time can be shortened. Furthermore, it is also possible to add a function to disable the decoder on the set side or the decoder on the reset side, and set the result of an AND or OR operation between the original image data and the synthesis destination data at a specified bit position. . Furthermore, the present invention can be applied not only to image rotation but also to drawing, etc., where the access direction is fixed and it is necessary to set/reset bit by bit at high speed.

〔Effect of the invention〕

As explained above, the present invention develops the rotation operation of one word of image data of the original image in an image area having multiple words, so that the apparent memory access time can be shortened and the image data in bint units can be rotated. Composition processing can be performed at high speed.

[Brief explanation of the drawing]

FIG. 1 shows an embodiment of the present invention, (A) is an overall diagram, (C) is a block diagram of the rotation processing section, (C) is an explanatory diagram of the update timing generation section, and FIG. 2 is a bit diagram.・Block diagram showing the set/reset section, Figure 3 is a pronk diagram showing the bit set/recent circuit, Figure 4 (A), (
Figure 5 (A) is an explanatory diagram showing the rotation operation in the X@ direction.
, (opening) is an explanatory diagram showing rotation operation in the Y-axis direction, Fig. 6 (
A), (mouth), and (c) are explanatory diagrams showing image composition;
The figure is an explanatory diagram showing the rotation operation of the image of the l line, and Fig. 8 (
b) is an explanatory diagram of l-word access, the same figure (opening) is an explanatory diagram of two-way interleave access, Fig. 9 is a characteristic diagram showing the number of words and access time in interleave access, and Figs. 10 (a) and (b). ) is an explanatory diagram showing the method of accessing the synthesis destination memo data. Explanation of symbols i 111-1 Image input section 2...1...CP
U3 ---1-1...Rotation processing section 3a--...
---Rotation control section 3b---X-direction timing generation section 3c----Y direction timing generation section 3
d----Bit set/reset section 4-11--CRT 5--Keyboard 6a, 6 b--11--1 image memory 7-・
・・・・・・・One image output section 8-・111～-1-
1.Data bus 10-1.-1--11 coefficient register
11-...Selector 12-...-S
Calculation data register 13--1-ALU 32---Shift register 33---Bit counter 34a--Set side decoder 34b--
・1・・−Reset side decoder 36−・・1・・・−・
...Flip-flop, 3-state buffer word counter... - Word decoder focus set/reset circuit Figure 4 Patent applicant Fuji Zeronox Co., Ltd. Agent Patent attorney Tadao Hirata Figure 5 C》C》1 -・-・1・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・・1 rotation processing unit 3 a ・ ・ ・ 1 rotation control unit 3 b ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・Generation section 3c...-Y direction timing generation section 3d...Bit theft/reset gamma section 4--1-C
RT 5 - - Keyboard 6a - - Image memory 6b - - Image memory 7 - Image output section 8 - - Data path 1G - - Coefficient register 11 -・・・−・−Selector I2−・１・・・１ Arithmetic data register l3−・・・−
・ALU 14-・-・・・・Flip-flop 6a Image memory 6b Image memory (A》 Figure 6 c)

Claims (1)

[Scope of Claims] An image rotation device that creates a rotated image by rotating an original image by a predetermined angle, comprising: a calculation means for calculating the rotated X and Y coordinate values of each pixel of the original image; X or Y specified by the calculation result of the calculation means
a bit set/reset circuit corresponding to a plurality of word counts including coordinate values of the bit set/reset circuit; and a bit set/reset circuit that sets the contents of the coordinate values specified by the calculation results of the bit set/reset circuit according to the data of the original image. An image rotation device comprising a control means.