JPH02230798A - Compound laminated ceramic parts - Google Patents

Compound laminated ceramic parts

Info

Publication number
JPH02230798A
JPH02230798A JP1049917A JP4991789A JPH02230798A JP H02230798 A JPH02230798 A JP H02230798A JP 1049917 A JP1049917 A JP 1049917A JP 4991789 A JP4991789 A JP 4991789A JP H02230798 A JPH02230798 A JP H02230798A
Authority
JP
Japan
Prior art keywords
layer
dielectric
forming
laminated ceramic
dielectric layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1049917A
Other languages
Japanese (ja)
Other versions
JPH0795630B2 (en
Inventor
Takatada Tomioka
孝忠 冨岡
Yuzo Shimada
嶋田 勇三
Kazuaki Uchiumi
和明 内海
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP1049917A priority Critical patent/JPH0795630B2/en
Publication of JPH02230798A publication Critical patent/JPH02230798A/en
Publication of JPH0795630B2 publication Critical patent/JPH0795630B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Ceramic Capacitors (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Compositions Of Oxide Ceramics (AREA)

Abstract

PURPOSE:To prevent the generation of exfoliation and cracks in the interface between an insulative layer and a dielectric layer and improve quality stability and reliability by using three-component composition of aluminum oxide, magnesium oxide and borosilicate lead system glass as the main component of insulative material for forming an insulator layer, and using perovskite structure compound containing lead as the main component of dielectric material for forming a dielectric layer. CONSTITUTION:As for the ratio of each component constituting insulative material, the following composition range is desirable; aluminum oxide is 20wt.% or less, magnesium oxide is 15-45wt.% and borosilicate lead system glass is 52-75wt.%. Perovskite structure compound containing lead is used as dielectric material. The difference of thermal expansion coefficient between the insulative material forming an insulator layer 2 and dielectric material forming a dielectric layer 1 is controlled to be 2X10<-6>/ deg.C or less, thereby reducing the difference of thermal coefficient between both layers and preventing the generation of cracks.

Description

【発明の詳細な説明】 [産業上の利用分野コ 本発明は複合積層セラミック部品に関する。[Detailed description of the invention] [Industrial application fields] The present invention relates to composite laminated ceramic components.

?従来の技術] 従来、大容量のコンデンサを利用する電子回路に対して
は、アルミナなどの基板上にチップ形コンデンサを搭載
し、高集積化をはかってきた。
? Conventional technology] Conventionally, electronic circuits using large-capacity capacitors have been mounted with chip-type capacitors on substrates such as alumina to achieve high integration.

つまり、セラミック等の絶縁体基板上に印刷法などによ
り、抵抗体、電極および導体による配線パターンの形成
を行い、かつ同一面上にチップ形コンデンサおよび半導
体集積回路等を搭載する方法で混成集積回路を作製して
いた。また最近では、コンデンサを形成する誘電体を絶
縁体で挟み込んだ複合セラミック部品の開発が進み、混
成集積回路な■どへの応用が行われつつある。
In other words, a hybrid integrated circuit is created by forming a wiring pattern using resistors, electrodes, and conductors on an insulating substrate such as a ceramic substrate using a printing method, and then mounting chip capacitors, semiconductor integrated circuits, etc. on the same surface. was being created. Recently, the development of composite ceramic parts in which a dielectric material forming a capacitor is sandwiched between insulators has progressed, and applications such as hybrid integrated circuits are being carried out.

ざらに、近年ではエレクトロニクスの急速な技術進歩に
伴い、各種エレクトロニクス部品は小型化へ移行しつつ
あり、低コスト化の点においても部品の軽薄短小化は必
須条件となってきている。
In general, in recent years, with rapid technological advances in electronics, various electronic parts are becoming smaller, and making parts lighter, thinner, shorter, and smaller has become an essential condition in terms of cost reduction.

しかしながら、従来の混成集積回路等の複合部品では、
限られたセラミック等の絶縁体基板上に、抵抗体、電極
、配線パターンをより高密度に印刷すること、およびチ
ップ形コンデンサ、半導体集積回路等をより高集積に搭
載することは、ある程度の限界がある。
However, in conventional composite parts such as hybrid integrated circuits,
There are certain limits to printing resistors, electrodes, and wiring patterns at a higher density on limited insulator substrates such as ceramics, and mounting chip capacitors, semiconductor integrated circuits, etc. in a higher density. There is.

例えば、高密度の配線パターンを形成した場合には、品
質の低下あるいはコストの高騰を生じ、高集積な設計に
おいては、特に実装部品類の数量増加に伴う搭載スペー
スの問題および形状の制約などが問題となった。
For example, if a high-density wiring pattern is formed, quality may deteriorate or costs may rise, and in highly integrated designs, mounting space issues and shape constraints may arise due to an increase in the number of mounted components. It became a problem.

そこで高密度、高集積化をはかるために、絶縁体基板中
に抵抗体やコンデンサを納めて積層した構造を持つ複合
積層セラミック部品が開発ざれつつある。
Therefore, in order to achieve higher density and higher integration, composite laminated ceramic parts are being developed that have a structure in which resistors and capacitors are housed in an insulating substrate and laminated.

第2図は、この複合積層セラミック部品の一例を示す積
層形成前の基板の断面図である。
FIG. 2 is a cross-sectional view of a substrate before lamination, showing an example of this composite laminated ceramic component.

この例では、所定の誘電率をもつ3枚の誘電体層1のう
ちの2枚にコンデンサの電極を形成する電極層3を設け
、これらを積層してコンデンサとする。絶縁体層2の最
外層の1枚には外面に外部回路とのパッド電極6を設け
、絶縁体層2に他の部品、配線などと共に設けられた引
出し導体4および接続パターン配線5により、これら絶
縁体層2、誘電体層1を積層・圧着した時に外部パッド
電極6と電極層3とが接続する構造となっている。
In this example, electrode layers 3 forming capacitor electrodes are provided on two of three dielectric layers 1 having a predetermined dielectric constant, and these are laminated to form a capacitor. One of the outermost layers of the insulator layer 2 is provided with a pad electrode 6 for connecting to an external circuit on the outer surface, and a lead-out conductor 4 and a connection pattern wiring 5 provided on the insulator layer 2 together with other components, wiring, etc. The structure is such that the external pad electrode 6 and the electrode layer 3 are connected when the insulator layer 2 and the dielectric layer 1 are laminated and pressure-bonded.

これら誘電体材料、絶縁体材料は、互いに異なる性質を
有しており、このうち絶縁体材料としては通常、−酸化
アルミニウムとホウケイ酸鉛系ガラスの2成分組成物が
用いられている。
These dielectric materials and insulating materials have different properties, and among these, a two-component composition of aluminum oxide and lead borosilicate glass is usually used as the insulating material.

[発明が解決し゛ようとする課題] 上述した従来の複合積層セラミック部品は積層された誘
電体層1、絶縁体層2が互いに異なる性質を有する誘電
体材料、絶縁体材料により形成ざれる構成となっている
ので、各材料の微妙な収縮率の差や熱膨張率の大きな相
違等により、絶縁体層2と誘電体層1との界面で剥離や
クラツタなどの現象が生じ易く、品質の安定性および信
頼性を阻害するという欠点があった。
[Problems to be Solved by the Invention] The conventional composite laminated ceramic component described above has a structure in which the laminated dielectric layer 1 and insulator layer 2 are formed of dielectric materials and insulator materials having mutually different properties. Therefore, due to subtle differences in shrinkage rates and large differences in thermal expansion coefficients of each material, phenomena such as peeling and clutter easily occur at the interface between the insulator layer 2 and dielectric layer 1, resulting in unstable quality. This had the disadvantage of hindering performance and reliability.

本発明の目的は、絶縁体層と誘電体層の界面での剥離や
クラックの発生を防止し、品質の安定性、信頼性が向上
した複合積層セラミック部品を提供することにある。
An object of the present invention is to provide a composite laminated ceramic component that prevents peeling and cracking at the interface between an insulator layer and a dielectric layer, and has improved quality stability and reliability.

[課題を解決するための手段] 本発明は、絶縁体層と、コンデンサを形成する内部電極
を設けた誘電体層と、該誘電体層のコンデンサを前記絶
縁体層の最上部に導く導体と、導体配線層とからなる複
合積層セラミック部品において、絶縁体層を形成する絶
縁体材料が酸化アルミニウム、酸化マグネシウムおよび
ホウケイ酸鉛系ガラスの3成分組成物を主成分とし、か
つ誘電体層を形成する誘電体材料が鉛を含むペロブスカ
イト構造の化合物を主成分としてなり、前記絶縁体材料
と前記誘電体材料の熱膨張係数差が2.0×10−6/
゜C以内であることを特徴とする複合積層セラミック部
品である。
[Means for Solving the Problem] The present invention includes an insulating layer, a dielectric layer provided with an internal electrode forming a capacitor, and a conductor that leads the capacitor of the dielectric layer to the top of the insulating layer. , a composite laminated ceramic component comprising a conductive wiring layer, in which the insulating material forming the insulating layer is mainly composed of a three-component composition of aluminum oxide, magnesium oxide, and lead borosilicate glass, and forming the dielectric layer. The dielectric material is mainly composed of a compound having a perovskite structure containing lead, and the difference in coefficient of thermal expansion between the insulator material and the dielectric material is 2.0×10-6/
The present invention is a composite laminated ceramic component characterized by a temperature within °C.

従来の複合積層セラミック部品においては、絶縁体材料
と誘電体材料は熱的特性(熱膨張率)に差があるものが
用いられており、その差が焼結後のクラック発生を起こ
させる要因となっていた。
In conventional composite laminated ceramic parts, insulator materials and dielectric materials with different thermal properties (coefficients of thermal expansion) are used, and this difference is a factor that causes cracks to occur after sintering. It had become.

本発明においては、絶縁体材料および誘電体材料として
上記したものを用い、絶縁体層を形成する絶縁体材料と
誘電体層を形成する誘電体材料の熱膨張係数差を2 X
 10−6 /゜C以内にコントロールする・ことによ
って両層の熱膨張率差を少なくし、クラックの発生を防
止する。
In the present invention, the above-mentioned insulator materials and dielectric materials are used, and the difference in thermal expansion coefficient between the insulator material forming the insulator layer and the dielectric material forming the dielectric layer is 2X.
By controlling the temperature within 10-6/°C, the difference in thermal expansion coefficient between the two layers is reduced and the occurrence of cracks is prevented.

絶縁体材料を構成する各成分の割合は、酸化アルミニウ
ムが20重量%以下、酸化マグネシウムが15〜40重
量%、ホウケイ酸鉛系ガラスが52〜75重量%の組成
範囲であることが好ましい。
The proportions of each component constituting the insulator material are preferably in a composition range of 20% by weight or less of aluminum oxide, 15 to 40% by weight of magnesium oxide, and 52 to 75% by weight of lead borosilicate glass.

酸化アルミニウムが20重量%を超える範囲および酸化
マグネシウムが40重量%を超える範囲では、iooo
 ’c以下で焼結ざれず、また酸化マグネシウムが15
重量%未溝の範囲では熱膨張率が小さくなる。ざらにホ
ウケイ酸鉛系ガラスにおいては、上記範囲外の場合には
ガラス安定性が得られず、発泡やガラス成分の流出が生
じやすい。
In the range where aluminum oxide exceeds 20% by weight and the range where magnesium oxide exceeds 40% by weight, iooo
It is not sintered at temperatures below 'c, and magnesium oxide is 15
The coefficient of thermal expansion becomes small in the range of weight percent ungrooved. Generally, in lead borosilicate glass, if the content is outside the above range, glass stability cannot be obtained, and foaming and outflow of glass components are likely to occur.

また、絶縁体材料と誘電体材料との焼結後の収縮差につ
いては、前述の熱膨張率の整合によって微妙な収縮差は
問題とならなくなるが、収縮差が問題となるような場合
は絶縁体の組成比をコントロールすることにより適当な
ものとすることが可能である。
Regarding the difference in shrinkage after sintering between the insulator material and the dielectric material, the slight difference in shrinkage will not be a problem due to the above-mentioned matching of thermal expansion coefficients, but if the difference in shrinkage becomes a problem, It is possible to make it suitable by controlling the composition ratio of the body.

[実施例] 次に本発明の実施例について図面を参照して詳細に説明
する。
[Example] Next, an example of the present invention will be described in detail with reference to the drawings.

第1図は本発明の一実施例を示す積層成形前の基板の断
面図でおる。第1図の基板断面図の主要構成部分は第2
図におけるものと同様でおるので、同一構成部分につい
てはその説明を省略する。この実施例が第2図に示す従
来の複合積層セラミック部品と異なる点は、従来は絶縁
体層2を形成ヰる絶縁体材料は酸化アルミニウムとホウ
ケイ酸鉛系ガラスの2成分組成物であるのに対し、本実
施例では絶縁体材料を酸化アルミニウム、酸化マグネシ
ウム、ホウケイ酸鉛系ガラスの3成分組成物にし、誘電
体材料との熱膨張係数の差を2X10−6/℃以内にコ
ントロールしたことにある。
FIG. 1 is a sectional view of a substrate before lamination molding, showing one embodiment of the present invention. The main components in the cross-sectional view of the board in Figure 1 are
Since it is the same as that shown in the figure, explanations of the same components will be omitted. The difference between this embodiment and the conventional composite laminated ceramic component shown in FIG. 2 is that conventionally, the insulating material forming the insulating layer 2 is a two-component composition of aluminum oxide and lead borosilicate glass. In contrast, in this example, the insulator material was a three-component composition of aluminum oxide, magnesium oxide, and lead borosilicate glass, and the difference in thermal expansion coefficient with the dielectric material was controlled within 2X10-6/℃. It is in.

次に、この実施例の製造方法について説明する。Next, the manufacturing method of this example will be explained.

誘電体層および絶縁体層のセラミックグリーンシートを
得るには、まず粉末原料を秤量し、ボールミル等により
混合おるいは粉砕を行う。次に混合粉末原料を電気炉等
を用いて仮焼し、予焼粉末材料を作製する。仮焼して得
た予焼粉末材料を有機溶剤および有機物バインダと混合
しスラリーを得る。このスラリーをドクターブレード法
等のキャスティング装置を用い、ポリエチレンフィルム
上にグリーンシ一ト化し、セラミックグリーンシ一トを
得る。
To obtain ceramic green sheets for the dielectric layer and the insulator layer, powder raw materials are first weighed and mixed or pulverized using a ball mill or the like. Next, the mixed powder raw material is calcined using an electric furnace or the like to produce a prefired powder material. The precalcined powder material obtained by calcining is mixed with an organic solvent and an organic binder to obtain a slurry. This slurry is formed into a green sheet on a polyethylene film using a casting device such as a doctor blade method to obtain a ceramic green sheet.

前記方法により、絶縁体のセラミックグリーンシ一ト、
誘電体のセラミックグリーンシ一トを作製し、それぞれ
所定の形状に切断し、各セラミックグリーンシ一ト片を
作製する。
By the above method, an insulating ceramic green sheet,
A dielectric ceramic green sheet is produced and cut into a predetermined shape to produce each ceramic green sheet piece.

なお、ここで用いる誘電体材料は、鉛を含むペロブスカ
イト構造の化合物であり、この誘電体材料の誘電率は、
構成する元素の組成比により変化するが、ほぼ500〜
20000の範囲で制御できる。
The dielectric material used here is a compound with a perovskite structure containing lead, and the dielectric constant of this dielectric material is
It varies depending on the composition ratio of the constituent elements, but approximately 500~
It can be controlled within a range of 20,000.

従って、大容量のコンデンサを形成するためには、極め
て有利である。
Therefore, it is extremely advantageous for forming a large capacity capacitor.

また、ここで用いる絶縁体材料としては、アルミナ、マ
グネシア、ホウケイvL鉛系ガラスの複合材料をはじめ
、コーディライト系セラミックス、カルシライト系セラ
ミックス等の材料も熱膨張率をコントロールすることで
適合可能で、これらの絶縁体材料の誘電率は5〜10程
度である。
In addition, the insulator materials used here include composite materials of alumina, magnesia, and Houkei VL lead-based glass, as well as materials such as cordierite ceramics and calcilite ceramics, which can be used by controlling the coefficient of thermal expansion. The dielectric constant of these insulating materials is about 5 to 10.

一方、金属体としてはAu,AQ,Pd,Pt,Cu,
N+等の1種以上を含む組成からなるものを用いる。
On the other hand, the metal bodies include Au, AQ, Pd, Pt, Cu,
A composition containing one or more types of N+ etc. is used.

次に誘電体のセラミックグリーンシ一ト片にはAg−P
dペーストを用い、コンデンサの電極層3を印刷し、ざ
らにスルーホールが必要な各セラミックグリーンシ一ト
片にはスルーホールを開け、その後スルーホールにAq
−Pdペーストを詰め、導体4を形成する。同様にして
最外層の絶縁体層2どなるセラミックグリーンシ一ト片
に外部パッド電極6を形成し、導体4と外部パッド電極
6とを接続する導体配線層5を絶縁体層2となるセラミ
ックグリーンシ一ト片に形成する。
Next, Ag-P is used for the dielectric ceramic green sheet piece.
d paste, print the electrode layer 3 of the capacitor, roughly drill a through hole in each piece of ceramic green sheet that requires a through hole, and then fill the through hole with Aq.
- Fill with Pd paste to form conductor 4. Similarly, an external pad electrode 6 is formed on a ceramic green sheet piece that forms the outermost insulating layer 2, and a conductor wiring layer 5 that connects the conductor 4 and the external pad electrode 6 is formed on the ceramic green sheet that becomes the insulating layer 2. Form into sheet pieces.

次に第1図のような構造になるように積層し、プレス型
に投入後、熱圧着プレスを行う。プレス圧着ざれた生積
層セラミック体をナイフ刃等により所定の形状に切断後
、脱バインダ処理を500’C前後の温度で行う。その
後、850〜1000 ’C位の温度で焼結することに
よりコンデンサ内蔵の複合積層セラミック部品が得られ
る。
Next, they are laminated so as to have the structure shown in FIG. 1, and after being put into a press mold, a thermocompression press is performed. After cutting the press-bonded raw laminated ceramic body into a predetermined shape using a knife blade or the like, a binder removal process is performed at a temperature of about 500'C. Thereafter, by sintering at a temperature of about 850 to 1000'C, a composite multilayer ceramic component with a built-in capacitor is obtained.

第1表は絶縁体層の材料組成として同表に記載の各成分
量を用いて複合積層セラミック部品を製造した時の、・
絶縁体材料と誘電体材料の熱膨張係数差および部品のク
ラック発生の有無を示したものである。
Table 1 shows the material composition of the insulator layer when a composite laminated ceramic component is manufactured using the amounts of each component listed in the table.
It shows the difference in thermal expansion coefficient between an insulator material and a dielectric material and the presence or absence of cracks in parts.

同表からわかるように、本発明の複合積層セラミック部
品は、絶縁体層と誘電体層との熱膨張率差がコントロー
ルざれ、熱ストレスによる応力が制御ざれることでクラ
ックの発生が防止される。
As can be seen from the table, in the composite laminated ceramic component of the present invention, the difference in thermal expansion coefficient between the insulating layer and the dielectric layer is well controlled, and the stress caused by thermal stress is well controlled, thereby preventing the occurrence of cracks. .

(以下余白〉 [発明の効果] 以上説明したように、本発明の複合積層セラミック部品
は、絶縁体層と誘電体層の材料として所定のものを用い
ることにより、両層の熱膨張率差がコントロールざれ、
熱ストレスによる応力が制御されるため、クラックの発
生がなく、かつ異質材料間の微妙な収縮差によるデラミ
ネーションも抑制することができ、品質の安定性、信頼
性の向上をはかることができる効果を有する。
(The following is a blank space) [Effects of the Invention] As explained above, in the composite laminated ceramic component of the present invention, by using predetermined materials for the insulating layer and the dielectric layer, the difference in thermal expansion coefficient between the two layers can be reduced. Control Zare,
Since the stress caused by thermal stress is controlled, cracks do not occur, and delamination due to subtle differences in shrinkage between different materials can be suppressed, resulting in improved quality stability and reliability. has.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示す積層成形前の基板の断
面図、第2図は従来の複合積層セラミック部品の一例を
示す積層成形前の基板の断面図である。 1・・・誘電体層      2・・・絶縁体層3・・
・コンデンサの電極層 4・・・導体        5,・・・導体配線層6
・・・外部パッド電極
FIG. 1 is a cross-sectional view of a substrate before lamination molding, showing an embodiment of the present invention, and FIG. 2 is a cross-sectional view of a substrate before lamination molding, showing an example of a conventional composite laminated ceramic component. 1... Dielectric layer 2... Insulator layer 3...
・Capacitor electrode layer 4...conductor 5,...conductor wiring layer 6
・・・External pad electrode

Claims (1)

【特許請求の範囲】[Claims] (1)絶縁体層と、コンデンサを形成する内部電極を設
けた誘電体層と、該誘電体層のコンデンサを前記絶縁体
層の最上部に導く導体と、導体配線層とからなる複合積
層セラミック部品において、絶縁体層を形成する絶縁体
材料が酸化アルミニウム、酸化マグネシウムおよびホウ
ケイ酸鉛系ガラスの3成分組成物を主成分とし、かつ誘
電体層を形成する誘電体材料が鉛を含むペロブスカイト
構造の化合物を主成分としてなり、前記絶縁体材料と前
記誘電体材料の熱膨張係数差が2.0×10^−^6/
℃以内であることを特徴とする複合積層セラミック部品
(1) Composite laminated ceramic consisting of an insulator layer, a dielectric layer provided with internal electrodes forming a capacitor, a conductor that leads the capacitor in the dielectric layer to the top of the insulator layer, and a conductor wiring layer. The component has a perovskite structure in which the insulating material forming the insulating layer is mainly composed of a three-component composition of aluminum oxide, magnesium oxide, and lead borosilicate glass, and the dielectric material forming the dielectric layer contains lead. The difference in thermal expansion coefficient between the insulating material and the dielectric material is 2.0×10^-^6/
A composite laminated ceramic component characterized by a temperature within ℃.
JP1049917A 1989-03-03 1989-03-03 Composite monolithic ceramic parts Expired - Lifetime JPH0795630B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1049917A JPH0795630B2 (en) 1989-03-03 1989-03-03 Composite monolithic ceramic parts

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1049917A JPH0795630B2 (en) 1989-03-03 1989-03-03 Composite monolithic ceramic parts

Publications (2)

Publication Number Publication Date
JPH02230798A true JPH02230798A (en) 1990-09-13
JPH0795630B2 JPH0795630B2 (en) 1995-10-11

Family

ID=12844362

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1049917A Expired - Lifetime JPH0795630B2 (en) 1989-03-03 1989-03-03 Composite monolithic ceramic parts

Country Status (1)

Country Link
JP (1) JPH0795630B2 (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5454161A (en) * 1993-04-29 1995-10-03 Fujitsu Limited Through hole interconnect substrate fabrication process
KR100434416B1 (en) * 2000-07-21 2004-06-04 가부시키가이샤 무라타 세이사쿠쇼 Insulating ceramic compact, ceramic multilayer substrate, and ceramic electronic device
KR100434415B1 (en) * 2000-07-21 2004-06-04 가부시키가이샤 무라타 세이사쿠쇼 Insulative ceramic compact
JP2011066439A (en) * 2003-03-27 2011-03-31 Epcos Ag Electric multilayer component
JP2018182298A (en) * 2017-04-11 2018-11-15 サムソン エレクトロ−メカニックス カンパニーリミテッド. Multilayer capacitor and board having the same mounted thereon

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5454161A (en) * 1993-04-29 1995-10-03 Fujitsu Limited Through hole interconnect substrate fabrication process
KR100434416B1 (en) * 2000-07-21 2004-06-04 가부시키가이샤 무라타 세이사쿠쇼 Insulating ceramic compact, ceramic multilayer substrate, and ceramic electronic device
KR100434415B1 (en) * 2000-07-21 2004-06-04 가부시키가이샤 무라타 세이사쿠쇼 Insulative ceramic compact
JP2011066439A (en) * 2003-03-27 2011-03-31 Epcos Ag Electric multilayer component
JP2018182298A (en) * 2017-04-11 2018-11-15 サムソン エレクトロ−メカニックス カンパニーリミテッド. Multilayer capacitor and board having the same mounted thereon

Also Published As

Publication number Publication date
JPH0795630B2 (en) 1995-10-11

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