JPH02229445A - Film carrier and semiconductor device - Google Patents
Film carrier and semiconductor deviceInfo
- Publication number
- JPH02229445A JPH02229445A JP1050792A JP5079289A JPH02229445A JP H02229445 A JPH02229445 A JP H02229445A JP 1050792 A JP1050792 A JP 1050792A JP 5079289 A JP5079289 A JP 5079289A JP H02229445 A JPH02229445 A JP H02229445A
- Authority
- JP
- Japan
- Prior art keywords
- lead
- film carrier
- bump
- hole
- semiconductor element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 46
- 229910052751 metal Inorganic materials 0.000 claims abstract description 33
- 239000002184 metal Substances 0.000 claims abstract description 33
- 239000000126 substance Substances 0.000 claims abstract description 14
- 239000004840 adhesive resin Substances 0.000 claims description 7
- 229920006223 adhesive resin Polymers 0.000 claims description 7
- 239000007769 metal material Substances 0.000 claims description 6
- 238000000034 method Methods 0.000 abstract description 18
- 229910052782 aluminium Inorganic materials 0.000 abstract description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract description 2
- 230000015572 biosynthetic process Effects 0.000 abstract description 2
- 239000010410 layer Substances 0.000 description 18
- 229920005989 resin Polymers 0.000 description 13
- 239000011347 resin Substances 0.000 description 13
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 6
- 238000004519 manufacturing process Methods 0.000 description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- 229910052802 copper Inorganic materials 0.000 description 4
- 239000010949 copper Substances 0.000 description 4
- 150000002739 metals Chemical class 0.000 description 4
- 239000011295 pitch Substances 0.000 description 4
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- 239000010931 gold Substances 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 229910052759 nickel Inorganic materials 0.000 description 3
- 239000002245 particle Substances 0.000 description 3
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000003822 epoxy resin Substances 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 239000009719 polyimide resin Substances 0.000 description 2
- 238000007789 sealing Methods 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- 229920005992 thermoplastic resin Polymers 0.000 description 2
- 229920001187 thermosetting polymer Polymers 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical group [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 229920000122 acrylonitrile butadiene styrene Polymers 0.000 description 1
- 239000012790 adhesive layer Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 239000006229 carbon black Substances 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 238000003486 chemical etching Methods 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000011651 chromium Substances 0.000 description 1
- 229910017052 cobalt Inorganic materials 0.000 description 1
- 239000010941 cobalt Substances 0.000 description 1
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000010292 electrical insulation Methods 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 229910002804 graphite Inorganic materials 0.000 description 1
- 239000010439 graphite Substances 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 229920006122 polyamide resin Polymers 0.000 description 1
- 229920005668 polycarbonate resin Polymers 0.000 description 1
- 239000004431 polycarbonate resin Substances 0.000 description 1
- 229920001225 polyester resin Polymers 0.000 description 1
- 239000004645 polyester resin Substances 0.000 description 1
- 229920013716 polyethylene resin Polymers 0.000 description 1
- 229920005990 polystyrene resin Polymers 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229920002050 silicone resin Polymers 0.000 description 1
- 229920002803 thermoplastic polyurethane Polymers 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Landscapes
- Wire Bonding (AREA)
Abstract
Description
【発明の詳細な説明】
く産業上の利用分野〉
本発明はフィルムキャリアおよび半導体装置に関するも
のである．
く従来の技術〉
従来から半導体素子の実装方式の一つとしてフィルムキ
ャリア方式が採用されている。[Detailed Description of the Invention] Industrial Application Field The present invention relates to a film carrier and a semiconductor device. BACKGROUND ART Conventionally, a film carrier method has been used as one of the mounting methods for semiconductor elements.
フィルムキャリア方式におけるフィンガー状リードと半
導体素子とのボンディング（インナーリードボンディン
グ）方法としては、各種の方法が提案されており、半導
体素子の電極面にバンプ（突起電極）を形成し、このバ
ンプを利用してフィルムキャリア上のリードとボンディ
ングする方法が提案されている．
しかし、電極面へのバンプ形成工程は、電極面にチタン
／クロムなど金属による接着層およびバンプ形成金属の
拡散防止のための銅、白金、パラジウムなどの金属から
なるバリアー層をスバツタエッチッングや蒸着などの方
法により形成し、さらに、メッキ法により金メッキなど
によりバンプを形成するという複雑な工程が必要となる
だけでなく、半導体素子の汚染や損傷を免れることが難
しく、決して優れた方法とは云えないものである。Various methods have been proposed for bonding (inner lead bonding) between a finger-shaped lead and a semiconductor element in the film carrier method. A method has been proposed in which the lead is bonded to a lead on a film carrier. However, the process of forming bumps on the electrode surface involves sporadic etching of an adhesive layer of metals such as titanium/chromium and a barrier layer of metals such as copper, platinum, and palladium to prevent diffusion of the bump-forming metal. Not only does it require a complicated process of forming bumps by methods such as or vapor deposition, and then forming bumps by gold plating using a plating method, but it is also difficult to avoid contamination and damage to semiconductor elements, so it is by no means a good method. cannot be said.
また、前記方法とは逆に、フィルムキャリア側のリード
にバンプを形成してボンディングする方法も提案されて
いるが、この方法も上記方法と同様、複雑なバンプ形成
工程が必要となるものである。Additionally, a method has been proposed in which bumps are formed on the leads on the film carrier side for bonding, contrary to the above method, but like the above method, this method also requires a complicated bump forming process. .
近年、バンプレスフィルムキャリアとして、異方導電膜
を用いたものが提案されている（特開昭６３−４６３３
号公報）．用いる異方導電膜としてはカーボンブラック
、グラファイト、ニッケル、銅、銀などの導電性粒子を
電気絶縁性樹脂膜に分散し、粒子を膜の厚み方向に配向
させたものであって、均質な異方導電性を発揮する膜を
得るには製法上、煩雑なものとなり、また導電性粒子の
配向が不充分な場合は、半導体素子の電極とリードとの
インナーリードボンディングが不確実なものとなり、接
続信頼性が低下する恐れがある。In recent years, bumpless film carriers using anisotropic conductive films have been proposed (Japanese Patent Laid-Open No. 63-4633).
Publication No.). The anisotropic conductive film used is one in which conductive particles such as carbon black, graphite, nickel, copper, and silver are dispersed in an electrically insulating resin film, and the particles are oriented in the thickness direction of the film. Obtaining a film that exhibits directional conductivity requires a complicated manufacturing process, and if the orientation of the conductive particles is insufficient, the inner lead bonding between the electrode and lead of the semiconductor element becomes uncertain. Connection reliability may deteriorate.
く発明が解決しようとする課題〉
本発明は上記従来の技術が有する欠点を解決するフィル
ムキャリア、詳しくは半導体素子とリードをボンディン
グする際の位置決めが容易となり、且つ半導体装置の製
造が極めて容易となるフィルムキャリア、およびこのフ
ィルムキャリアを用いてなる半導体装置を提供すること
を目的とするものである．
〈課題を解決するための手段〉
本発明者らは鋭意検討を重ねた結果、表裏面に導通する
貫通孔を設けた絶縁性フィルムを用い、該貫通孔の開口
部にバンプ状金属突出物を設けることにより、上記目的
を達成できるフィルムキャリアが得られることを見い出
し、本発明を完成するに至った。OBJECTS TO BE SOLVED BY THE INVENTION The present invention provides a film carrier that solves the drawbacks of the above-mentioned conventional techniques, and more specifically, provides a film carrier that facilitates positioning when bonding semiconductor elements and leads, and extremely facilitates the manufacture of semiconductor devices. The object of the present invention is to provide a film carrier made of the same material, and a semiconductor device made using this film carrier. <Means for Solving the Problems> As a result of extensive studies, the present inventors used an insulating film with conductive through holes on the front and back sides, and provided bump-shaped metal protrusions at the openings of the through holes. It has been discovered that by providing a film carrier that can achieve the above object, the present invention has been completed.
即ち、本発明のフィルムキャリアは、リードを片面に有
する絶縁性フィルムのリード当接領域内または該領域内
とその近傍領域に、少なくとも１個の微細貫通孔が厚み
方向に設けられており、かつリード当接領域内に設けら
れた貫通孔には金属物質による導通路が形成されている
と共に、導通路が形成されている貫通孔のリード当接面
と反対面の開口部にはバンプ状の金属突出物が形成され
てなるものである．さらに、外部接続用電極を有する半
導体素子を上記フィルムキャリアのバンプ状金属突出物
に接続することによって半導体装置を得ることができる
ものである。That is, in the film carrier of the present invention, at least one fine through hole is provided in the thickness direction in the lead contact area of the insulating film having the lead on one side, or in the lead contact area and in the vicinity thereof, and A conduction path made of a metallic substance is formed in the through hole provided in the lead contact area, and a bump-shaped opening is formed on the opposite side of the lead contact surface of the through hole where the conduction path is formed. It is made up of metal protrusions. Furthermore, a semiconductor device can be obtained by connecting a semiconductor element having an electrode for external connection to the bump-shaped metal protrusion of the film carrier.
〈実施例〉
以下に、本発明を図面に示す一実施例に基づき説明する
。<Example> The present invention will be described below based on an example shown in the drawings.
第１図は本発明のフィルムキャリアを用いてなる半導体
装置の一実例を示す断面図であり、リード３を片面に有
する絶縁性フィルム２のリード３当接領域内およびその
近傍領域に、複数の貫通孔４が設けられており、このリ
ード３当接領域内に設けられた貫通孔４にのみ金属物質
５が充填されバンプ状金属突出物６が形成されている．
半導体素子１は素子上のアルミニウム電極などの外部接
続用電極７を、上記フィルムキャリアのバンプ状金属突
出物６に接続することによって半導体装置とすることが
できる。FIG. 1 is a sectional view showing an example of a semiconductor device using the film carrier of the present invention. A through hole 4 is provided, and only the through hole 4 provided in the contact area of the lead 3 is filled with a metal substance 5 to form a bump-shaped metal protrusion 6.
The semiconductor element 1 can be made into a semiconductor device by connecting an external connection electrode 7 such as an aluminum electrode on the element to the bump-shaped metal protrusion 6 of the film carrier.
第１図において絶縁性フィルム２は電気絶縁特性を有す
るフィルムであればその素材に制限はなく、ポリエステ
ル系樹脂、エボキシ系樹脂、ウレタン系樹脂、ボリスチ
レン系樹脂、ポリエチレン系樹脂、ボリアミド系樹脂、
ポリイミド系樹脂、ＡＢＳ樹脂、ポリカーボネート樹脂
、シリコーン系樹脂などの熱硬化性樹脂や熱可塑性樹脂
を問わず使用できる．これらのうち、耐熱性や機械的強
度の点からポリイミド系樹脂を用いることが好ましい。In FIG. 1, the material of the insulating film 2 is not limited as long as it has electrical insulation properties, such as polyester resin, epoxy resin, urethane resin, polystyrene resin, polyethylene resin, polyamide resin, etc.
Any thermosetting resin or thermoplastic resin can be used, such as polyimide resin, ABS resin, polycarbonate resin, and silicone resin. Among these, polyimide resins are preferably used in terms of heat resistance and mechanical strength.
上記絶縁性フィルム２の片面のリード３は、例えば金、
銀、銅、ニッケル、コバルトなどの各種金属、またはこ
れらを主成分とする各種合金などの導電性材料によって
形成され、半導体素子１と電気的に接続され、半導体素
子ｌの所定の機能を発揮せしめるように、所望の線状パ
ターンにて配線されている。The leads 3 on one side of the insulating film 2 are made of gold, for example.
It is formed of a conductive material such as various metals such as silver, copper, nickel, and cobalt, or various alloys containing these as main components, is electrically connected to the semiconductor element 1, and allows the semiconductor element 1 to perform a predetermined function. The wires are wired in a desired linear pattern.
本発明のフィルムキャリアの上記絶縁フィルム２に設け
る貫通孔４は、リード３と半導体素子ｌ上の外部接続用
電極７との接続を果たすために重要であり、リード当接
領域内または該領域内とその近傍領域にリード３の幅よ
りも小さな孔間ピッチにて、少なくとも１個の微細貫通
孔がフィルム３の厚み方向に設けられている。貫通孔４
は機械加工やレーザー加工、光加工、化学エッチングな
どの方法を用い、任意の孔径や孔間ピッチにて設けるこ
とができ、例えばエキシマレーザーの照射による穿孔加
工を行なうことが好ましい．また、貫通孔４の孔径は、
隣合う貫通孔４同士が繋がらない程度にまで大きくし、
さらに孔間ピッチもできるだけ小さくしてリードに接す
る貫通孔４の数を増やすことが、後の工程にて充填する
金属物質の電気抵抗を小さくする上で好ましい。The through holes 4 provided in the insulating film 2 of the film carrier of the present invention are important for achieving connection between the leads 3 and the external connection electrodes 7 on the semiconductor element l, and are in the lead contact area or within the area. At least one fine through hole is provided in the thickness direction of the film 3 in a region near the lead 3 at a hole pitch smaller than the width of the lead 3. Through hole 4
The holes can be formed with arbitrary hole diameters and hole pitches using methods such as mechanical processing, laser processing, optical processing, and chemical etching. For example, it is preferable to perform perforation processing by excimer laser irradiation. Moreover, the hole diameter of the through hole 4 is
Make the through holes 4 so large that they do not connect with each other,
Furthermore, it is preferable to increase the number of through holes 4 in contact with the leads by reducing the pitch between the holes as much as possible in order to reduce the electrical resistance of the metal substance to be filled in a later step.
上記のようにして設けられた貫通孔４のうち、リード３
当接領域内の貫通孔には、金属物質５を充填することに
よって導通路が形成される。さらに、導通路が形成され
ている貫通孔４のリード当接面と反対面の開口部に数μ
ｍ〜数十μｍの高さでバンプ状に突出物６を形成させる
ことによって本発明のフィルムキャリアを得ることがで
きる。Among the through holes 4 provided as described above, the leads 3
A conductive path is formed in the through hole in the contact area by filling it with a metal substance 5. Furthermore, several micrometers are added to the opening on the opposite side of the lead abutting surface of the through hole 4 where the conductive path is formed.
The film carrier of the present invention can be obtained by forming bump-shaped protrusions 6 with a height of m to several tens of μm.
金属物質による導通路およびバンプ状金属突出物の形成
は、例えばリード３を電極として電解メッキすることに
よって、リード３当接領域内の貫通孔のみに選択的に行
なえるものである。The formation of conductive paths and bump-shaped metal protrusions using a metal material can be selectively performed only in the through-holes in the contact areas of the leads 3, for example, by electrolytic plating using the leads 3 as electrodes.
また、貫通孔に充填および突出させる金属物質は、単一
の金属物質に限定されず、複数種の金属を用い、多層構
造とすることもできる。例えば第２図に示すように、貫
通孔のリード側の第１層に銅などの安価な金属物質５ａ
を用い、半導体素子と接する第３層には接続信軌性の高
い金などの金属物質５ｃを用い、第１層と第３層との間
に位置する第２層として、第１層と第３層を形成する金
属物質の相互反応を防止するためのバリャー性金属物質
５ｂとしてニッケルなどを用いることもできる．
本発明のフィルムキャリアは、上記フィルムキャリアに
形成されたバンプ状金属突出物６に、半導体素子１上の
電極７を通常の接着、電気接続することによって目的と
する半導体装置とすることができる。Moreover, the metal substance filled in and protruding from the through-hole is not limited to a single metal substance, and a multilayered structure can be formed by using a plurality of types of metals. For example, as shown in FIG. 2, the first layer on the lead side of the through hole is made of an inexpensive metal material 5a such as copper.
The third layer in contact with the semiconductor element is made of a metal material 5c such as gold having high connection conductivity, and the second layer located between the first layer and the third layer is made of Nickel or the like may also be used as the barrier metal substance 5b to prevent mutual reaction between the metal substances forming the three layers. The film carrier of the present invention can be made into an intended semiconductor device by conventionally adhering and electrically connecting the electrodes 7 on the semiconductor element 1 to the bump-shaped metal protrusions 6 formed on the film carrier.
第３図（ａ）〜（ｅ）は半導体素子１の外部接続用電極
７形成面に熱接着性樹脂層８を設けてフィルムキャリア
と半導体素子の接続し、半導体装置を得るための製造工
程図である．
第３図（ａ）は前記のように絶縁性フィルム２に貫通孔
４を設けたものの断面図、第３図℃）は貫通孔を導通路
とするために金属物質５を充填した際の断面図、第３図
（Ｃ）は第３図５）の斜視図、第３図（ｄ）は熱接着性
樹脂層８を表面に付着した半導体素子１を接続する際の
断面図、第３図（ｅ）は接続後の半導体装置の断面図を
示す。FIGS. 3(a) to 3(e) are manufacturing process diagrams for providing a heat-adhesive resin layer 8 on the surface of the semiconductor element 1 on which the external connection electrodes 7 are formed and connecting the film carrier and the semiconductor element to obtain a semiconductor device. It is. FIG. 3(a) is a cross-sectional view of the insulating film 2 with the through-holes 4 as described above, and FIG. 3(C) is a perspective view of FIG. 3(5), FIG. 3(d) is a sectional view when connecting the semiconductor element 1 with the thermal adhesive resin layer 8 attached to the surface, and FIG. (e) shows a cross-sectional view of the semiconductor device after connection.
上記熱接着性樹脂層８に用いる樹脂としては、エボキシ
樹脂の如き熱硬化性樹脂やフッ素樹脂の如き熱可塑性樹
脂を問わず使用できる。また、該樹脂層８はダイシング
前もしくは後のシリコンウエハに付着させて一体化させ
てフィルムキャリアに接続してもよいし、熱接着性樹脂
層８をパターン上に設けてたり、フィルム状やリボン状
にしたものを半導体素子とフィルムキャリアとの接続時
に挟着して熱圧着してもよい。As the resin used for the thermoadhesive resin layer 8, any thermosetting resin such as epoxy resin or thermoplastic resin such as fluororesin can be used. Further, the resin layer 8 may be attached to the silicon wafer before or after dicing, integrated and connected to a film carrier, or the thermoadhesive resin layer 8 may be provided on a pattern, or may be formed into a film or ribbon. A shaped material may be sandwiched and thermocompression bonded when connecting the semiconductor element and the film carrier.
このように熱接着性樹脂層８を介在させてフィルムキャ
リアに半導体素子１を接続した場合、キャリアと素子と
の間に熱接着性樹脂の層が形成され、且つ貫通孔にまで
樹脂が充填されるので密着性が向上し、電気的接続も強
固となる。さらに、半導体装置の表面保護も該樹脂層に
よって行なえるので、製造工程も簡素化できるものであ
る。なお、接続後、第３図（ｅ）に示すように余分な樹
脂は金属物質が充填されていない貫通孔内に流入して内
部の空気を押し出すので、後の工程で本発明の半導体装
置を樹脂封止する際にボイドが発生したり、クラックが
入ることもなく信頼性の高いものとなる．
く発明の効果〉
以上のように、本発明のフィルムキャリアはりード当接
領域内または該領域内とその近傍領域の絶縁性フィルム
に貫通孔を設け、その内部に金属物質を充填し、さらに
バンプ状の金属突出物を形成しているので、貫通孔の形
成時はリード形成部に粗位置合わせをするだけで良く、
また、半導体素子との接続もバンプ状の突出物によって
、高精度に位置決めできるものであり、得られる半導体
装置の信顛性が向上するものである．
また、高精度のバンプが安価に形成できると共に、配線
および貫通孔を微細化することによって、半導体素子配
線のファインピッチにも対応できるものである。さらに
、半導体素子面の外部接続用電極を素子面内で自由にレ
イアウト可能となり、配線設計における自由度が増大す
るものである。When the semiconductor element 1 is connected to the film carrier with the heat-adhesive resin layer 8 interposed in this way, a layer of the heat-adhesive resin is formed between the carrier and the element, and even the through holes are filled with the resin. This improves adhesion and strengthens the electrical connection. Furthermore, since the surface of the semiconductor device can be protected by the resin layer, the manufacturing process can also be simplified. Note that after connection, as shown in FIG. 3(e), excess resin flows into the through hole that is not filled with metal material and pushes out the air inside, so that the semiconductor device of the present invention cannot be used in a later process. It is highly reliable, with no voids or cracks occurring during resin sealing. Effects of the Invention> As described above, the film carrier of the present invention provides a through hole in the insulating film in the lead contact area or in the area and in the vicinity thereof, fills the inside with a metal substance, and further Since a bump-shaped metal protrusion is formed, when forming a through-hole, it is only necessary to roughly align it with the lead forming part.
Furthermore, the bump-like protrusions allow for highly accurate positioning of connections with semiconductor elements, thereby improving the reliability of the resulting semiconductor device. In addition, highly accurate bumps can be formed at low cost, and by making the wiring and through-holes finer, it is possible to accommodate fine pitches of semiconductor element wiring. Furthermore, the external connection electrodes on the semiconductor element surface can be freely laid out within the element surface, increasing the degree of freedom in wiring design.
また、本発明のフィルムキャリアと半導体素子との接続
時に、熱接着性樹脂層を介在させることによって樹脂封
止も同時に行なうことができるので、製造工程が簡素化
できると共に、強固な接続ができ、信鎖性が向上するも
のである。Further, when connecting the film carrier of the present invention and the semiconductor element, resin sealing can be performed at the same time by interposing a thermal adhesive resin layer, so the manufacturing process can be simplified, and a strong connection can be achieved. This improves credibility.
第１図は本発明のフィルムキャリアを用いてなる半導体
装置の一実例を示す断面図、第２図は貫通孔に金属物質
を多層にて充填した場合の拡大断面図、第３図（ａ）〜
（ｅ）は半導体素子１の外部接続用電極７形成面に熱接
着性樹脂層８を設けてフイルムキャリアと半導体素子の
接続し、半導体装置を得るための製造工程図である。
１・・・半導体素子、２・・・絶縁性フィルム、３・・
・リード、４・・・貫通孔、５・・・金属物質、６・・
・バンプ状金属突出物、７・・・外部接続用電極、８・
・・熱接着性樹脂層FIG. 1 is a cross-sectional view showing an example of a semiconductor device using the film carrier of the present invention, FIG. 2 is an enlarged cross-sectional view of a through hole filled with a multilayer metal substance, and FIG. 3(a) ~
(e) is a manufacturing process diagram for providing a thermal adhesive resin layer 8 on the surface of the semiconductor element 1 on which the external connection electrodes 7 are formed to connect the film carrier and the semiconductor element to obtain a semiconductor device. 1... Semiconductor element, 2... Insulating film, 3...
・Lead, 4... Through hole, 5... Metal substance, 6...
・Bump-shaped metal protrusion, 7... External connection electrode, 8.
・・Thermoadhesive resin layer
Claims (5)
接領域内または該領域内とその近傍領域に、少なくとも
１個の微細貫通孔が厚み方向に設けられており、かつリ
ード当接領域内に設けられた貫通孔には金属物質による
導通路が形成されていると共に、導通路が形成されてい
る貫通孔のリード当接面と反対面の開口部にはバンプ状
の金属突出物が形成されてなるフィルムキャリア。(1) At least one fine through hole is provided in the thickness direction in the lead contact area of the insulating film having the lead on one side, or in the lead contact area and in the vicinity thereof, and in the lead contact area. A conduction path made of a metallic substance is formed in the provided through-hole, and a bump-shaped metal protrusion is formed at the opening on the opposite side of the lead contacting surface of the through-hole where the conduction path is formed. A film carrier.
請求項（１）記載のフィルムキャリア。(2) The film carrier according to claim (1), wherein the conductive path is formed by filling with a metal substance.
成されてなる請求項（１）または（２）記載のフィルム
キャリア。(3) The film carrier according to claim (1) or (2), wherein the conductive path is formed in a multilayer structure using a plurality of types of metal substances.
）記載のバンプ状金属突出物に接続してなる半導体装置
。(4) A semiconductor element having an electrode for external connection is claimed in claim (1)
) A semiconductor device connected to the bump-shaped metal protrusion described in ).
脂層を形成してなる請求項（４）記載の半導体装置。(5) The semiconductor device according to claim (4), wherein a thermal adhesive resin layer is formed on the surface of the semiconductor element on which external connection electrodes are formed.
Priority Applications (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1050792A JP2815113B2 (en) | 1989-03-01 | 1989-03-01 | Method for manufacturing film carrier and semiconductor device |
| SG1996007397A SG49842A1 (en) | 1988-11-09 | 1989-11-07 | Wiring substrate film carrier semiconductor device made by using the film carrier and mounting structure comprising the semiconductor |
| DE68929282T DE68929282T2 (en) | 1988-11-09 | 1989-11-07 | Conductor substrate, film carrier, semiconductor arrangement with the film carrier and mounting structure with the semiconductor arrangement |
| EP89120640A EP0368262B1 (en) | 1988-11-09 | 1989-11-07 | Wiring substrate, film carrier, semiconductor device made by using the film carrier, and mounting structure comprising the semiconductor device |
| KR1019890016132A KR960006763B1 (en) | 1988-11-09 | 1989-11-08 | Wiring substrate, film carrier, semiconductor device made by using the film carrier, and mounting structure comprising the semiconductor device |
| US07/433,108 US5072289A (en) | 1988-11-09 | 1989-11-08 | Wiring substrate, film carrier, semiconductor device made by using the film carrier, and mounting structure comprising the semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1050792A JP2815113B2 (en) | 1989-03-01 | 1989-03-01 | Method for manufacturing film carrier and semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH02229445A true JPH02229445A (en) | 1990-09-12 |
| JP2815113B2 JP2815113B2 (en) | 1998-10-27 |
Family
ID=12868654
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1050792A Expired - Lifetime JP2815113B2 (en) | 1988-11-09 | 1989-03-01 | Method for manufacturing film carrier and semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2815113B2 (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0714880A (en) * | 1991-03-22 | 1995-01-17 | Semiconductor Energy Lab Co Ltd | Mounting method for chip of semiconductor integrated circuit and electronic equipment mounted therewith |
| EP0684644A1 (en) | 1994-05-25 | 1995-11-29 | Nec Corporation | Method for manufacturing bump leaded film carrier type semiconductor device |
| JPH08102474A (en) * | 1994-09-30 | 1996-04-16 | Nec Corp | Semiconductor device and its manufacture |
| WO2010061552A1 (en) * | 2008-11-25 | 2010-06-03 | 住友ベークライト株式会社 | Electronic component package and electronic component package manufacturing method |
| JP2015159161A (en) * | 2014-02-24 | 2015-09-03 | 新光電気工業株式会社 | Wiring board, and method for manufacturing wiring board |
| JPWO2016098865A1 (en) * | 2014-12-19 | 2017-09-21 | 富士フイルム株式会社 | Multilayer wiring board |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5548954A (en) * | 1978-10-03 | 1980-04-08 | Toshiba Corp | Manufacturing of film carrier |
| JPS5727141U (en) * | 1980-07-23 | 1982-02-12 | ||
| JPS6392036A (en) * | 1986-10-07 | 1988-04-22 | Seiko Epson Corp | Packaging structure of semiconductor device |
-
1989
- 1989-03-01 JP JP1050792A patent/JP2815113B2/en not_active Expired - Lifetime
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5548954A (en) * | 1978-10-03 | 1980-04-08 | Toshiba Corp | Manufacturing of film carrier |
| JPS5727141U (en) * | 1980-07-23 | 1982-02-12 | ||
| JPS6392036A (en) * | 1986-10-07 | 1988-04-22 | Seiko Epson Corp | Packaging structure of semiconductor device |
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0714880A (en) * | 1991-03-22 | 1995-01-17 | Semiconductor Energy Lab Co Ltd | Mounting method for chip of semiconductor integrated circuit and electronic equipment mounted therewith |
| EP0684644A1 (en) | 1994-05-25 | 1995-11-29 | Nec Corporation | Method for manufacturing bump leaded film carrier type semiconductor device |
| US5683942A (en) * | 1994-05-25 | 1997-11-04 | Nec Corporation | Method for manufacturing bump leaded film carrier type semiconductor device |
| US5905303A (en) * | 1994-05-25 | 1999-05-18 | Nec Corporation | Method for manufacturing bump leaded film carrier type semiconductor device |
| JPH08102474A (en) * | 1994-09-30 | 1996-04-16 | Nec Corp | Semiconductor device and its manufacture |
| EP0704899B1 (en) * | 1994-09-30 | 2001-08-01 | Nec Corporation | Method of manufacturing chip-size package-type semiconductor device |
| WO2010061552A1 (en) * | 2008-11-25 | 2010-06-03 | 住友ベークライト株式会社 | Electronic component package and electronic component package manufacturing method |
| US8748751B2 (en) | 2008-11-25 | 2014-06-10 | Sumitomo Bakelite Co., Ltd. | Electronic component package and method for producing electronic component package |
| JP5712615B2 (en) * | 2008-11-25 | 2015-05-07 | 住友ベークライト株式会社 | Electronic component package and method of manufacturing electronic component package |
| JP2015159161A (en) * | 2014-02-24 | 2015-09-03 | 新光電気工業株式会社 | Wiring board, and method for manufacturing wiring board |
| JPWO2016098865A1 (en) * | 2014-12-19 | 2017-09-21 | 富士フイルム株式会社 | Multilayer wiring board |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2815113B2 (en) | 1998-10-27 |
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