JPH02228838A - Interface circuit - Google Patents

Abstract

PURPOSE:To make the size of a communication equipment small by outputting each cell based on a cell border identification signal added to each cell so as to match the transmission timing of the cell to a common timing entirely. CONSTITUTION:A transmission cell 32 from a communication equipment is coded by a coding circuit 12, a cell border identification signal is added, a transmission circuit converts it into an optical signal 35 and outputs it to a transmission line 15 connecting to a user terminal equipment. An optical signal 36 sent via the transmission line 15 is converted into an electric signal by a reception circuit, an identification reproduction circuit 19 reproduces a reception data 39, a decoding circuit 20 detects the cell border identification signal from the received data 39 to decode the part of a reception cell 41 and outputs the result. A cell transmission timing control circuit 21 outputs the reception cell 42 in matching with the timing from the communication equipment. Thus, the phase difference of the cell from the user terminal equipment is absorbed and the timing is matched, then the quantity of the hardware of the communication equipment is reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention is applied to ATM (Asynchronous Tram)
The present invention relates to an interface circuit connected to a communication device using the nsfer Mode) method.

(Prior Art) When a user terminal communicates with a partner via a communication network, the user terminal is connected to a communication device such as an exchange or a multiplexer via an interface circuit.

FIG. 2 shows an example of a conventional interface circuit, which is a wideband I5DN (Integrated 5ervic
es digital network) (for example, ``1986 Institute of Electronics, Information and Communication Engineers Spring National Conference Lecture Proceedings (B-1) J (1988-3-15, IEICE 9.1-408). In Figure 2,
Data from a user terminal (not shown) is transmitted via optical fiber 43.
The light is received by the light receiving element 44 via the light receiving element 44 and detected.

The detected data is amplified to a logic level by an amplifier 45 and supplied to an identification/reproduction circuit 46 and a black/red extraction circuit 47. The identification and reproduction circuit 46 reproduces the data based on the clock extracted by the clock extraction circuit 42, decodes it, and sends it to the communication device. On the other hand, data from the other user terminal supplied from the communication device is converted into a transmission code by the encoding circuit 48 and drives the light emitting element 50 via the one light emitting element driving circuit 49. The optical signal from the light emitting element 5o is sent to the user terminal via the optical fiber 5no.

(Problem to be solved by the invention) In a normal system, as shown in FIG.
, s 3. A large number of interface circuits 52-
1 to 52-n, l) or 56-1 to 56-n are connected.

In the case of a system employing the ATM system, cells are sent to the interface circuit from each user terminal at irregular timing. However, the interface circuits 52-1 to 52-n.

Alternatively, since 56-1 to 56-n have the configuration shown in FIG. 2, cells from user terminals are sent to communication devices 53 and 55 at irregular timings. Therefore, in order to facilitate communication processing, the first communication device 53.55 absorbs the phase difference between cells sent from each interface circuit 52-1 to 52-ns or 56-1 to 56-n, It is necessary to provide a function to match the timing, which poses a problem in that the amount of hardware increases.

An object of the present invention is to provide an interface circuit that can absorb the phase difference between cells from a user terminal and adjust the timing.
- This solves the problem of an increase in the amount of code.

(Means for Solving the Problems) The present invention includes an encoding circuit that encodes an input transmission cell and generates transmission data by adding a cell boundary identification signal, and converts the transmission data into an optical signal and outputs the signal. A transmitting circuit, a receiving circuit that converts the input optical signal into an electrical signal, and a clock from the electrical signal? a clock extraction circuit for reproducing; an identification reproducing circuit for reproducing received data from the electrical signal based on the clock; and a decoding circuit for detecting a cell boundary identification signal from the received data, decoding and outputting a received cell portion. , and a cell transmission timing control circuit that outputs the received cell at a predetermined timing.

(Operation) Transmitted cells from the communication device are encoded by an encoding circuit and a cell boundary identification signal is attached. The transmitting circuit converts this into an optical signal and outputs it to the transmission line. On the receiving side, by detecting this cell boundary identification signal, the cell boundary can be recognized and the transmitted cell can be taken out. On the other hand, the optical signal sent via the transmission path is converted into a stain signal by the receiving circuit, and the clock is recovered by the clock extracting circuit. The identification and regeneration circuit regenerates received data from the electrical signal based on the clock. The decoding circuit detects a cell identification signal from the received data and identifies the part of the received cell? Decrypt and output. The cell transmission timing control circuit outputs the cell in accordance with the timing from the receiving cell and the communication device.

(Embodiment) FIG. 1 is a block diagram showing an embodiment of the present invention. In the figure, input terminals 1, 2.3 and output terminal 4 are connected to a communication device (not shown), and a single fiber transmission line 15 is connected to a user terminal (not shown). Input terminal IVi
It is an input terminal of the transmitting cell and is connected to a first input of the encoding circuit 12.

Input terminal 2 is an input terminal for a cell synchronization signal, and is connected to the second input of encoding circuit 12 and cell transmission timing control circuit 21.
The input terminal 3 is a clock input terminal and is connected to the input of the multiplier circuit 11, the third input of the encoding circuit 12, and the fifth input of the cell sending timing control circuit 2. has been done. The output of the multiplier circuit 11 is connected to the fourth input of the encoding circuit 12, and the output of the encoding circuit 12 is connected to the light emitting element driving circuit 13.
3 is connected to a light emitting element 14, and the output of the light emitting element 14 is connected to an optical fiber transmission line 15.

Further, the input of the light receiving element 160 is connected to the optical fiber transmission line 15, and the output thereof is connected to the input of the amplifier circuit 17. The output of the amplifier circuit 17 is connected to the input of the clock extraction circuit 18 and the first input of the identification and regeneration circuit 19, and the first output of the clock extraction circuit 18 is connected to the second input of the identification and regeneration circuit 19 and the decoding circuit 20. The second output of the clock extraction circuit 18 is connected to the third input of the decoding circuit 20 and the third input of the cell sending timing control circuit 2. The output of the identification reproduction circuit 19 is sent to the decoding circuit 2.
0, the first output of the decoding circuit 20 is connected to the first input of the cell transmission timing control circuit 21, and the second output of the decoding circuit 20 is connected to the first input of the cell transmission timing control circuit 21. The output of the cell sending timing control circuit 21 is connected to the output terminal 4.

Next, the operation of this embodiment will be explained. First, a case will be described in which a transmission cell is sent from a communication device to a user terminal via a transmission cell combination interface circuit. A transmission cell 32 sent from the communication device is applied to the encoding circuit 12 via the input terminal 1, and a cell synchronization signal 33 . A clock 30 is also applied to the encoding circuit 12 or the multiplier circuit 1 via the input terminal 2.3f. The encoding circuit 12 parallel-to-serial converts the received transmission cell 32 using the input clock 3Q and the clock 31 multiplied by the multiplier circuit 11, encodes it, and adds a complete synchronization pattern based on the cell synchronization signal 33. This is output to the light emitting element drive circuit 13 as transmission data 34. The synchronization code is added to the beginning of the cell and is used to identify the cell boundary, and therefore must not match the encoded code for the cell. For this purpose,
Encoding may be performed according to an encoding rule that prohibits a certain specific code string, and this may be used as a pattern for synchronizing all of the prohibited codes. For example, cells may be encoded according to the so-called 4B5B rule, which converts a 4-bit code into a 5-bit code, and a prohibited code that does not correspond to the 4-bit code among the 5-bit codes may be used as the synchronization pattern. The light emitting element drive circuit 13 drives the light emitting element 14, and the optical signal converted into light by the light emitting element 14 is output to the optical fiber transmission line 15 and sent to the user terminal.

Furthermore, on the transmitting side of the user terminal, in the same building as above, four synchronization turns are attached to each cell to identify cell boundaries, and the signal is converted into an optical signal and sent to the interface circuit via the optical fiber transmission line. It is something.

Next, a case will be described in which all data received from the user terminal is sent to the communication device via the interface circuit. The light receiving element 16 converts the optical signal 36 sent from the user terminal via the optical fiber transmission line 15 into an electrical signal.

The amplifier circuit 12 amplifies the output of the light receiving element 16 to a logic level.The clock extraction circuit 18 regenerates the entire high-speed clock 37 from the output of the amplifier circuit 17, generates a low-speed clock 38 by branching, and outputs the high-speed clock. 37 identification reproduction circuit 1
9 and the decoding circuit 20, and a low-speed clock 38 is output to the decoding circuit 20 and the cell sending timing control circuit 21, respectively. The identification and regeneration circuit 19 regenerates the received data output from the amplifier circuit 17 based on the high-speed clock 37, and transmits the regenerated received data 39 to the decoding circuit 20.
Output to.

The decoding circuit 20 extracts the received cells by detecting the synchronization turn of the received data 39 and identifying cell boundaries, and performs serial-to-parallel conversion based on the high speed clock 37 and the low speed clock 38. The parallel received cell 41 is output to the cell transmission timing control circuit 21, and a cell synchronization signal 40 synchronized with the received cell is also generated and outputted to the cell transmission timing control circuit 21 as well. The cell sending timing control circuit 21 has a bit phase set to the low speed clock 3.
8, the cell timing is synchronized with the cell synchronization signal 40, the bit phase is synchronized with the clock 30 from the communication device, and the cell timing is synchronized with the cell synchronization signal 33 from the communication device. It is converted into a synchronized parallel reception cell 42 and outputted through all output terminals 4.

Therefore, when a large number of interface circuits of this embodiment are connected to a communication device, by supplying all the common cell synchronization signals and clocks from the communication device to each interface circuit, the received cells sent from each interface circuit to the communication device can be All can be synchronized to the cell synchronization signal and clock.

(Effects of the Invention) As described in detail above, according to the present invention, each cell can be outputted at a predetermined timing based on the cell boundary identification signal attached to each cell, so that the same communication device can Even when a large number of interface circuits are connected, it is possible to synchronize the transmission timing of all received cells sent from each interface circuit to a communication device to a common timing.

Therefore, signal processing in the communication device becomes easy, and the size and cost of the communication device can be reduced.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a block diagram of a conventional interface circuit, and FIG. 3 is an explanatory diagram of a communication system using the interface circuit. 1.2.3...Input terminal, 4...Output terminal, 11.
... Multiplier circuit, 12... Encoding circuit, 13... Light emitting element drive circuit, 14... Light emitting element, 15... Source fiber transmission line, 16... Light receiving element, 17... Amplification Circuit, 18... Black and red extraction circuit, 19... Identification reproduction circuit, 2o... Decoding circuit, 21... Cell sending timing control circuit. Patent Applicant: Oki Electric Industry Co., Ltd. 4 Reverse Arrival n Interface Ro 4 Winter 7 Death

Claims (1)

[Scope of Claims] 1. In an interface circuit that exchanges signal cells via an optical fiber transmission line, an encoding circuit that encodes an input transmission cell and generates transmission data by adding a cell boundary identification signal; A transmission circuit that converts transmission data into an optical signal and outputs it to an optical fiber transmission line; a reception circuit that converts an optical signal input from the optical fiber transmission line into an electrical signal;
a clock extraction circuit that regenerates a clock from the electric signal; an identification regeneration circuit that regenerates received data from the electric signal based on the clock; and a cell boundary identification signal that detects a cell boundary identification signal from the received data and decodes a received cell portion. An interface circuit comprising: a decoding circuit that outputs the received cell; and a cell transmission timing control circuit that outputs the received cell at a predetermined timing. 2. The interface circuit according to claim 1, wherein the transmitting cell and the receiving cell are transmitted and received by parallel transmission. 3. The interface circuit according to claim 1, wherein the encoding in the encoding circuit is an encoding in which the code string of the cell boundary identification signal is prohibited from a code string in which other signals are encoded.