JPH02228743A - System for data transfer between storage devices - Google Patents

Abstract

PURPOSE:To expand data most suitably for high-speed operation to shorten the execution time of a program by transferring data, which are arranged at certain intervals on a main storage device, to an extended storage device by the instruction from a high-speed operation processing device. CONSTITUTION:A high-speed operation processing device 2 sends a data transfer request 100 to an extended storage data transfer processing part 6, and an operation code which indicates a request for data transfer from a main storage device 4 to an extended storage device 5, a start address a on the main storage device 4, data length n of one block unit, an inter-element distance m which indicates intervals of existence of block data to be transferred, a number l of transfer blocks, and a start address on the extended storage device 5 are added to this request 100. The extended storage data transfer processing part 6 reads out desired data from the main storage device 4 by the data transfer request from the high-speed operation processing device 2 and writes this data in the indicated address on the extended storage device 5 at indicated inter- element intervals. Thus, array data is so expanded that high-speed operation is possible, and the execution time of the program is shortened.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an inter-storage device data transfer system, and in particular to an inter-storage device data transfer system that transfers data between a main storage device and an expanded storage device in response to a data transfer command from an arithmetic processing unit. Regarding data transfer method.

In a supercomputer that performs large-scale scientific and technical calculations, it is difficult to store all of the target data in the main memory. Therefore, a large-capacity extended storage device that is capable of high-speed data transfer with the main memory is provided, and data that cannot be stored in the main memory is stored on the extended storage device.

Conventionally, in data transfer between the main memory and expanded storage of a supercomputer connected to this type of expanded storage, data such as three-dimensional array data is transferred from the expanded storage to the main storage. In this case, it is not possible to directly expand the data for each dimension as a block in the main memory at appropriate intervals to enable high-speed calculation.
- After data is transferred to the main memory, the data must be expanded so that high-speed calculations can be performed using instructions on a high-speed processor.

In the conventional data transfer control method between storage devices mentioned above,
Extended memory bag! Since it is not possible to expand data directly onto the main memory so that high-performance calculations can be performed, the data must be expanded through a high-speed processor, which has the drawback of increasing program execution time. be.

SUMMARY OF THE INVENTION An object of the present invention is to provide an inter-storage device data transfer method that allows array data to be expanded directly onto a main storage device for high-speed calculation.

According to the present invention, there is provided an inter-storage device data transfer method for transferring data between a main storage device and an extended storage device in response to a data transfer instruction from an arithmetic processing unit, wherein the data transfer instruction includes: , the start addresses of the transfer destination and the transfer source, the block length and inter-block distance of the data serving as the transfer unit, and the number of blocks of data to be transferred, and these start addresses.

An inter-storage device data transfer system is obtained, which is characterized in that data is transferred block by block in sequence according to the block length, inter-block distance, and number of blocks.

K-ko Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention.9 The information processing device of this embodiment includes a system control device 1 and a plurality of high-speed arithmetic processing devices 2 (2-1 and 2-1) connected thereto.
2), an ultra-high-speed, large-capacity main storage device 4, a large-capacity expansion storage device 5 capable of high-speed data transfer with the main storage device 4, and an input/output processing device 3. ing.

The system control unit 'f11 is provided with a data buffer 7 for temporarily storing data transferred between the 1 storage device 4 and the extended storage device 5. Furthermore, data transfer between the main memory device 4 and the data buffer 7 is controlled based on the main memory start address, block length, and inter-element distance instructed by the high-speed arithmetic processing device 2, and An extended storage data transfer processing section 6 is provided that transfers data between the extended storage device 5 and the data buffer 7 according to the starting address of the expanded storage device.

Next, taking as an example a case where one piece of data of length n bytes existing at an interval of length m bytes from address a on the main storage device 4 is transferred to address b on the extended storage device 5, the time chart in FIG. The operation will be explained using the data transfer diagram shown in FIG.

The high-speed arithmetic processing device 2 receives an operation code indicating that it is a data transfer request from the main storage device 4 to the extended storage device 5, a start address a on the main storage device, a data length n in units of one block, Data transfer request 10 with inter-element distance m indicating the interval at which block data to be transferred exists, number of transfer blocks g, and start address b on the extended storage device
0 is issued to the extended storage data transfer processing unit 6.

When the expanded storage data transfer processing unit 6 that has received the data transfer request 100 recognizes from the operation code that the data is to be transferred from the main storage device 4 to the expanded storage device 5, it checks the usage status of the main storage device 4, and When it becomes accessible, the main memory 4 starts with the first address a, then a0m, a+2m,..., a+(11!-1)
A read request is issued continuously up to address xm, and the transfer data read from the main storage device 4 is stored in the data buffer 7.

When all nine pieces of data of n-byte pro-y length to be transferred from the main storage device 4 have been read and stored in the data buffer 7, the extended storage data transfer processing unit 6 transfers the successive data to the extended storage device. In order to transfer to the extended storage device 5, the first address b on the extended storage device 5 is
Send a write request to.

When writing to the extended storage device 5 becomes possible, the transfer data stored in the data buffer 7 is transferred continuously. When the data transfer of all the transfer data to the extended storage device 5 is completed, the extended storage data transfer processing section 6 sends a completion report 101 to the high speed arithmetic processing device 2.

Additionally, if an error is detected in the main storage device 4 or expansion storage device 5 during data transfer, the error information is included in the completion status when reporting completion, and the data transfer is abnormally terminated to the high-speed processing unit 2. notify you of what has happened.

Here, data transfer from the main storage device 4 to the expanded storage device 5 has been described, but in data transfer from the expanded storage device 5 to the main storage device 4, the expanded storage data transfer processing unit 6 is The desired data may be read from the extended storage device 5 in response to a data transfer request from the main storage device 5, and written to the specified address on the main storage device at the specified inter-element distance.

As explained above, according to the present invention, by transferring data arranged at regular intervals on the main memory device to the expansion storage device in response to instructions from a high-speed arithmetic processing unit, expansion is possible. Data can be developed in an appropriate manner so that high-speed calculations can be performed directly from the storage device onto the main storage device, which has the effect of shortening program execution performance.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of an embodiment of the present invention, Fig. 2 is a time chart during data transfer, and Fig. 3 is an image diagram of the data arrangement in each device during data transfer. ...System control device 2...High-speed arithmetic processing device 4...Main storage device 5...Extended storage device 6...Extended storage data transfer processing Part 7...
・Data buffer

Claims (1)

[Claims] (1) An inter-storage device data transfer method in which data is transferred between a main storage device and an expanded storage device by a data transfer instruction from an arithmetic processing unit, wherein the data transfer instruction is transmitted to each of the transfer destination and transfer source. Contains the start address, the block length and inter-block distance of the data that is the unit of transfer, and the number of blocks of data to be transferred, and sequentially transfers data block by block according to the start address, block length, inter-block distance, and number of blocks. An inter-storage device data transfer method characterized by: