JPH02226884A - Video signal processor - Google Patents

Abstract

PURPOSE:To reduce a video image in the horizontal direction in an excellent way by adopting a video signal for a horizontal blanking period as a video signal not compressed timewise. CONSTITUTION:A storage leans 2 is provided, which reads a video signal based on a write clock signal CK 1 having a 1st frequency and reads a video signal stored based on a readout clock signal CK 2 having a 2nd frequency higher than the 1st frequency. Then an input video signal not through the storage means 2 is outputted for the horizontal blanking period and the video signal from the storage means 2 outputs for a remaining period, then no timewise compression processing is applied to the video signal for the horizontal blanking period and the processing such as clamping of a pedestal level and horizontal synchronization of the video image is ensured for the horizontal blanking period in the video display device. Thus, the video image is compressed in the horizontal direction in an excellent way.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention is suitably implemented in cases where a video signal having an aspect ratio different from the aspect ratio is input to a video display device having a unique aspect ratio. The present invention relates to a video signal processing device.

[Conventional technology]

Generally, when a video signal having a horizontal aspect ratio smaller than its own aspect ratio is input to a video display device, the video is expanded in the horizontal direction and displayed. For example, aspect ratio 4:3 (horizontal width: vertical width)
As shown in FIG. 5 (1) in a video display device, the ratio of the horizontal width W) (1 of the display area to the vertical width WVI is 4; 3, and in this case, the aspect ratio is 4, which represents a circular figure. When a video signal of =3 is input to a video display device with an aspect ratio of 16:9, as shown in FIG. Therefore, when inputting a video signal with an aspect ratio of 4:3 to a video display device with an aspect ratio of 16:9, an elliptical figure stretched in the direction shown in FIG. 5 (3) is displayed. In order to display an image in an area where the horizontal width WH3 is 4/3 times the vertical width WV2, the image must be made thinner in the horizontal direction, and video signal processing is required for this purpose. Become.

A typical prior art technique for processing such video signals is shown in FIG. This video signal processing device is
For example, it is used when inputting a video signal with an aspect ratio of 4:3 to a video display device with an aspect ratio of 16:9.

A video signal with an aspect ratio of 4:3 from the input terminal IN is converted into a digital video signal by an analog/digital converter 1 (hereinafter referred to as "A/D converter 1"), and is converted into a digital video signal for l horizontal scanning period. is applied to line memory 2 for storing. This line memory 2 takes in and stores therein the digital video signal from the A/D converter 1 in accordance with the write clock signal CK1 of frequency 11. The digital video signal stored in this line memory 2 is a read clock signal C having a frequency 12 higher than the frequency f.
K2, and this read digital video signal is converted into digital/analog converter 13 (rD/A
The signal is converted into an analog video signal by a converter 3) and output to an output terminal OUT. This output terminal 0tJT
A video display device (not shown) having an aspect ratio of 16:9 is connected to.

The frequency f2 of the read clock CK2 is r, -(4/
3) ・f.

Therefore, the video signal for one horizontal scanning period is
The data will be read from the line memory 2 in a time of /4. At this time, the video signal (
In other words, the video signal during the period other than the horizontal blanking period) is
The image is read out at a timing such that the image is located at the center of the display area.

As a result, when the video signal shown in FIG. 2(1) is input from the input terminal IN, a video signal having the waveform shown in FIG. 2(2) is derived from the output terminal 0tJT.

That is, after a period Δl has elapsed since the compressed video signal corresponding to the input video signal in the horizontal blanking period ΔB is derived in the period ΔB1, the input video signal in the scanning period ΔH is converted into (3/4) ΔH. A video signal compressed to a period of length ΔH1 is derived. As a result, in the video display device, the video is compressed by 3/4 times in the horizontal direction and displayed in the center of the display area, so that video with an aspect ratio of 4:3 can be displayed well. Become.

[LIU to be Solved by the Invention] However, in the above configuration, the video signal of the horizontal blanking period ΔB as well as the video signal of the scanning period ΔH is
Because of this, the video signal is compressed to four times as long as the video signal.
There is a problem in that the horizontal synchronization of the video and the clamping of the pedestal l/bell, which should be performed during the horizontal blanking period, may not be performed accurately.

It is an object of the present invention to provide a video signal processing device that solves the above-mentioned technical problems and allows good compression of video in the horizontal direction.

[Means to solve the problem]

A first video signal processing device according to the present invention reads an input video signal based on a write clock signal of a first frequency, and reads an input video signal based on a read clock signal of a second frequency higher than the first frequency. It is equipped with a storage means for outputting a video signal, outputs an input video signal during a horizontal blanking period,
During the remaining period, the video signal switching means switches to output the video signal output from the storage means.

A second video signal processing device of the present invention includes a storage means for reading an input video signal based on a write clock signal of a first frequency and outputting the read video signal based on a read clock signal. As a readout clock signal for reading a video signal from the storage means, a first readout clock signal is applied to the storage means during the horizontal blanking period, and a second readout clock signal having a second frequency higher than the first frequency is applied during the remaining period. 2
The clock signal switching means switches the reading clock signal to the storage means.

[Effect]

According to the first video signal processing device, the video signal is read from the storage means based on the read clock signal having a second frequency higher than the first frequency of the write clock signal. The signal becomes a video signal obtained by temporally compressing the input video signal. Therefore, when this video signal is input to a video display device, the video is displayed reduced in the horizontal direction.

The video signal from the storage means is input to the video signal switching means, and the video signal switching means switches and outputs the video signal from the storage means and the direct input video signal not via the storage means. That is, during the horizontal blanking period, the input video signal not passing through the storage means is output, and during the remaining period, the video signal from the storage means is output. The output of this video signal switching means is then input to a video display device or the like.

As a result, the video signal during the horizontal blanking period is not subjected to the above-mentioned temporal compression processing, and therefore, in a video display device, horizontal synchronization of the video and clamping of the pedestal level, etc., which should be performed during the horizontal #h line blanking period, etc. are not performed. Processing can now be carried out reliably.

According to the second video signal processing device, the read clock signal applied to the storage means is a first read clock signal having a first frequency equal to the write clock signal during the horizontal blanking period; During the remaining period, a second read clock signal having a higher frequency than the first read clock signal is used.

As a result, the video signal output from the storage means is not subjected to temporal compression processing during the horizontal blanking period, but is subjected to the compression processing only during the remaining period.

〔Example〕

FIG. 1 is a block diagram showing the basic configuration of an embodiment of the present invention. In FIG. 1, parts corresponding to those shown in FIG. 6 described above are designated by the same reference numerals.

This video signal processing device receives input from input terminal [N and A].
The video signal converted into a digital signal by the /D converter 1 is converted into a write clock signal CKI having a first frequency f.
a second frequency higher than the first frequency.
A line memory 2 is provided as a storage means from which the stored video signal is successively read out based on a read clock signal CK2 having a frequency r. The output of this line memory 2 is applied to a D/A converter 3, converted into an analog signal, and then applied to one individual contact 4b of a video signal switching circuit 4.

The other individual contact 4a of this video signal switching circuit 4 has an input terminal! The input video signal from N is directly given. This video signal switching circuit 4 connects its common contact 4C to the individual contact 4a during the horizontal blanking period, and to the individual contact 4b during the remaining period. The video signal derived from the common contact 4C is then given to the output terminal OUT, and is input from this output terminal OUT to a video display device (not shown).

In this embodiment, when inputting a video signal with an aspect ratio of 4:3 to a video display device with an aspect ratio of 16:9, the relationship between the first frequency r and the second frequency r is (R- (4/3) ・r.

A/D conversion converter child in-memory 2. The D/A converter 3 performs the same operation as the configuration shown in FIG. 6, and therefore when a video signal with an aspect ratio of 4:3 shown in FIG. 2 (1) is input to the input terminal IN. The video signal applied from the D/A converter 3 to the individual contact 4b of the video signal switching circuit 4 becomes the video signal shown in FIG. 2(2). On the other hand, at this time, the video signal shown in FIG. 2(1) is applied to the individual contact 4a of the video signal switching circuit 4. As described above, the video signal switching circuit 4 connects its common contact 4C to the individual contact 4a during the horizontal blanking period, and connects the common contact 4C to the individual contact 4b during the remaining period, so that the output terminal OUT In this case, the video signal shown in FIG. 2 (3) is derived.

That is, only the video signal of the scanning period ΔH is compressed, and the video signal of the horizontal blanking period ΔB is not subjected to temporal compression processing, and is supplied from the output terminal OUT to the video display device. . As a result, the video display device can reliably perform horizontal synchronization of the video and clamping of the pedestal level, which should be performed during the horizontal blanking period. Moreover, the video signal of the scanning period ΔH of the input video signal is compressed into the period ΔH1, which is 3/4 times as long as the scanning period ΔH, so the video is horizontally 3/4
It will be reduced in size and displayed in the center of the display area. In this way, reduction of the image in the horizontal direction can be performed satisfactorily while ensuring horizontal synchronization and pedestal clamping.

FIG. 3 is a block diagram showing the basic configuration of another embodiment of the invention. In FIG. 3, parts corresponding to those shown in FIG. 1 described above are given the same reference numerals. In this embodiment, a video signal switching circuit 5 is provided between the line memory 2 and the D/A converter 3, and the video signal switching circuit 5 converts the signal to an A/D converter and converts it into a digital signal. The input video signal and the digital video signal from the line memory 2 are switched and fed to the D/A converter 3. The video signal switching circuit 5 connects its common contact 5C to the individual contact 5a to which the digital video signal from the A/D converter 1 is directly applied during the horizontal blanking period, and during the remaining period Connect to the individual contact 5b connected to the line memory 2. With such a configuration as well, it is possible to achieve the same functions and effects as described in connection with the first embodiment.

FIG. 4 is a block diagram showing the basic configuration of still another embodiment of the present invention. In this Figure 4, the first
In this embodiment, the parts corresponding to each part shown in the figure are given the same reference numerals. In this embodiment, the read clock signal applied to the line memory 2 is changed into two types by the switching operation of the clock signal switching circuit 7. do. In the clock signal switching circuit 7, a first read clock signal CKI having a first frequency f and also serving as a write clock signal is derived from an individual contact 7a, and a first read clock signal CKI which has a first frequency f and also serves as a write clock signal is derived from an individual contact 7b. A second frequency “2” (e.g. t
, -(4/3)·r, ) is provided.

The clock signal switching circuit 7 connects its common contact 7c to the individual contact 7a side during the horizontal blanking period, and connects it to the individual contact 7b side during the remaining period. As a result, in the line memory 2, writing and reading of the digital video signal are performed at the same speed during the horizontal blanking period, and reading is performed at a higher speed than writing during the remaining period.

Therefore, only the video signal of the scanning period involved in display is temporally compressed. For example, when the video signal shown in FIG. 2 (1) is input from the input terminal IN,
The video signal shown in FIG. 2(3) will be derived from the output terminal OUT. In this way, the same effects as described in connection with the first embodiment described above can also be obtained in this practical example.

In the third example shown in FIG. 4, the write clock signal and the read clock signal of the line memory 2 during the horizontal blanking period were made to be the same. The write clock signal and the read clock signal having the same frequency may be provided separately.

〔Effect of the invention〕

As described above, according to the video signal processing device of the present invention, the video signal during the horizontal blanking period can be made into a video signal that is not compressed in time. While ensuring that processing such as horizontal synchronization of the video and clamping of the pedestal level that should be performed during the period is performed, the reduction in the horizontal direction of the video can be performed satisfactorily.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the basic configuration of one embodiment of this invention, FIG. 2 is a waveform diagram for explaining the operation, and FIG. 3 is a basic configuration of another embodiment of this invention. FIG. 4 is a block diagram showing the basic configuration of still another embodiment of the present invention, FIG. 5 is an explanatory diagram showing simplified display B in the video display device, and FIG. 6 is a preceding diagram. FIG. 1 is a block diagram showing the basic configuration of the technology.

Claims (2)

[Claims] (1) Read an input video signal based on a write clock signal of a first frequency, and read a write clock signal of a second frequency higher than the first frequency.
storage means for outputting the read video signal based on a read clock signal of a frequency; the video signal from the storage means and the input video signal are provided; and video signal switching means for outputting the video signal from the storage means during the remaining period. (2) storage means for reading an input video signal based on a write clock signal of a first frequency and outputting the read video signal based on a read clock signal; a first readout having the first frequency; a clock signal;
a second frequency having a second frequency higher than the first frequency;
the first read clock signal is applied to the storage means during the horizontal blanking period;
and clock signal switching means for applying the second read clock signal to the storage means during the remaining period.