JPH02224574A - Screen display device - Google Patents

Abstract

PURPOSE:To overcome instability of a rising of a vertical synchronizing signal and to prevent fluctuation of a screen by using both output signals from a one-shot pulse output means and a clear means to clear a count of an H counter. CONSTITUTION:An H counter 10 is not only cleared by a clear signal based on a horizontal synchronizing signal from a clear means 911 but also cleared by a one-shot pulse outputted from a monostable multivibrator 91 as a one-shot pulse output means. That is, when a falling of one-shot pulse or a rising of a vertical synchronizing signal is inputted to the counter 10, the counter 10 clears the count to start the horizontal synchronizing signal inputted via a synchronizing signal changeover circuit from 0. When the scanning by one screen is finished, the vertical synchronizing signal pulse is inputted again to the vibrator 91 and one-shot pulse is outputted to clear the counter 10. Thus, instability of the rising of the vertical synchronizing signal is relieved to prevent the fluctuation of the screen.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a screen display device that displays characters and patterns such as channel numbers in broadcast images displayed on a display device such as a cathode ray tube. .

[Prior Art] FIG. 3 shows an example of the configuration of a conventional screen display device of this type. In FIG. 3, 1 is a display oscillation circuit to which the oscillation output of the π-type LC oscillation circuit 1a is supplied, 2 is a timing generator that generates various timings using the signal oscillated by the display oscillation circuit 1, and 3 is a timing generator for this. Each input terminal 38 to 3c is connected to an external control circuit such as a microcomputer (not shown) for controlling the output of the timing generator 2 and the screen display device.
4 is a data control circuit, 5 is an address control circuit, and 7 is a display data memory for storing control data. , RAM.

A display character memory 8 stores characters and patterns to be displayed in the font structure shown in FIG. 4, and is composed of a ROM. 6 is a display control register that latches commands such as display control among the outputs of the input control circuit 3; 9 is a terminal 9a, 9b;
11 is a synchronization signal switching circuit that selectively outputs either a horizontal or vertical synchronization signal of the image signal supplied to the image signal or a horizontal or vertical synchronization signal generated internally; 11 is a character or pattern in the display device; 13 is a display control circuit, which controls the display of the output of the display character memory 8 according to the display command of the display control register 6. is constituted by the above circuits, and the output of the display control circuit 13 is supplied to the video mixer 17, which outputs a composite video signal via the CVIDEO terminal 17a. Further, from the display control circuit 13, R, G, H color signals, etc. are sent to terminals 13a to 13.
It is output via f. 10 is an H counter, 14 is a shift register, 15 is an oscillation circuit for generating a synchronizing signal to which the oscillation output of the oscillation element circuit 15a is supplied, 16 is a timing generator for generating a synchronizing signal, and 21 is a blinking circuit.

Next, the operation will be explained.

The input control circuit 3 processes control data input from a microcomputer or the like through terminals 38 to 3c, causes a display control register 6 to latch commands such as display control, and displays character codes and the like as display contents. It is stored in the data memory 7. During display, the character code stored in the display data memory 7 accesses the display character memory 8 as output data, and the display character font output from the display character memory 8 is input to the display control circuit 13. Here, in the display data memory 7, one word is (a
10 b) bits, and if the number of characters displayed is C, the total (a+
b) - Consists of C bits. On the other hand, it is assumed that one font of the display character memory 8 is composed of (,QXm) bits, and there are n characters of types. The display timing is determined by inputting a synchronization signal from the image signal to the synchronization signal switching circuit 9, counting this synchronization signal with the H counter 10, and using the display position detection circuit 11 based on this count value to display the characters displayed on the display device. determine the position of The display control circuit 13 synchronizes the display character output with an external video signal, controls the display according to the contents of the display control register 6, outputs it, and supplies it to the video mixer 17. Note that the oscillation circuit 1 for generating a synchronizing signal
5 is the NTSC system or PA by the oscillation element circuit 15a.
It is possible to generate an L-type synchronization signal, and this switching can be performed using the N
/P terminal 15b, and this causes 4fsc
Alternatively, since the 2 fsc oscillation is output and the synchronization signal generation timing generator 16 generates the synchronization signal, it is possible to display on the TV screen even when there is no signal. However, fsc
is the color subcarrier, which is 3;58MHz in the NTSC system.
, in the PAL system, it is 4.43 MHz.

In addition, the video mixer 17 allows NTSC and P
It is possible to generate an AL type composite video signal and to superimpose it onto an external composite video signal. The composite video signal has character level (LECHA), external composite video input (CV I N), and blanking level (LEB).
K) , background carrier color signal input (R8IN), color burst input (CBIN), and sync chip level are switched and synthesized by six signals, CV and IDE.
It is output from the O terminal 17a.

[Problems to be Solved by the Invention] Incidentally, in conventional screen display devices, the count of the H counter is cleared by a clear signal.
Depending on the relationship between the phase of the vertical synchronizing signal and the phase of the horizontal synchronizing signal at the time when the count is cleared, the horizontal synchronizing signal may be counted after the count is cleared. Clock output was stopped. However, according to this, there is a problem that even though the machine has stopped, the clock is lost immediately after the stop and is counted by the H counter 10, causing the display screen to fluctuate.

This invention was made to solve the above problems, and aims to overcome the instability of the rise of the vertical synchronization signal and prevent screen fluctuation.

[Means for Solving the Problems] A screen display device according to the present invention includes a one-shot pulse output means for outputting a one-shot pulse based on a vertical synchronization signal, and a clear signal and a one-shot pulse output means output from the one-shot pulse output means. It is characterized in that the count value of the H counter is cleared by both the one-shot pulse and the one-shot pulse.

[Operation] In the present invention, the count of the H counter is cleared based on the clear signal and the one-shot pulse output from the one-shot pulse output means.

[Example] An embodiment of the present invention will be described below with reference to the drawings.

Note that the same components as those in the prior art are given the same numbers and their explanations are omitted.

FIG. 1 is a block diagram showing an embodiment of the present invention. In the figure, 911 is a clearing means for clearing the H counter 10 in a predetermined period based on the horizontal synchronizing signal, and 91 is a clearing means for clearing the clock rising or falling of the vertical synchronizing signal. This is a monostable multivibrator as a one-shot pulse output means that detects and outputs a one-shot pulse.

Next, the operation will be explained.

The H counter 1o is not only cleared by the clear signal based on the horizontal synchronization signal from the clear means 911, but also performs a primary operation. That is, the input terminal of the monostable multivibrator 91 changes from '1' to IO' or lO by the rise or fall of the pulse of the vertical synchronization signal.
When the level changes from 9 to 11', a one-shot pulse with a predetermined width is output from the output terminal of the monostable multivibrator 91, and this one-shot pulse is input to the H counter 10. When the falling edge of the one-shot pulse or the rising edge of the vertical synchronization signal is input to the H counter 10, the H counter 10 clears the count value and starts counting the horizontal synchronization signal input via the synchronization signal switching circuit 9 from zero. Begin to. When one screen worth of scanning is completed in synchronization with the horizontal synchronization signal, the pulse of the vertical synchronization signal is again input to the monostable multivibrator 91, and the H counter is cleared by the one-shot pulse output from the monostable multivibrator 91. Ru.

FIG. 2 shows a specific example of the clearing means 911 at this time.

In the figure, reference numeral 92 denotes an OR circuit, into which the one-shot pulse output from the one-shot pulse output means and the clear signal from the clear signal output circuit 93 are input, and the pulse outputted from the OR circuit 92. The H counter 10 is cleared by the falling edge of .

Therefore, since the H counter 10 is cleared by the clear signal and the one-shot pulse, an accurate count value can always be obtained.

[Effects of the Invention] As described above, according to the present invention, a one-shot pulse output means for outputting a one-shot pulse based on a vertical synchronization signal is provided, and the one-shot pulse output from the one-shot pulse output means is Since the count value of the H counter is cleared by both the clear signal and the clear signal, accurate counting can be performed at all times, and horizontal screen fluctuations can be prevented.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing one embodiment of the present invention, Fig. 2 is a detailed block diagram of a specific example of the main parts in Fig. 1, Fig. 3 is a block diagram of a conventional screen display device, and Fig. 4 1 is a diagram showing the configuration of fonts in a conventional display character memory. DESCRIPTION OF SYMBOLS 1... Display oscillation circuit, 2... Timing generator, 3... Input control circuit, 4... Data control circuit, 5... Address control circuit, 6... Display control register, 7... ... Display data memory, 8... Display character memory, 9... Synchronization signal switching circuit, 11... Display position detection circuit, 13... Display control circuit, 17...
Video mixer 91... One-shot pulse output means (monostable multivibrator), 911... Clearing means. In the drawings, the same reference numerals indicate the same or corresponding components. Agent Masuo Oiwa (and 2 others) Amendment to No. 2 procedure (voluntary) February 27, 1990 1. Display of case Patent Application No. 1-047508 2. Name of invention screen display device 3. Amendment Person who makes the correction 0 Contents of correction il+In the 12th line of page 7 of the specification, the phrase "problem that the screen fluctuates" is corrected to "problem that the screen fluctuates in the vertical direction." (2) In the same book, page 10, line 12, page 11, line 1, “
The phrase “always accurate” should be corrected to “more accurate.” that's all

Claims (1)

[Scope of Claims] A screen display device that displays characters or patterns on a display device such as a cathode ray tube includes an oscillation circuit that generates signals that serve as reference for various timings, and various timings based on the oscillation signals of the oscillation circuit. A timing generator that generates a signal, an input control circuit that accepts and processes a control signal from an external control circuit such as a microcomputer, a synchronization signal switching circuit that inputs a synchronization signal for the video signal to be displayed on the display device, and a horizontal an H counter that counts synchronization signals and is cleared by a clear signal from a clearing means; a display position detection circuit that detects the display position of the display device from the count value of the H counter; a display data memory that stores control data such as characters, pattern codes, and blinking information to be displayed on a display device; a display character memory that stores fonts of characters to be displayed as the display contents; a video mixer that mixes a predetermined display signal with the video signal in order to display display content at a predetermined position of the display device based on the position detection signal from the position detection circuit; and a one-shot pulse output means for outputting a one-shot pulse based on the vertical synchronization signal, and a one-shot pulse output means for outputting a one-shot pulse based on the clear signal and the one-shot pulse output means. A screen display device characterized by clearing the H counter.