JPH02224249A - Manufacture of silicon substrate - Google Patents

Abstract

PURPOSE:To suppress crystal defects resulting from precipitation of Oi (interlattice oxygen) in element formation area by performing solution heat treatment by two-stage treatment enbloc consisting of first heat treatment at high temperature and second heat treatment at a temperature lower than the first heat treatment succeeding to this. CONSTITUTION:To an Si substrate which is cut out from Si single crystals, heat treatment is applied for a certain time at 1100 deg.C or more as first heat treatment, successively heat treatment is applied for a certain time within the temperature range of not more than the temperature of the first heat treatment, and not less than 650 deg.C as second heat treatment. As a result, it is known that for the change of Oi concentration distribution toward the inside from the surface of the Si substrate, Oi concentration at the surface of the Si substrate lowers more and low concentration progress of Oi advances more inside on the side after the second heat treatment shown by a solid line in the figure than that after the first heat treatment shown by a broken line. Hereby, Oi precipitation in an element formation area can be prevented, and generation of crystal defects resulting from that can be suppressed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a Si substrate used for manufacturing semiconductor devices, and in particular, to a method for manufacturing a Si substrate with enhanced gettering ability.
The present invention relates to pre-heat treatment for manufacturing a substrate.

[Conventional technology]

Today, semiconductor devices such as large-scale integrated circuits are manufactured under extremely high cleanliness conditions, but extremely small amounts of contaminant impurities (
For example, heavy metals such as iron, nickel, copper, etc.) are incorporated into the Si substrate, which induces various crystal defects, or
It is known that deep levels are formed, which deteriorates the electrical characteristics of manufactured semiconductor devices (dielectric breakdown voltage of thin oxide films, leakage of p-n junctions, etc.) and causes a decrease in product yield. .

Gettering technology is a technology for removing such contaminant impurities from the element formation region, and one of them is intrinsic getterlink (intrinsic getterlink).
eettering (hereinafter referred to as IG) is widely known. IG is the Czochralski Method, which is widely used in LSI manufacturing.
Interstitial oxygen (Interstitial Oxygen) of about 1 to 2 × 10 atoms/cni is contained in a supersaturated state in a Si substrate manufactured from a single Si crystal.
Oi (hereinafter referred to as Oi) is a technology that captures and fixes contaminant impurities in crystal defects caused by precipitation centered on precipitation nuclei.

Note that the Oi concentration described in this specification is AST
M (American 5 standards for
Testing and Measurement) Old standard infrared conversion coefficient 4.8X10”atoms/cm
-' is the value determined by infrared spectroscopy, and all values measured by analysis methods other than infrared spectroscopy have been converted to values determined by infrared spectroscopy.

Normally, when IG is used, if Oi precipitation occurs in the element formation region, there is a risk of deterioration of device characteristics and a decrease in product yield. Therefore, at a constant temperature of about 1100°C, Si
Heat treatment is performed to outward diffuse Oi on the substrate surface and to reduce or eliminate latent precipitation nuclei formed within the crystal during the growth of the Si single crystal.

This is generally called solution treatment, but it does not completely eliminate all latent precipitation nuclei. Next, in this state O
Because the i-precipitation nuclei have shrunk, the precipitation rate of Ol during the heat treatment in the subsequent element manufacturing process is significantly reduced, and sufficient Oi precipitation is not obtained and the gettering effect is reduced.
Treatment is performed to promote Oi precipitation by reforming or growing Oi precipitation nuclei through heat treatment at a relatively low temperature of ~950°C.

This is generally called a nucleation process, but since Ol on the Si substrate surface is diffused outward, Oi in the element formation region
The probability that precipitation nuclei will be formed is extremely low. Furthermore, 100
In some cases, heat treatment is performed to precipitate Oi by heat treatment at about 0° C. to 1150° C. and to stabilize Oi precipitation in the subsequent element manufacturing process.

The above heat treatment is performed by Japanese Journa.
l of Applied Physics, Voi, 2
3. No,] (1984) pp, L9-Ll 1 or Japanese Patent Publication No. 1-19265, etc., and a denuded zone (Denuded zone) is formed on the surface of the Si substrate after the device is formed.
A surface defect-free layer called a defect-free zone (hereinafter referred to as DZ) is formed, and a high density of crystal defects is formed inside the Si substrate.

[Problem to be solved by the invention]

In the DZIG substrate manufactured by the conventional manufacturing method described above, a low-temperature nucleation treatment is performed after a high-temperature solution treatment. , the latent precipitation nuclei that remain without disappearing grow significantly during the nucleation process, and in the later process, Oi is precipitated on these latent precipitation nuclei, and crystal defects due to O1 precipitation are also generated in the element formation region. It has the disadvantage of being easily induced.

For example, when solution treatment is performed at 1180°C for 4 hours, the O1 concentration of the Si substrate becomes extremely low at the extreme surface due to outward diffusion, but since O1 is constantly supplied from the bulk side, the O1 concentration from the surface becomes extremely low. At the position of 5 μm, the Oi concentration is 5~
The Oi concentration increases rapidly in the depth direction (see Figure 1).
. In the element manufacturing process, Oi precipitation tends to proceed at 1000°C.
Heat treatment before and after is often used, but Oi S at 1000℃
The solid solubility limit in i is 3 to 4 X I O”atoms/cn
? Therefore, in the region around 5 μm, crystal defects occur due to Oi precipitation, although the precipitation rate is slow. Generally, in today's large-scale integrated circuits, the preservation of the element formation region is estimated to be about 2 to 3 μm from the surface, but even if Oi precipitates were formed at a position 5 μm deeper than the element formation region, Dislocations occur from the O1 precipitates and easily reach the device region during the device manufacturing process, resulting in deterioration of device characteristics. In addition, in recent years, trench structures used for element isolation and the formation of capacitive parts of memory elements have been formed on Si substrates from several μm to
It is formed with a thickness of about a few micrometers and is used as a component of the device, and the device formation area tends to be maintained and is directly affected by the crystal defects caused by Oi precipitation that occur in the shallow part of the Si substrate. .

If the solution treatment temperature were lowered, the Oi solid solubility limit would decrease and the concentration of Oi in the element formation region would tend to decrease, but the diffusion rate of Oi would decrease and an extremely long heat treatment would be required. Moreover, at temperatures below 1100°C, at the same time as solutionization (reduction of precipitated nuclei), large-sized latent precipitated nuclei are
i-precipitation also progresses at the same time, causing crystal defects in the element formation region.

If the solution temperature is increased, the diffusion rate of Oi will increase, but the solid solubility limit of Oi will also increase, which is disadvantageous for reducing the Oi concentration in the element forming region.

[Means to solve the problem]

In the method for manufacturing a Si substrate of the present invention, a first heat treatment is performed on a Si substrate cut out from a C2 crystal at a temperature of 1100°C or higher for a desired time, and then a second heat treatment is performed at a lower temperature than the first heat treatment. It is characterized by performing heat treatment at a temperature range of 950° C. or higher for a desired period of time.

Further, the O1 concentration of the Si substrate to be heat treated is 16. OX
If it is 101 Tatoms/- or more, only the first heat treatment and the second heat treatment are sufficient, and internal crystal defects can be formed by Oi precipitation on Z and the remaining reduced precipitation nuclei, but 16. If OX is less than 10"atoms/cff1, heat treatment is added after the second heat treatment to re-form or grow precipitation nuclei inside the Si substrate where Oi remains at a sufficient concentration at a temperature of less than 950°C. It is desirable that the Oi concentration is 16.OX 10” atom
In a Si substrate with a temperature lower than s/crd, the density and size of latent precipitation nuclei are small, and the first. This is because if only the second heat treatment is performed, sufficient O1 precipitation may not be obtained in the subsequent element manufacturing process, and the gettering effect may deteriorate. The third heat treatment is
O1 concentration is 16. Ox l Olyatoms/ly8
Although it is applicable to the above case, it is necessary to adjust the first to third heat treatment conditions as appropriate so that Oi precipitation does not proceed excessively in the subsequent element manufacturing process and plastic deformation does not occur in the Si substrate.

Note that the upper limit of Oi concentration to which the present invention can be applied is 19.5
X 10 ''atoms/cnt or less, and if the Oi concentration exceeds this, abnormal precipitation of Oi occurs at the time of the first heat treatment, the DZ width becomes narrow, and crystal defects due to Oi precipitation also occur on the Si substrate surface.

FIG. 1 conceptually shows the change in Oi concentration distribution from the surface of the Si substrate toward the inside in the present invention.

In the figure, the broken line is the Oi concentration distribution after the first heat treatment, and the solid line is the Oi concentration distribution after the second heat treatment performed after the first heat treatment. After the second heat treatment than after the first heat treatment,
The O1 concentration on the surface of the Si substrate is decreasing, and the Oi concentration is decreasing further into the interior. Note that the Oi concentration distribution after the third heat treatment is almost unchanged from after the second heat treatment because the treatment temperature is low. The figure also shows the O1 concentration distribution in the case where the first heat treatment time is simply lengthened, that is, in the case of the conventional technique. In this case, the low Oi concentration region expands slightly, but the change in the Oi concentration on the surface However, in the present invention, the low Oi concentration region on the Si substrate surface corresponding to the element formation region is expanded.

Note that when the first heat treatment and the second heat treatment are performed independently, the Si substrate is cooled to room temperature once between the heat treatments. During the second heat treatment, Oi precipitation nuclei are most likely to form and grow between 600°C and 90°C in the process of increasing the temperature from room temperature to the heat treatment temperature.
Since it will undergo heat treatment in the temperature range of 00℃, Si
The possibility of occurrence of crystal defects due to Oi precipitation increases in the substrate surface region. Therefore, the first. It is desirable that the second heat treatment be performed continuously and all at once in the same heat treatment furnace.

〔Example〕

Next, the present invention will be explained by giving examples.

In the first example, the diameter is 150+nm and the Oi concentration is 18x.
A P-type Si substrate of 10" atoms/ad was subjected to solution treatment at 1180°C for 4 hours as the first heat treatment and at 1050°C for 6 hours as a continuous second heat treatment.For comparison with the conventional technology, the same Si substrate was We also prepared samples that were heat-treated at 1180°C for 6 hours and at 700°C for 10 hours.CMOS memory devices using wells with a depth of 5 μm were manufactured on these Si substrates, and the yields were compared. The Si substrate of the example showed an improvement in the yield rate of about IO% over the Si substrate of the prior art, confirming the superiority of the present invention.

Furthermore, the Si substrates for which the yield evaluation had been completed were cleaved, and the crystal defect distribution in the cross section of the Si substrates subjected to light etching was investigated. FIG. 2 shows the crystal defect density distribution from the surface of the Si substrate at this time.

The defect density referred to here is a value calculated from the number of defects observed within a field of view of 5 μm from the surface.

In this example, completely defect-free conditions were achieved up to a depth of 20/J m, and the element formation region existed within the DZ.

On the other hand, in the Si substrate according to the prior art, defects were already observed at a depth of 5 μm, although the density was low. In addition, the defect density increases steeply from a depth of 30 μm in this example, whereas in the conventional technology, it tends to increase gradually from near the surface, as shown in Figure 1. This reflects the Oi concentration distribution after such heat treatment.

Next, a second embodiment of the present invention will be described. In this example, the O1 concentration was 15.7×10”atoms/cn
1200°C as the first heat treatment for the Si substrate of
A second heat treatment was performed at 050° C. for 6 hours, and a third heat treatment was performed at 700° C. for 10 hours. Note that a sample that was not subjected to the third heat treatment was also produced. A thin SiO2 layer with a thickness of 120 mm is deposited on these Si substrates.
The film is formed by thermal oxidation and is made of polycrystalline Si with an area of 0.1 cut.
A MOS diode with electrodes was fabricated, and a thin 5iQ2
The dielectric strength voltage of the membrane was investigated. As a reference prototype using the conventional technology, the O1 concentration is 15g x 10”atoms/c.
ffl Si substrate at 1200°C for 5 hours, 700°C 1
Using a MOS diode that had been heat-treated for 0 hours, the dielectric strength voltage of MOS diodes manufactured under the same conditions was examined.

FIG. 3 shows the results of measuring the dielectric strength of these samples.

The Si substrate that has been subjected to the third heat treatment has a relatively medium electric field (
There were no cases where the breakdown mode occurred at a voltage of 4 to 8 MV/Cm), and all of them were approximately at the intrinsic breakdown voltage of the 5iOz film, whereas this was observed in about 15% of cases using the prior art. This difference is due to the fact that Oi precipitates present on the extreme surface of the Si substrate during thermal oxidation
This shows that the conventional technology has not been able to completely overcome the problem of being incorporated into the G film and causing breakdown voltage failure. In addition, in this example, when the third heat treatment was omitted, about 10% of defects were observed in the mode destroyed by medium electric fields, but this is because the contamination of heavy metals etc. could not be completely removed due to the lack of gettering effect. Because it wasn't there. This is confirmed by measuring the crystal defect density inside the Si substrate by light etching after measuring the breakdown voltage.
This was confirmed because only defects were observed.

Next, a third embodiment of the present invention will be described. In this example, the Oi concentration is 18.5 x 1017 atoms/cn
The Si substrate of t was subjected to heat treatment at 1180° C. for 4 hours as a first heat treatment and at 1050° C. for 6 hours as a second heat treatment. At this time, a sample was prepared in which the first heat treatment and the second heat treatment were consecutively performed at once, and a sample in which the kernels were treated separately and once cooled to room temperature and then subjected to the second heat treatment.

These samples were subjected to the heat treatment of the 0MO8 production process, then opened, and internal crystal defects were observed by laser tomography (see Applied Physics, Vol. 55, No. 6, p. 542, 1986). As a result, in the case of continuous-batch processing, the DZ width was 38 to 45 μm (20 samples), whereas in the case of divided processing, it was 5 to 35 μm (20 samples).
There was also a large variation. In the case of split processing, this is the second
This is because during the heat treatment, precipitate nuclei reformed and grew during the temperature increase process from room temperature to 1050°C, promoting Oi precipitation. The increase in variation is due to the characteristics of O1 precipitation nuclei that are formed because when multiple Si substrates enter a heat treatment furnace, the heat treatment conditions (temperature for 1 hour) that each Si substrate receives changes slightly depending on the order in which they are placed in the heat treatment furnace. This is because it becomes non-uniform.

From the above results, it can be seen that the first heat treatment and the second heat treatment need to be continuous batch treatments.

! [Effects of the Invention] As explained above, in the method for manufacturing a Si substrate according to the present invention, the solution treatment for forming the DZ is performed as a first heat treatment at a high temperature and a second heat treatment at a lower temperature than the first heat treatment. By performing heat treatment in two stages, the O in the element formation area is reduced.
It has the effect of completely suppressing crystal defects caused by i-precipitation and improving the deterioration of device characteristics and product yield caused by this.

[Brief explanation of the drawing]

In order to illustrate the concept of the present invention, FIG. 1 is a diagram showing the Oi concentration distribution from the surface of a Si substrate toward the inside when nuclear heat treatment is performed. FIG. 2 is a diagram showing the distribution of crystal defect density from the surface of the Si substrate toward the inside, and is a diagram showing a comparison between the first embodiment of the present invention and the prior art. Figure 3 (A)
~(C) is S consisting of the second embodiment of the present invention and the prior art
FIG. 3 is a diagram showing a comparison of the dielectric strength distribution of the 3202 film on the i-substrate. Agent Patent Attorney Shindon Uchihara 2 Sono θ (surface) 10〃3θ Masa (tL cap) 11 --- tth black treatment ridge 1 2d sea bream dark 1 -- Seri 1/7 heat treatment / 1 At the time, it was bao l g L'! , ) #3 11! U

Claims (1)

[Claims] (1) A Si substrate cut out from a Si single crystal produced by the Czochralski method is subjected to a first heat treatment at 1100° C.
A method for manufacturing a Si substrate, characterized in that heat treatment is performed at a temperature of 950 °C or higher, and as a second heat treatment, a heat treatment is performed at a temperature lower than the first heat treatment and 950 °C or higher (2) the first and second 3. The method for manufacturing a Si substrate according to claim 1, further comprising adding a third heat treatment at a temperature of less than 900° C. after the heat treatment.
The Si substrate subjected to the heat treatment or the first to third heat treatments has a density of 16.0 to 19.5 x 10^1^7 atoms/c.
3. The method for manufacturing a Si substrate according to claim 1, wherein the Si substrate contains interstitial oxygen of m^3. The method for manufacturing a Si substrate according to claim 1, 2 or 3, characterized in that: