JPH02224107A - Automatic power saving method - Google Patents

Automatic power saving method

Info

Publication number
JPH02224107A
JPH02224107A JP1043178A JP4317889A JPH02224107A JP H02224107 A JPH02224107 A JP H02224107A JP 1043178 A JP1043178 A JP 1043178A JP 4317889 A JP4317889 A JP 4317889A JP H02224107 A JPH02224107 A JP H02224107A
Authority
JP
Japan
Prior art keywords
time
power saving
power save
power
saving state
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1043178A
Other languages
Japanese (ja)
Inventor
Yasuo Tokito
時任 康夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP1043178A priority Critical patent/JPH02224107A/en
Publication of JPH02224107A publication Critical patent/JPH02224107A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To improve operability by setting up time required from the end of device operation up to a power saving sate to a value longer than the suspending time of the device, and in a using environment having a short suspending time of the device, setting up the time from the end of the operation up to the power saving state to a shorter value. CONSTITUTION:An automatic power saving circuit is constituted of a common bus 1, a CPU 2, a ROM 3, a RAM 4, an input port 5, an output port 6, a clock 7, a switch 8 for starting device operation, a power saving relay 9, and a load 10 for turning off a power supply at the time of power saving. Since the time required from the end of the device operation up to the power saving state is set up to a value longer than the suspending time of the device, a user rarely meets the power saving state at the time of requiring the use of the device. In the using environment shortening the suspending time of the device, the time required up to the power saving state after the end of operation is shortened. Thus, the operability can be improved.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は情報処理装置における一定時間使われないと自
動的に電源を切ったりパワーセーブ状態に移行するオー
トバク−セーブ回路に関する。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to an autoback-save circuit in an information processing apparatus that automatically turns off the power or enters a power save state if the apparatus is not used for a certain period of time.

(従来の技術) 従来より情報処理装置には、操作者が電源を切り忘れる
と無駄に電力を消費し、また装置の寿命を縮める装置が
あった。そこで、このような装置では一定時間使われな
いと自動的に電源を切ったりパワーセーブ状態に移行す
るオートパワーセーブ回路が用いられている。
(Prior Art) Conventionally, there have been information processing devices that waste power and shorten the life of the device if an operator forgets to turn off the power. Therefore, such devices use an auto power save circuit that automatically turns off the power or enters a power save state if the device is not used for a certain period of time.

(発明が解決しようとする課題) しかしながら、上記従来の方法ではオートパワーセーブ
が働(までの時間が固定であり多種の条件に応じられる
柔軟性に乏しい。また、普通に使用しているときでも装
置を使用する間隔がオートパワーセーブが働く時間間隔
より長(なることがある。さらに、オートパワーセーブ
が働いて電源断やパワーセーブ状態になっているときに
装置を使用しようとする場合使用可能になるまで時間や
手間がかかり操作性が悪い。
(Problem to be Solved by the Invention) However, in the conventional method described above, the time until the automatic power save works is fixed, and it lacks flexibility to respond to various conditions. The interval between using the device may be longer than the time interval at which auto power save is activated.In addition, it can be used if you attempt to use the device while auto power save is activated and the power is turned off or the device is in power save mode. It takes time and effort to achieve this, and it is difficult to operate.

本発明はこれらの問題点を解決するためのもので、操作
性の優れたオートパワーセーブ回路を提供することを目
的とするt (課題を解決するための手段) 本発明は前記問題点を解決するために、情報処理部首に
おける当該装置が一定時間使われないと自動的に電源を
切ったりパワーセーブ状態に移行するオートパワーセー
ブ方法において、次の動作ステップを行なう。
The present invention is intended to solve these problems, and aims to provide an auto power save circuit with excellent operability. (Means for Solving the Problems) The present invention solves the above problems. In order to do this, the following operation steps are performed in an auto power save method in which the device in the information processing radical is automatically turned off or enters a power save state if it is not used for a certain period of time.

情報処理装置が使われない休止時間を計測するステップ
、 装置の動作終了後パワーセーブ状態に移行するまでの時
間を、前記休止時間が予め設定した時間より短いときは
所定の第1の時間を付加して長くするステップ、 装置の動作終了後パワーセーブ状態に移行するまでの時
間を、前記休止時間が予め設定した時間より長いときは
所定の第2の時間を差引いて短(するステップ。
a step of measuring a downtime when the information processing device is not used; adding a predetermined first time to the time it takes for the device to enter a power save state after its operation ends, if the downtime is shorter than a preset time; If the pause time is longer than a preset time, the time required for transitioning to the power save state after the end of the operation of the device is shortened by subtracting a predetermined second time.

(作用) 以上のようなステップを行なう本発明によれば、装置の
動作終了後パワーセーブ状態になるまでの時間が装置の
休止時間より長(なるので操作者が使用したい時にパワ
ーセーブ状態になっていることは少なくなる。また、装
置の休止時間が短い使用環境では動作終了後パワーセー
ブ状態になるまでの時間が短(なり不要な電力の減少及
び寿命の向上を図れる。
(Function) According to the present invention, which performs the steps described above, the time it takes for the device to enter the power save state after the end of its operation is longer than the rest time of the device. In addition, in a usage environment where the downtime of the device is short, the time required for the device to enter the power save state after the end of operation is short (this reduces unnecessary power consumption and improves lifespan).

従って、本発明は前記問題点を解決でき、操作性の優れ
たオートパワーセーブ方法を提供できる。
Therefore, the present invention can solve the above problems and provide an automatic power saving method with excellent operability.

(実施例) 以下、本発明の一実施例を図面に基づいて説明する。(Example) Hereinafter, one embodiment of the present invention will be described based on the drawings.

第1図は本発明の一実施例の動作を示すフローチャート
である。第2図は本実施例の構成を示すブロック図であ
る。第2図において、lは共通バス、2はCPU 、3
は読み出し専用メモリ(以下、ROMと略す)、4は読
み出し/書き込みメモリ(以下、RAMと略す)、5は
人力ボート、6は出力ボート、7は時計、8は装置の運
用開始用のスイッチ、9はパワーセーブ用のリレー、1
0はパワーセーブ時に電源をオフする負荷である。
FIG. 1 is a flowchart showing the operation of one embodiment of the present invention. FIG. 2 is a block diagram showing the configuration of this embodiment. In Figure 2, l is the common bus, 2 is the CPU, 3
is a read-only memory (hereinafter abbreviated as ROM), 4 is a read/write memory (hereinafter abbreviated as RAM), 5 is a manual boat, 6 is an output boat, 7 is a clock, 8 is a switch for starting the operation of the device, 9 is a relay for power saving, 1
0 is a load whose power is turned off during power saving.

次に、本実施例のオートパワーセーブ動作を第1図に従
って説明する。
Next, the automatic power saving operation of this embodiment will be explained with reference to FIG.

先ず、第1図(a)において、第2図のスイッチ8が押
された(ステップ101)ときパワーセーブ状態に移行
するまでの時間Twを任意の時間T、増やす(ステップ
102)。但し、この増えた後の時間Twは予め設定し
てお(オートパワーセーブ時間の最大時間TMAXより
大きくならないように制限する(ステップ103,10
4 )。そして、現在パワーセーブ状態になっているか
どうかを調べ(ステップ105 ) 、パワーセーブ状
態であれば第2図のリレー9をオンしてパワーセーブ状
態を解除する(ステップ106)。パワーセーブ状態に
なっていないとき装置運用を開始する(ステップ107
)。その後、装置運用動作が終了した時刻を第2図の時
計7により計り、その終了時刻TAを第2図のRAM 
4に格納保持する(ステップ108,109 )。また
、第1図(b)において、第2図のスイッチ8が押され
た(ステップ101)とき時計7から現在の時刻TAを
計り、かつRAM 4から動作終了時刻TBを読み出し
て、動作終了から現在までの時間t・(T、−TA)を
算出する(ステップ120,121,122 )。パワ
ーセーブ状態に移行するまでの時間Twが時間tより大
き(ならないように制限する(ステップ123゜124
)。さらに、この時間Twが予め設定しておいたオート
パワーセーブ時間の最大時間TMAXより太き(ならな
いように制限する(ステップ103゜104 )。そし
て、現在パワーセーブ状態になっているかどうかを調べ
(ステップ105 ) 、パワーセーブ状態であれば第
2図のリレー9をオンしてパワーセーブ状態を解除する
(ステップ106)。パワーセーブ状態になっていない
とき装置運用を開始する(ステップ107)。その後、
装置運用動作が終了した時刻を第2図の時計7により計
り、その終了時刻TAを第2図のRAM 4に格納保持
する(ステップ108,109 )。
First, in FIG. 1(a), when the switch 8 in FIG. 2 is pressed (step 101), the time Tw until transition to the power save state is increased by an arbitrary time T (step 102). However, the time Tw after this increase is set in advance (limited so that it does not exceed the maximum time TMAX of the auto power save time (steps 103 and 10).
4). Then, it is checked whether the power saving state is currently in effect (step 105), and if the power saving state is present, the relay 9 shown in FIG. 2 is turned on to cancel the power saving state (step 106). Start device operation when not in power save state (step 107)
). Thereafter, the time at which the device operation ends is measured by the clock 7 in FIG. 2, and the end time TA is recorded in the RAM in FIG.
4 (steps 108, 109). In addition, in FIG. 1(b), when the switch 8 in FIG. 2 is pressed (step 101), the current time TA is measured from the clock 7, and the operation end time TB is read out from the RAM 4. The time t·(T, -TA) up to the present time is calculated (steps 120, 121, 122). Limit the time Tw until transition to the power save state to be greater than the time t (steps 123 and 124).
). Furthermore, this time Tw is limited so that it is not longer than the maximum time TMAX of the auto power save time set in advance (steps 103 and 104). Then, it is checked whether the power save state is currently in effect (steps 103 and 104). Step 105) If the device is in a power save state, turn on the relay 9 shown in Fig. 2 to release the power save state (Step 106).If it is not in the power save state, start operating the device (Step 107).Afterwards ,
The time at which the device operation ends is measured by the clock 7 in FIG. 2, and the end time TA is stored and held in the RAM 4 in FIG. 2 (steps 108, 109).

そして、動作が終了した後の待機時に一定の単位時間経
過後に(ステップ110 ) 、時間Twを予め設定し
ておく時間Tb減らす(ステップ111)。ただし、こ
の減った後の時間T、は予め設定してお(オートパワー
セーブ時間の最小時間TMINより小さ(ならないよう
に制限する(ステップ112゜113 )。そして、現
在パワーセーブ状態になっているかどうかを調べ(ステ
ップ114 ) 、パワーセーブ状態でないならば時計
7から現在の時刻TAを計り、かつRAM 4から動作
終了時刻T8を読み出して、動作終了から現在までの時
間(T、−TA)を算出する(ステップ115 )。そ
して、その時間(Tll−TA)が時間TWより長くな
っていなければ(ステップ116 ) 、リレー9をオ
フしてパワーセーブ状態にする(ステップ117)。
Then, after a certain unit time has elapsed during standby after the end of the operation (step 110), the time Tw is reduced by a preset time Tb (step 111). However, the time T after this decrease is set in advance (limited so that it is not smaller than the minimum time TMIN of the auto power save time (steps 112 and 113). If it is not in the power save state, it measures the current time TA from the clock 7, reads the operation end time T8 from the RAM 4, and calculates the time (T, -TA) from the end of the operation to the present. Then, if the time (Tll-TA) is not longer than the time TW (step 116), the relay 9 is turned off to enter the power save state (step 117).

(発明の効果) 以上説明したよう番乙本発明によれば、装置の動作終了
後パワーセーブ状態になるまでの時間が装置の休止時間
より長くなるので操作者が使用したい時にパワーセーブ
状態になっていることは少なくなる。また、装置の休止
時間が短い使用環境では動作終了後パワーセーブ状態に
なるまでの時間が短(なり不要な電力の減少及び寿命の
向上を図れる。従って、本発明は操作性の優れたオート
パワーセーブ方法を提供できる。
(Effects of the Invention) As explained above, according to the present invention, the time it takes for the device to enter the power save state after its operation is completed is longer than the rest time of the device, so that the power save state can be entered when the operator wants to use the device. There will be fewer things to do. In addition, in a usage environment where the equipment has short downtime, the time required to enter the power save state after the end of operation is short (this reduces unnecessary power consumption and improves service life. Therefore, the present invention provides automatic power saving with excellent operability. We can provide a save method.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例の動作を示すフローチャート
、第2図は本実施例の構成を示すブロック図である。 1 ・ 2 ・ 3 ・ 4 ・ 5 ・ 6 ・ 7 ・ 8 ・ 9 ・ lO・ ・共通バス、 ・cpu。 ・ROM。 ・RAM。 ・入力ボート、 ・出力ボート、 ・時計、 ・スイッチ、 ・リレー ・負荷。
FIG. 1 is a flowchart showing the operation of an embodiment of the present invention, and FIG. 2 is a block diagram showing the configuration of this embodiment. 1 ・ 2 ・ 3 ・ 4 ・ 5 ・ 6 ・ 7 ・ 8 ・ 9 ・ IO・ ・Common bus, ・CPU.・ROM.・RAM.・Input boat, ・Output boat, ・Clock, ・Switch, ・Relay/load.

Claims (1)

【特許請求の範囲】 情報処理装置における当該装置が一定時間使われないと
自動的に電源を切ったりパワーセーブ状態に移行するオ
ートパワーセーブ方法において、当該装置が使われない
休止時間を計測し、 装置の動作終了後パワーセーブ状態に移行するまでの時
間を、前記休止時間が予め設定した時間より短いときは
所定の第1の時間を付加して長く、長いときは所定の第
2の時間を差引いて短くすることを特徴とするオートパ
ワーセーブ方法。
[Scope of Claims] In an automatic power save method of automatically turning off the power or entering a power save state when the device in an information processing device is not used for a certain period of time, the method includes measuring the down time when the device is not used, When the pause time is shorter than the preset time, a predetermined first time is added to increase the time required for the device to enter the power save state after the device has finished operating, and when it is longer, it is increased by a predetermined second time. An automatic power saving method characterized by subtraction and shortening.
JP1043178A 1989-02-27 1989-02-27 Automatic power saving method Pending JPH02224107A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1043178A JPH02224107A (en) 1989-02-27 1989-02-27 Automatic power saving method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1043178A JPH02224107A (en) 1989-02-27 1989-02-27 Automatic power saving method

Publications (1)

Publication Number Publication Date
JPH02224107A true JPH02224107A (en) 1990-09-06

Family

ID=12656634

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1043178A Pending JPH02224107A (en) 1989-02-27 1989-02-27 Automatic power saving method

Country Status (1)

Country Link
JP (1) JPH02224107A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04192014A (en) * 1990-11-27 1992-07-10 Hitachi Ltd Information processor
JP2008072213A (en) * 2006-09-12 2008-03-27 Funai Electric Co Ltd Television receiving device
JP2010198535A (en) * 2009-02-27 2010-09-09 Nec Corp Power consumption reducing circuit and power consumption reducing method
US8004603B2 (en) 2002-02-15 2011-08-23 Nikon Corporation Camera with an interrupting unit, and camera with an inhibiting unit

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04192014A (en) * 1990-11-27 1992-07-10 Hitachi Ltd Information processor
US8004603B2 (en) 2002-02-15 2011-08-23 Nikon Corporation Camera with an interrupting unit, and camera with an inhibiting unit
US8009230B2 (en) 2002-02-15 2011-08-30 Nikon Corporation Camera with an interrupting unit, and camera with an inhibiting unit
JP2008072213A (en) * 2006-09-12 2008-03-27 Funai Electric Co Ltd Television receiving device
US8752122B2 (en) 2006-09-12 2014-06-10 Funai Electric Co., Ltd. Television receiving device and power supply control method
JP2010198535A (en) * 2009-02-27 2010-09-09 Nec Corp Power consumption reducing circuit and power consumption reducing method

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