JPH02222185A - Package for optical semiconductor element - Google Patents
Package for optical semiconductor elementInfo
- Publication number
- JPH02222185A JPH02222185A JP1041516A JP4151689A JPH02222185A JP H02222185 A JPH02222185 A JP H02222185A JP 1041516 A JP1041516 A JP 1041516A JP 4151689 A JP4151689 A JP 4151689A JP H02222185 A JPH02222185 A JP H02222185A
- Authority
- JP
- Japan
- Prior art keywords
- pin
- optical semiconductor
- stem
- driving
- semiconductor element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 24
- 230000003287 optical effect Effects 0.000 title claims abstract description 22
- 230000008878 coupling Effects 0.000 claims description 4
- 238000010168 coupling process Methods 0.000 claims description 4
- 238000005859 coupling reaction Methods 0.000 claims description 4
- 238000007789 sealing Methods 0.000 abstract description 8
- 229910000679 solder Inorganic materials 0.000 abstract description 5
- 230000005284 excitation Effects 0.000 abstract description 3
- 238000000034 method Methods 0.000 description 4
- 239000011521 glass Substances 0.000 description 3
- 238000002844 melting Methods 0.000 description 3
- 230000008018 melting Effects 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 238000010586 diagram Methods 0.000 description 1
- 238000010292 electrical insulation Methods 0.000 description 1
- 230000006698 induction Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/02—Structural details or components not essential to laser action
- H01S5/022—Mountings; Housings
- H01S5/02208—Mountings; Housings characterised by the shape of the housings
- H01S5/02212—Can-type, e.g. TO-CAN housings with emission along or parallel to symmetry axis
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/06—Arrangements for controlling the laser output parameters, e.g. by operating on the active medium
- H01S5/062—Arrangements for controlling the laser output parameters, e.g. by operating on the active medium by varying the potential of the electrodes
- H01S5/06226—Modulation at ultra-high frequencies
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/06—Arrangements for controlling the laser output parameters, e.g. by operating on the active medium
- H01S5/068—Stabilisation of laser output parameters
- H01S5/0683—Stabilisation of laser output parameters by monitoring the optical output parameters
Abstract
Description
【発明の詳細な説明】
[産業上の利用分野]
本発明は、半導体レーザ(以下LDと略称する)や、発
光ダイオード(以下LEDと略称する)などの光半導体
素子において、それらの高周波駆動を可能とし、かつ、
良好な気密封止歩留りが得られる光半導体素子用パッケ
ージに関するものてあ[従来の技術]
従来、例えばコンパクトディスクなどに用いられるLD
用のパッケージは、第2図に示すような構成を採ってい
た。即ち、第2図において、1はLD、2はLDIの出
力をモニタし、APC(Automatic Powe
r Control )回路(図示せず)によりLDI
の出力を制御するためのモニタフォトダイオード(PD
) 、3はヒートシンク、4はステム、5はLD駆動用
単線ピン、6はPD駆動用単線ピン、7は接地用ピン、
8はワイアボンド、9はLDlおよびPD2を外気と遮
断するためのキャップ、10はピン5およびピン6とヒ
ートシンク3の間の電気的絶縁を保ち、かつ、上記封止
の役割の一端を担う低融点ガラスである。Detailed Description of the Invention [Field of Industrial Application] The present invention is directed to high-frequency driving of optical semiconductor devices such as semiconductor lasers (hereinafter referred to as LDs) and light emitting diodes (hereinafter referred to as LEDs). possible, and
Related to packages for optical semiconductor devices that provide good hermetic sealing yield [Prior art] Conventionally, LDs used in compact discs, etc.
The package for this was constructed as shown in Figure 2. That is, in FIG. 2, 1 monitors the output of the LD and 2 monitors the output of the LDI.
r Control ) circuit (not shown)
monitor photodiode (PD) to control the output of
), 3 is a heat sink, 4 is a stem, 5 is a single wire pin for LD drive, 6 is a single wire pin for PD drive, 7 is a ground pin,
8 is a wire bond, 9 is a cap for isolating LDl and PD2 from the outside air, and 10 is a low melting point that maintains electrical insulation between the pins 5 and 6 and the heat sink 3, and also plays a role in the above-mentioned sealing role. It's glass.
このような構成の場合、ピン5.ピン6は単線てあり、
純インダクタンス素子であるため、ピン5もしくはピン
6によって、
■ LDの上限駆動周波数が限られる、■ 上記APC
の制御方法として、例えばピり値検出法の如く、PD2
における高周波出力成分をもモニタする場合、ピン5−
ピン6間の相互誘導により、LDの上限駆動周波数が限
られる、なとのほか、
■ 封止を完全にするため、低融点ガラス10の熱膨張
係数をステム4、およびピン5、ピン6のそれとほぼ一
致させる必要があり、そのため、使用可能な低融点ガラ
ス10、およびピン5およびピン6の材料が限定される
ほか、該封止かLD実装歩留りを低下させる]要因とな
るなどの欠点があった。In such a configuration, pin 5. Pin 6 is a single wire,
Since it is a pure inductance element, the upper limit driving frequency of the LD is limited by pin 5 or pin 6.
As a control method, for example, a peak value detection method, PD2
If you also want to monitor high frequency output components at pin 5-
In addition to the fact that the upper limit driving frequency of the LD is limited due to mutual induction between the pins 6, ■ In order to achieve complete sealing, the coefficient of thermal expansion of the low melting point glass 10 is adjusted to that of the stem 4, pins 5 and 6. Therefore, the low melting point glass 10 that can be used and the materials for the pins 5 and 6 are limited, and there are disadvantages such as reducing the sealing and LD mounting yield. there were.
[発明が解決しようとする課題]
本発明は上記の事情に鑑みてなされたもので、LDやL
EDなどの光半導体素子において、それらの飛躍的な高
周波駆動を可能とし、かつ、高い気密封止歩留りを可能
とする光半導体素子用パッケージを提供することを目的
とする。[Problem to be solved by the invention] The present invention has been made in view of the above circumstances, and
It is an object of the present invention to provide a package for optical semiconductor elements such as EDs that enables dramatic high-frequency driving and high hermetic sealing yield.
[課題を解決するだめの手段と作用]
本発明は、高周波駆動を可能とし、かつ、高い気密封止
歩留りを可能とするために、上側に光半導体素子か設置
されるステムと、該ステム−にに設置した光半導体素子
と該光半導体素子を駆動させるための外部回路とを、互
いに電気的に結合するための該ステムに設置された1本
もしくは複数本のピンとを有する光半導体素子用パッケ
ージにおいて、少なくとも該光半導体素子を直接駆動さ
せるための該ピンを、硬質の同軸線で47.i成するこ
とを特徴とするものである。[Means and effects for solving the problems] The present invention provides a stem on which an optical semiconductor element is installed on the upper side, and a stem in which an optical semiconductor element is installed on the upper side, in order to enable high frequency driving and high hermetic sealing yield. A package for an optical semiconductor element having one or more pins installed on the stem for electrically coupling the optical semiconductor element installed on the stem and an external circuit for driving the optical semiconductor element to each other. In 47., at least the pin for directly driving the optical semiconductor element is connected with a hard coaxial line. It is characterized by: i.
[実施例] 以下図面を参照して本発明の実施例を詳細に説明する。[Example] Embodiments of the present invention will be described in detail below with reference to the drawings.
第1図は本発明の1実施例を説明するための図であって
、第2図と同一の部位には同一番号を付した。FIG. 1 is a diagram for explaining one embodiment of the present invention, and the same parts as in FIG. 2 are given the same numbers.
即ち、ステム4には硬質(いわゆるセミ・リジッド)の
同軸線より構成されるLD駆動用同軸ピン5′、硬質(
いわゆるセミ・リジット)の同軸線より構成されるPD
駆動用同軸ピン6′ および接地用ピン7か貫通される
と共に、各ピン5′6′、7はステム4に金属はんた1
0′によりはんだ(−Jけされて設置される。前記LD
駆動用同軸ピン5′はLDIを駆動させるための外部回
路(図示せず)とLDlとを電気的に結合するもので、
その芯線、および外管の材料は銅であり、第1図に示す
ように、その外管が、はんだ10′により直接堅固にス
テム4に固定されている。前記PD駆動用同軸ピン6′
はPD2を駆動させるための外部回路(図示せず)とP
D2とを電気的に結合するもので、その芯線、および外
管の材料は銅であり、第1図に示すように、その外管が
、はんた10’ により直接堅固にステム4に固定され
ている。前記ステム4上の取付部]]にはヒートシンク
3を介してLDlか設置され、このLDlはワイアボン
ド8により前記LD駆動用同軸ピン5′の芯線に接続さ
れる。前記ステム4上の前記LD]の近傍にはPD2か
設置され、このPD2はワイアボンド8により前記PD
駆動用同軸ピン6′の芯線に接続される。前記ステム4
には前記LDIおよびPD2等を覆うようにしてキャッ
プ9が取イ・1けられる。That is, the stem 4 has an LD driving coaxial pin 5' made of a hard (so-called semi-rigid) coaxial line, and a hard (so-called semi-rigid) coaxial pin 5'.
PD composed of so-called semi-rigid coaxial lines
The driving coaxial pin 6' and the grounding pin 7 are passed through, and each pin 5', 6', and 7 is attached to the stem 4 with metal solder 1.
0' is soldered (-J) and installed.
The driving coaxial pin 5' is for electrically coupling the LDl with an external circuit (not shown) for driving the LDI.
The material of the core wire and the outer tube are copper, and as shown in FIG. 1, the outer tube is directly and firmly fixed to the stem 4 by solder 10'. Said PD driving coaxial pin 6'
is an external circuit (not shown) for driving PD2 and P
The core wire and outer tube are made of copper, and as shown in FIG. 1, the outer tube is directly and firmly fixed to the stem 4 with solder 10'. has been done. An LD1 is installed on the mounting part on the stem 4 through a heat sink 3, and this LD1 is connected to the core wire of the LD driving coaxial pin 5' by a wire bond 8. A PD 2 is installed near the LD on the stem 4, and this PD 2 is connected to the PD by a wire bond 8.
It is connected to the core wire of the driving coaxial pin 6'. The stem 4
A cap 9 is removed to cover the LDI, PD 2, etc.
このような構造になっているから、LD直接駆動のため
の可能」−限局波数か従来に比べ、飛躍的に大きくなっ
た。例えば、従来、ピン5の長さか5+nmの場合、そ
の帯域は約3GHzに制限されていたか、本発明の場合
、ピン5′の長さはその帯域に無関係、従って、その帯
域は8のワイアボンド長制限となり、ワイアボンド8の
長さが1.mmの場合、該帯域は約20GHzに拡大し
た。With this structure, the localized wave number for direct LD drive has become dramatically larger than in the past. For example, conventionally, if the length of pin 5 was 5+nm, the band would be limited to about 3 GHz, or in the case of the present invention, the length of pin 5' would be independent of the band, so the band would be limited to a wire bond length of 8. The limit is that the length of wire bond 8 is 1. mm, the band expanded to about 20 GHz.
また、従来構造の場合、LD励起時のピン5からピン6
への電気漏話が大きく、そのため、従来、AP”C方式
として、低帯域ないわゆる平均値方式しか用いることが
出来なかった。しかしながら、本発明の場合、ピン5′
、およびピン6′が同軸構造であるため、LD励起時の
ピン5′からピン6′への漏話かほぼ無くなり、その結
果、APC方式として、広帯域なピーク値検出方式など
が可能となった。その結果、従来に比してより高精度の
APC動作が可能となった。In addition, in the case of the conventional structure, pin 5 to pin 6 during LD excitation
Therefore, in the past, only a low-band so-called average value method could be used as the AP"C method. However, in the case of the present invention, pin 5'
, and pin 6' have a coaxial structure, there is almost no crosstalk from pin 5' to pin 6' during LD excitation, and as a result, a broadband peak value detection method has become possible as an APC method. As a result, more accurate APC operation than before has become possible.
ここで、もしLD出力のモニタが不要の場合、ピン6′
を除き、LD駆動用同軸ピン5′のみを設置すればよい
ことは勿論である。Here, if you do not need to monitor the LD output, pin 6'
Of course, except for the LD drive coaxial pin 5', only the LD driving coaxial pin 5' needs to be installed.
[発明の効果]
以上説明したように、本発明は、光半導体素子用パッケ
ージにおいて、ステム上に設置した光半導体素子と、該
光半導体素子を駆動させるための外部回路とを、互いに
電気的に結合するための、該ステムに設置された1本も
しくは複数本のピンにおいて、少なくとも該光半導体素
子を直接駆動させるための該ピンを、硬質の同軸線で構
成する構造となっているため、LDやLEDなどの光半
導体素子において、それらの飛躍的な高周波駆動を可能
とし、かつ、高い気密封止歩留りを可能とするなとの利
点がある。[Effects of the Invention] As explained above, the present invention provides an optical semiconductor device package in which the optical semiconductor device installed on the stem and the external circuit for driving the optical semiconductor device are electrically connected to each other. Among the one or more pins installed on the stem for coupling, at least the pin for directly driving the optical semiconductor element is constructed with a hard coaxial line, so the LD It has the advantage of enabling dramatically high frequency driving of optical semiconductor devices such as LEDs and LEDs, as well as enabling high hermetic sealing yields.
第1図は本発明の一実施例を示す斜視図、第2図は従来
の光半導体素子用パッケージを示す斜視図である。
]・・半導体レーザ、2・・・モニタフォトダイオード
、3・・ヒートシンク、4・・・ステム、5′・・・L
D駆動用同軸ピン、6′・・・PD駆動用同軸ピン、7
・・・接地用ピン、8・・ワイアホント、9・・キャッ
プ、10′・・・金属はんだ。FIG. 1 is a perspective view showing an embodiment of the present invention, and FIG. 2 is a perspective view showing a conventional optical semiconductor device package. ]...Semiconductor laser, 2...Monitor photodiode, 3...Heat sink, 4...Stem, 5'...L
D drive coaxial pin, 6'...PD drive coaxial pin, 7
...Grounding pin, 8...Wire real, 9...Cap, 10'...Metal solder.
Claims (1)
に設置した光半導体素子と該光半導体素子を駆動させる
ための外部回路とを、互いに電気的に結合するための該
ステムに設置された1本もしくは複数本のピンとを有す
る光半導体素子用パッケージにおいて、少なくとも該光
半導体素子を直接駆動させるための該ピンを、硬質の同
軸線で構成することを特徴とする光半導体素子用パッケ
ージ。a stem on which an optical semiconductor element is installed; and a stem installed on the stem for electrically coupling the optical semiconductor element installed on the stem and an external circuit for driving the optical semiconductor element to each other. 1. A package for an optical semiconductor element having one or more pins, wherein at least the pin for directly driving the optical semiconductor element is constructed of a hard coaxial line.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1041516A JP2709127B2 (en) | 1989-02-23 | 1989-02-23 | Package for optical semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1041516A JP2709127B2 (en) | 1989-02-23 | 1989-02-23 | Package for optical semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH02222185A true JPH02222185A (en) | 1990-09-04 |
JP2709127B2 JP2709127B2 (en) | 1998-02-04 |
Family
ID=12610541
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1041516A Expired - Fee Related JP2709127B2 (en) | 1989-02-23 | 1989-02-23 | Package for optical semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2709127B2 (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2003063309A2 (en) * | 2002-01-18 | 2003-07-31 | Oepic, Inc. | High-speed to-can optoelectronic packages |
US6792178B1 (en) | 2000-01-12 | 2004-09-14 | Finisar Corporation | Fiber optic header with integrated power monitor |
US6932522B2 (en) | 1998-12-30 | 2005-08-23 | Finisar Corporation | Method and apparatus for hermetically sealing photonic devices |
JP2005268362A (en) * | 2004-03-17 | 2005-09-29 | Pioneer Electronic Corp | Optical pickup device |
WO2011092735A1 (en) * | 2010-01-27 | 2011-08-04 | 三菱電機株式会社 | Semiconductor laser module |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62219673A (en) * | 1986-03-20 | 1987-09-26 | Hitachi Ltd | Photoelectron device |
JPS63244695A (en) * | 1987-03-30 | 1988-10-12 | Fujitsu Ltd | Semiconductor light emitting device |
-
1989
- 1989-02-23 JP JP1041516A patent/JP2709127B2/en not_active Expired - Fee Related
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62219673A (en) * | 1986-03-20 | 1987-09-26 | Hitachi Ltd | Photoelectron device |
JPS63244695A (en) * | 1987-03-30 | 1988-10-12 | Fujitsu Ltd | Semiconductor light emitting device |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6932522B2 (en) | 1998-12-30 | 2005-08-23 | Finisar Corporation | Method and apparatus for hermetically sealing photonic devices |
US6792178B1 (en) | 2000-01-12 | 2004-09-14 | Finisar Corporation | Fiber optic header with integrated power monitor |
WO2003063309A2 (en) * | 2002-01-18 | 2003-07-31 | Oepic, Inc. | High-speed to-can optoelectronic packages |
WO2003063309A3 (en) * | 2002-01-18 | 2004-05-13 | Oepic Inc | High-speed to-can optoelectronic packages |
US6920161B2 (en) | 2002-01-18 | 2005-07-19 | Oepic Semiconductors, Inc. | High-speed TO-can optoelectronic packages |
JP2005268362A (en) * | 2004-03-17 | 2005-09-29 | Pioneer Electronic Corp | Optical pickup device |
WO2011092735A1 (en) * | 2010-01-27 | 2011-08-04 | 三菱電機株式会社 | Semiconductor laser module |
Also Published As
Publication number | Publication date |
---|---|
JP2709127B2 (en) | 1998-02-04 |
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