JPH02218123A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPH02218123A
JPH02218123A JP3863989A JP3863989A JPH02218123A JP H02218123 A JPH02218123 A JP H02218123A JP 3863989 A JP3863989 A JP 3863989A JP 3863989 A JP3863989 A JP 3863989A JP H02218123 A JPH02218123 A JP H02218123A
Authority
JP
Japan
Prior art keywords
implantation
crystal
degree
semiconductor device
damage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3863989A
Other languages
Japanese (ja)
Inventor
Morio Inoue
井上 森雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP3863989A priority Critical patent/JPH02218123A/en
Publication of JPH02218123A publication Critical patent/JPH02218123A/en
Pending legal-status Critical Current

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  • Recrystallisation Techniques (AREA)
  • Thin Film Transistor (AREA)

Abstract

PURPOSE:To recover the damage due to implantation completely by processing a semiconductor substrate by implanting impurity ions so that the amorphous degree in the Raman scattering method comes to have a specified value. CONSTITUTION:Impurity ions are implanted into a semiconductor substrate so that the amorphous degree of the substrate due to the damage in implantation becomes 20% or less, and the semiconductor is processed. For this purpose, the damage of a crystal due to the implantation, especially the amorphous degree, is measured accurately. It is convenient when the amorphous degree for an Si crystal is in the region of 0-20%, but the region 0-15% is desirable. In this way, the recovery of the crystallinity in the ion implantation step becomes complete, and the leaking current and defective breakdown strength due to the defect in the crystal of the semiconductor device can be prevented.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は半導体装置を製造するための不純物のイオン注
入の方法に関する。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method of ion implanting impurities for manufacturing semiconductor devices.

従来の技術 従来この種のイオン注入技術としては、イオン発生源か
らのイオンを質量分析系で選別し、20〜200KeV
の高電圧で加速して、半導体結晶中に注入して半導体結
晶の格子位置を不純物イオンで置換する方法が一般的で
ある。このイオン注入の際に結晶の表面はイオン衝撃で
損傷を受け、いわゆるアモルファス(非晶質)層が形成
され、不純物は電気的にも不活性である。しかし、注入
後の数100℃のアニール処理によって結晶性は回復し
、注入された不純物は結晶格子位置に落ちついて、電気
的にも活性化される。
Conventional technology Conventionally, this type of ion implantation technology involves selecting ions from an ion source using a mass spectrometry system and applying a 20 to 200 KeV
A common method is to replace the lattice positions of the semiconductor crystal with impurity ions by accelerating them at a high voltage and injecting them into the semiconductor crystal. During this ion implantation, the surface of the crystal is damaged by ion bombardment, and a so-called amorphous layer is formed, and the impurity is electrically inactive. However, the crystallinity is restored by annealing at several 100° C. after the implantation, and the implanted impurity settles in the crystal lattice position and is also electrically activated.

発明が解決しようとする課題 このような半導体製造におけるイオン注入は、注入によ
る損傷(アモルファス層)形成とアニールによる結晶性
の回復が重要な問題となっている。一般に強度の損傷に
よってアモルファス化が起った時、もしくは非常に軽度
の損傷のときには、結晶性は回復するが、中度の損傷の
ときは、回復しない。したがって、注入工程では、アモ
ルファス化の程度の測定が非常に重要である。ところが
、アモルファス化度の測定には簡便な方法がなく、得ら
れた半導体デバイスの特性からイオン注入条件の良否を
大まかに判定するしかなかった。そのためにイオン注入
条件そのものを最適化しにくいという問題があった。
Problems to be Solved by the Invention In such ion implantation in semiconductor manufacturing, important problems include damage (amorphous layer) formation due to implantation and recovery of crystallinity due to annealing. Generally, when amorphization occurs due to severe damage, or when the damage is very mild, the crystallinity is recovered, but when the damage is moderate, it is not recovered. Therefore, in the implantation process, it is very important to measure the degree of amorphization. However, there is no simple method for measuring the degree of amorphization, and it is only possible to roughly judge whether the ion implantation conditions are good or bad based on the characteristics of the obtained semiconductor device. Therefore, there was a problem in that it was difficult to optimize the ion implantation conditions themselves.

本発明はこのような問題点を解決するもので、注入によ
る損傷を完全に回復させるためのアモルファス化の度合
の測定にもとすいたイオン注入の方法を提供するもので
ある。
The present invention solves these problems and provides an ion implantation method that is convenient for measuring the degree of amorphization in order to completely recover from damage caused by implantation.

課題を解決するための手段 課題を解決するために本発明は、注入による結晶の損傷
とくにアモルファス化度を正確に測定し、アニールによ
る結晶の完全な回復のためのイオン注入方法を提供する
。具体的にはラマン散乱法による非結晶性(アモルファ
ス化度)が20%を超過しないように不純物のイオン注
入を行い処理する半導体装置の製造方法である。そして
、このようなアモルファス化20%以下のイオン注入゛
とアニールを繰り返す。
Means for Solving the Problems In order to solve the problems, the present invention provides an ion implantation method for accurately measuring crystal damage caused by implantation, particularly the degree of amorphization, and for complete recovery of the crystal by annealing. Specifically, this is a method of manufacturing a semiconductor device in which impurity ions are implanted and processed so that the non-crystallinity (amorphous degree) determined by the Raman scattering method does not exceed 20%. Then, such ion implantation and annealing to achieve 20% or less amorphization are repeated.

作用 この方法により、イオン注入を行なうと、非結晶性が2
0%以下なので、アニール処理での結晶性の回復が完全
であり、得られる半導体装置の電気特性は結晶欠陥によ
る耐圧特性やリーク電流などが著しく減小でき、優れた
半導体装置が得られる。
Effect When ion implantation is performed using this method, the amorphous property becomes 2
Since it is 0% or less, the recovery of crystallinity during annealing treatment is complete, and the electrical properties of the resulting semiconductor device include significantly reduced breakdown voltage characteristics and leakage current due to crystal defects, resulting in an excellent semiconductor device.

実施例 Si結晶(100)面に不純物としてリンを注入し、イ
オン注入量とアモルファス化度を求めると第1図のよう
になる。ここでアモルファス化度はラマン散乱法によっ
て測定し、もとの結晶を0%とし、注入量を増大して完
全にアモルファス化した場合を100%に規格化しであ
る。第1図のようにリンイオンをイオン電流0 、3 
m A 、加速電圧100KeVの標準的な方法注入す
ると、1013〜1016c12の注入量で損傷が0〜
100%に変化する。この図で斜線部分が、アニール処
理によって結晶性が完全に回復する領域でアモルファス
化度O〜20%に相当する。したがって、B点で図示す
るような6XIO”c−−2のイオン注入量に対しては
、標準的な注入法では、アモルファス化度が40%であ
り、600℃のアニールをしても結晶性は回復しない。
Example When phosphorus is implanted as an impurity into the (100) plane of a Si crystal, the ion implantation amount and the degree of amorphization are determined as shown in FIG. Here, the degree of amorphization is measured by a Raman scattering method, and is normalized to 0% for the original crystal and 100% for the case where the implantation amount is increased to completely become amorphous. As shown in Figure 1, the ion current of phosphorus ions is 0,3
When implanted using the standard method with mA and accelerating voltage of 100 KeV, the damage is 0 to
Changes to 100%. In this figure, the shaded area corresponds to a region where crystallinity is completely recovered by annealing treatment, and the degree of amorphization is 0 to 20%. Therefore, for the ion implantation amount of 6XIO"c--2 as shown at point B, the standard implantation method results in an amorphous degree of 40%, and even after annealing at 600°C, the crystallinity remains. does not recover.

ところが、注入量が2 X 10 ”cm−2であるA
点は、結晶性回復領域にあるので、直後のアニールで容
易に結晶性が回復できる。実験によって、A点での注入
とアニールを3回繰り返して、B点と同じ注入量6 X
 10 ”cm−’が得られ、しかも結晶性は完全に回
復することが確かめられた。アモルファス化度への゛イ
オン条件に関連した条件の影響を調べると、注入時のビ
ーム電流密度のほか、加速電圧、ビーム径、イオン走査
方式、注入基板の温度、イオン注入の角度などによって
、アモルファス化の程度は大幅に変化することがわかっ
た。したがってイオン注入する際の個々の条件について
、ラマン散乱法によって正確にアモルファス化度を測定
し、結晶性が必ず回復する範囲でイオン注入しなければ
ならないことになる。
However, A with an injection volume of 2 × 10” cm
Since the point is in the crystallinity recovery region, the crystallinity can be easily recovered by annealing immediately after. Through experiments, the implantation and annealing at point A were repeated three times to obtain the same implantation amount as at point B, 6X.
10 cm-' was obtained, and it was confirmed that the crystallinity was completely recovered. When examining the influence of conditions related to the ion conditions on the degree of amorphization, it was found that in addition to the beam current density during implantation, It was found that the degree of amorphization changes significantly depending on the acceleration voltage, beam diameter, ion scanning method, temperature of the implanted substrate, angle of ion implantation, etc. Therefore, the Raman scattering method Therefore, the degree of amorphization must be accurately measured, and ions must be implanted within a range that ensures that crystallinity is restored.

要するに、望ましいイオン注入を行うためには、所定の
イオン注入することと、ラマン散乱法によりアモルファ
ス化度を測定して、結晶性の回復可能なアモルファス化
度20%以下での注入とアニールが重要な点である。ア
モルファス化度はSi結晶の場合、0〜20%の領域が
、結晶の回復に好都合であるが、さらに望ましくは0〜
15%が良い。
In short, in order to perform the desired ion implantation, it is important to implant ions in a specified manner, measure the degree of amorphization using Raman scattering, and perform implantation and annealing at an amorphization degree of 20% or less that can recover crystallinity. This is a point. In the case of Si crystals, the degree of amorphization is convenient for crystal recovery in the range of 0 to 20%, but more preferably 0 to 20%.
15% is good.

発明の効果 以上のように本発明によれば、イオン注入工程での結晶
性の回復が完全になり、半導体装置の結晶欠陥によるリ
ーク電流や耐圧不良が防止できるので半導体メモリー特
性や固体イメージ素子特性が著しく向上する。
Effects of the Invention As described above, according to the present invention, crystallinity is completely recovered during the ion implantation process, and leakage current and breakdown voltage defects due to crystal defects in semiconductor devices can be prevented, thereby improving semiconductor memory characteristics and solid-state image device characteristics. is significantly improved.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の詳細な説明図である。 FIG. 1 is a detailed explanatory diagram of the present invention.

Claims (4)

【特許請求の範囲】[Claims] (1)注入損傷によるアモルファス化度が20%以下に
なるよう半導体基板に不純物のイオン注入し処理を行な
うことを特徴とする半導体装置の製造方法。
(1) A method for manufacturing a semiconductor device, which comprises performing a process by implanting impurity ions into a semiconductor substrate so that the degree of amorphization due to implantation damage is 20% or less.
(2)ラマン散乱法による結晶−非晶質の程度を示す規
格化強度で示した値で、0〜20%とすることを特徴と
する特許請求の範囲第1項記載の半導体装置の製造方法
(2) A method for manufacturing a semiconductor device according to claim 1, characterized in that the value is 0 to 20% as a normalized intensity indicating the degree of crystal-amorphousness determined by Raman scattering method.
(3)処理が注入後または注入と同時のアニールである
ことを特徴とする特許請求の範囲第1項記載の半導体装
置の製造方法
(3) The method for manufacturing a semiconductor device according to claim 1, wherein the treatment is annealing after implantation or at the same time as implantation.
(4)不純物のイオン注入と処理をそれぞれ複数回繰り
返すことを特徴とする特許請求の範囲第1項記載の半導
体装置の製造方法。
(4) The method for manufacturing a semiconductor device according to claim 1, wherein the ion implantation of impurities and the treatment are each repeated multiple times.
JP3863989A 1989-02-17 1989-02-17 Manufacture of semiconductor device Pending JPH02218123A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3863989A JPH02218123A (en) 1989-02-17 1989-02-17 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3863989A JPH02218123A (en) 1989-02-17 1989-02-17 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH02218123A true JPH02218123A (en) 1990-08-30

Family

ID=12530812

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3863989A Pending JPH02218123A (en) 1989-02-17 1989-02-17 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH02218123A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005533384A (en) * 2002-07-18 2005-11-04 コミツサリア タ レネルジー アトミーク Method for transporting electrically active thin films
JP2009535850A (en) * 2006-05-04 2009-10-01 インターナショナル・ビジネス・マシーンズ・コーポレーション Ion implantation for improved field effect transistors combined with in situ or ex situ heat treatment (method of manufacturing FET devices and FET devices)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005533384A (en) * 2002-07-18 2005-11-04 コミツサリア タ レネルジー アトミーク Method for transporting electrically active thin films
JP2009535850A (en) * 2006-05-04 2009-10-01 インターナショナル・ビジネス・マシーンズ・コーポレーション Ion implantation for improved field effect transistors combined with in situ or ex situ heat treatment (method of manufacturing FET devices and FET devices)

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