JPH0221801Y2 - - Google Patents

Description

[Detailed Description of the Invention] (A) Technical Field The present invention relates to an amplifier circuit, and particularly to an amplifier circuit suitable for use in a lamp drive circuit or the like in which an output signal needs to have hysteresis.

(b) Background of the Technology FM stereo broadcast receivers are provided with a stereo indicator to distinguish between receiving stereo broadcasts and receiving monaural broadcasts. This indicator is transmitted during stereo broadcasts.
It detects the presence of a 19KHz stereo pilot signal and turns on the lamp, but in order to prevent the lamp from flickering due to noise, a level difference is established between the lighting level and the turning off level, and this is set using hysteresis. This is achieved using an amplifier circuit with special characteristics.

(c) Main points of the invention The present invention aims to provide an amplifier circuit having hysteresis characteristics suitable for use in the above-mentioned stereo indicators, etc., and includes an input stage differential amplifier circuit to which an input signal is applied; and a positive feedback amplifier circuit driven by the output signal, and when the relationship between the pair of output signals corresponding to the current flowing through the positive feedback amplifier circuit reaches a predetermined value, the drive circuit is activated to output the drive signal. The present invention aims to generate a predetermined hysteresis characteristic by driving a circuit arrangement arranged in the positive feedback amplifier circuit for obtaining a hysteresis characteristic.

(iv) Embodiment Figure 1 shows an embodiment of the present invention, in which 1 is an input stage differential amplifier circuit consisting of first and second PNP transistors 2 and 3 to which an input signal is applied to the base; 4 is a first diode connected between the collector of the first transistor 2 and the ground;
5 is a second diode connected between the collector of the second transistor 3 and ground; 6 is connected to the first diode 4 in a current mirror relationship, the collector of which is connected to the collector of the second transistor 3;
A third transistor 8 whose emitter is connected to the ground via a first resistor 7 is connected in a current mirror relationship with the second diode 5, and whose collector is connected in series with the collector of the first transistor 2. second and third resistors 9 and 10
12 is a first output transistor connected to the first diode 4 in a current mirror relationship; 1 A current mirror circuit consisting of a diode 14 and a transistor 15 for inverting the current flowing through the output transistor 12; 16 a second output transistor connected to the second diode 5 in a current mirror relationship; 17 and 18 the current mirror circuit; Mirror circuit 1
3 and the second output transistor 16
The first circuit turns on according to the difference current between the collector current of
and a second drive transistor; 19 is an output terminal for obtaining a drive signal for driving a lamp, etc.; and 2
0 is a control transistor that is turned on in response to a signal obtained at the output terminal 19 to short-circuit the third resistor 10.

Next, the operation will be explained. Now, no input signal is applied to the input terminals 21 and 22, and the constant current source 23
If the current flowing in is I ₀ , the collector currents of the first and second transistors 2 and 3 are equal to I ₀ /2. Further, if the collector current of the third transistor 8 at that time is I ₁ and the collector current of the fourth transistor 11 is I ₂ , then the first to third resistors 7 to 10
(Resistance values are R ₁ , R ₂ , R ₃ in order) R ₁ <
By setting (R ₂ + R ₃ ), I ₁ > I ₂ can be satisfied. By the way, the current I _D1 flowing through the first diode 4 is I ₀ /2-I ₂ and the current I _D2 flowing through the second diode 5 is I ₀ /2-I ₁ . Mirror ratio with output transistor 12, second diode 5 and second output transistor 1
6 and the mirror ratio of the current mirror circuit 13 to 1, the collector current I _C of the transistor 15 of the current mirror circuit 13 becomes I ₀ /2 - I ₂ , and the base current of the first drive transistor 17 I _B becomes I _B = I _D2 − I _C = I ₂ − I ₁ ...(1). Therefore, as defined above, since I ₁ and I ₂ have a relationship of I ₁ > I ₂ , I _B becomes negative, and as a result, the PNP type first drive transistor 1
7 is not turned on. Therefore, the second drive transistor 18 is not turned on either, and no output signal is generated at the output terminal 19.

Next, assume that an input signal of ΔV is applied to the input terminals 21 and 22 with the polarity of the input terminal 21 being positive. Then, the collector current of the first transistor 2 decreases and the collector current of the second transistor 3 increases in accordance with the input signal. Therefore, an increase in the collector current of the second transistor 3 causes an increase in the current flowing through the second diode 5 and an increase in the collector current of the fourth transistor 11, and a decrease in the collector current of the first transistor 2 causes an increase in the current flowing through the second diode 5. This results in a decrease in the current flowing through the transistor 4 and the collector current of the third transistor 8.
Furthermore, an increase in the collector current of the fourth transistor 11 results in a further decrease in the current flowing through the first diode 4, a further decrease in the collector current of the third transistor 8, a further increase in the current flowing in the second diode 5, and a further increase in the current flowing in the second diode 5. Since the positive feedback effect of further increasing the collector current of the four transistors 11 works, the first
The current flowing through diode 4 depends on the input signal.
I ₀ /2-I ₂ -ΔI, and the current flowing through the second diode 5 becomes I ₀ /2-I ₁ +ΔI. In addition, in order to ensure that the circuit does not oscillate and has a predetermined gain, the first
Current mirror ratio between diode 4 and third transistor 8 and second diode 5 and fourth transistor 1
The current mirror ratio with 1 must be set to 1 or less.

If the current flowing through the first diode 4 becomes I ₀ /2-I ₂ -△I and the current flowing through the second diode 5 becomes I ₀ /2 -I ₁ +△I, then based on the above equation (1), The base current of the 1-drive transistor 17 is I _B =I ₂ −I ₁ +2ΔI (2). In equation (2), when △I becomes large and I _B becomes positive, the first drive transistor 17
begins to turn on, and the second drive transistor 18 also turns on accordingly. Therefore, an output signal is generated at the output terminal 19, and a lamp (not shown) serving as a load is lit.

The level at which the first drive transistor 17 is turned on,
That is, the lighting level of the lamp is determined by the current mirror ratio between the first diode 4 and the third transistor 8, and the current mirror ratio between the second diode 5 and the fourth transistor 11. If the area ratio of the three transistors 8 and the area ratio of the second diode 5 and the fourth transistor 11 are set to 1, the lighting level will eventually be determined by the first resistor 7 and the second and third resistors 9 and 10 connected in series. ratio with
It is determined by R ₂ + R ₃ /R ₁ . Therefore, the smaller the ratio R ₂ +R ₃ /R ₁ is, the lower the lighting level is, and the larger the ratio is, the higher the lighting level is.

The first and second drive transistors 17 and 18 are turned on and an output signal is generated at the output terminal 19, and at the same time, the control transistor 20 is turned on.
The third resistor 10 is short-circuited. When the third resistor 10 is short-circuited, the level at which the first drive transistor 17 is turned off, that is, the lamp extinguishing level, is a predetermined value lower than the lighting level, and this is due to the difference between the first resistor 7 and the second resistor 9. It is determined by the ratio R ₂ /R ₁ . Therefore, the level difference between the lighting level and the lighting off level becomes hysteresis, and the first to third
By determining the values of resistors 7 to 10, the width of the hysteresis is set.

When the amplifier circuit shown in Fig. 1 is used as a stereo indicator of an FM stereo broadcast receiver, the values of the first to third resistors 7 to 10 are respectively 10KΩ,
By setting it to 12KΩ and 4.3KΩ, I was able to create an indicator that could provide accurate stereo display without malfunctioning due to noise, etc.

Figure 2 shows the hysteresis characteristics of the amplifier circuit of the present invention. When the input signal increases and reaches V ₁ , an output signal is generated, and as the input signal decreases, the output signal becomes smaller than V ₁ . This shows that the output signal stops when it reaches V ₂ . And the first
Ratio of resistor 7 to second and third resistors 9 and 10
If R ₂ +R ₃ /R ₁ is large, V ₁ moves to the right in the figure, and if it is small, V 1 moves to the left. Further, if the ratio R ₂ /R ₁ between the first resistor 7 and the second resistor 9 is made large, V ₂ moves to the right in the figure, and if it is made small, it moves to the left.

Therefore, in FIG. 1, the first to third resistors 7
A desired hysteresis characteristic can be obtained by simply setting a value between 10 and 10.

(e) Effects As described above, according to the present invention, desired hysteresis characteristics can be obtained only by setting the resistance ratio, and therefore an amplifier circuit having hysteresis characteristics with a wide range of applications can be provided. In addition, since the collector bias of the input stage differential amplifier circuit can be made equal, the input offset becomes small, and the first to third
Since there is no need to provide a large difference in the resistance values, the resistance ratio does not vary much even when integrated circuits are implemented, so there is an advantage that an amplifier circuit that can be easily integrated into circuits can be provided.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a characteristic diagram thereof. Explanation of main figure numbers, 1 ...Input stage differential amplifier circuit,
4, 5... Diode, 6 ... Positive feedback differential amplifier circuit, 7, 9, 10... Resistor, 17, 18... Drive transistor, 20... Control transistor.

Claims (1)

[Scope of utility model registration request] an input stage differential amplifier circuit; a positive feedback amplifier circuit consisting of a pair of transistors driven by an output signal of the input stage differential amplifier circuit, and in which the collector of one transistor is connected to the base of the other transistor; a first diode connected in a current mirror relationship with one transistor of the positive feedback amplifier circuit; a first output circuit that generates an output current according to the current flowing through the first diode; a second diode connected in a current mirror relationship with the other transistor; and a second diode that generates an output current according to the current flowing through the second diode.
an output circuit, a drive transistor that is turned on in response to a difference between output currents of the first and second output circuits, a control transistor that is turned on in response to the operation of the drive transistor, and one transistor of the positive feedback amplifier circuit. a first resistor connected to the emitter of
It consists of second and third resistors connected in series to the emitter of the other transistor, and the drive transistor is turned on in response to an input signal of a predetermined level or higher applied to the input stage differential amplifier circuit, and the control transistor is turned on. An amplifier circuit characterized in that the third resistor is short-circuited to have a predetermined hysteresis characteristic determined by the values of the first to third resistors.